Searched refs:base_addr (Results 1 - 25 of 37) sorted by relevance

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/arch/microblaze/kernel/
H A Dheartbeat.c18 static unsigned int base_addr; variable
24 if (base_addr) {
26 out_be32(base_addr, 1);
28 out_be32(base_addr, 0);
62 base_addr = be32_to_cpup(of_get_property(gpio, "reg", NULL));
63 base_addr = (unsigned long) ioremap(base_addr, PAGE_SIZE);
64 printk(KERN_NOTICE "Heartbeat GPIO at 0x%x\n", base_addr);
69 out_be32(base_addr + 4, 0);
H A Dearly_printk.c25 static u32 base_addr; variable
40 while (--retries && (in_be32(base_addr + 8) & (1 << 3)))
46 out_be32(base_addr + 4, c & 0xff);
86 !((in_be32(base_addr + 0x14) & BOTH_EMPTY) == BOTH_EMPTY))
90 out_be32(base_addr, c & 0xff);
135 base_addr = of_early_console(&version);
136 if (base_addr) {
138 early_console_reg_tlb_alloc(base_addr);
144 "at 0x%08x\n", base_addr);
151 "at 0x%08x\n", base_addr);
[all...]
/arch/arm/mach-gemini/
H A Dirq.c22 #define IRQ_SOURCE(base_addr) (base_addr + 0x00)
23 #define IRQ_MASK(base_addr) (base_addr + 0x04)
24 #define IRQ_CLEAR(base_addr) (base_addr + 0x08)
25 #define IRQ_TMODE(base_addr) (base_addr + 0x0C)
26 #define IRQ_TLEVEL(base_addr) (base_addr
[all...]
/arch/arm/mach-zynq/
H A Dtimer.c75 * @base_addr: Base address of timer
78 void __iomem *base_addr; member in struct:xttcpss_timer
96 ctrl_reg = __raw_readl(timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
98 __raw_writel(ctrl_reg, timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
100 __raw_writel(cycles, timer->base_addr + XTTCPSS_INTR_VAL_OFFSET);
106 __raw_writel(ctrl_reg, timer->base_addr + XTTCPSS_CNT_CNTRL_OFFSET);
123 __raw_writel(__raw_readl(timer->base_addr + XTTCPSS_ISR_OFFSET),
124 timer->base_addr + XTTCPSS_ISR_OFFSET);
149 timers[XTTCPSS_CLOCKSOURCE].base_addr = XTTCPSS_TIMER_BASE;
151 __raw_writel(0x0, timers[XTTCPSS_CLOCKSOURCE].base_addr
[all...]
/arch/sparc/prom/
H A Dmemory.c23 sp_banks[index].base_addr = (unsigned long) p->start_adr;
42 sp_banks[i].base_addr = reg[i].phys_addr;
53 if (x->base_addr > y->base_addr)
55 if (x->base_addr < y->base_addr)
82 sp_banks[num_ents].base_addr = 0xdeadbeef;
/arch/x86/include/asm/
H A Dldt.h22 unsigned int base_addr; member in struct:user_desc
/arch/x86/um/asm/
H A Ddesc.h7 (info)->base_addr == 0 && \
H A Dmm_context.h38 ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
41 (((info)->base_addr & 0xff000000) | \
42 (((info)->base_addr & 0x00ff0000) >> 16) | \
53 (info)->base_addr == 0 && \
/arch/powerpc/include/asm/
H A Ddcr-native.h89 static inline unsigned __mfdcri(int base_addr, int base_data, int reg) argument
96 mtdcrx(base_addr, reg);
99 __mtdcr(base_addr, reg);
106 static inline void __mtdcri(int base_addr, int base_data, int reg, argument
113 mtdcrx(base_addr, reg);
116 __mtdcr(base_addr, reg);
122 static inline void __dcri_clrset(int base_addr, int base_data, int reg, argument
130 mtdcrx(base_addr, reg);
134 __mtdcr(base_addr, reg);
/arch/x86/um/shared/sysdep/
H A Dtls.h12 unsigned int base_addr; member in struct:um_dup_user_desc
/arch/arm/mach-at91/
H A Dgeneric.h70 extern void at91_ioremap_rstc(u32 base_addr);
75 extern void at91_ioremap_shdwc(u32 base_addr);
78 extern void at91_ioremap_matrix(u32 base_addr);
H A Dsetup.c278 void __init at91_ioremap_shdwc(u32 base_addr) argument
280 at91_shdwc_base = ioremap(base_addr, 16);
288 void __init at91_ioremap_rstc(u32 base_addr) argument
290 at91_rstc_base = ioremap(base_addr, 16);
298 void __init at91_ioremap_matrix(u32 base_addr) argument
300 at91_matrix_base = ioremap(base_addr, 512);
/arch/m68k/mvme16x/
H A Dconfig.c215 volatile unsigned char *base_addr = (u_char *)CD2401_ADDR; local
225 base_addr[CyCAR] = (u_char)port;
226 while (base_addr[CyCCR])
228 base_addr[CyCCR] = CyENB_XMTR;
230 ier = base_addr[CyIER];
231 base_addr[CyIER] = CyTxMpty;
238 if ((base_addr[CyLICR] >> 2) == port) {
241 base_addr[CyTEOIR] = CyNOTRANS;
245 base_addr[CyTDR] = '\n';
251 base_addr[CyTD
[all...]
/arch/mips/rb532/
H A Dirq.c51 volatile u32 *base_addr; member in struct:intr_group
63 .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)},
66 .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 1 * IC_GROUP_OFFSET)},
69 .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 2 * IC_GROUP_OFFSET)},
72 .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 3 * IC_GROUP_OFFSET)},
75 .base_addr = (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 4 * IC_GROUP_OFFSET)}
129 addr = intr_group[group].base_addr;
147 addr = intr_group[group].base_addr;
227 addr = intr_group[group].base_addr;
/arch/alpha/kernel/
H A Dsmc37c669.c1250 SMC37c669_SERIAL_BASE_ADDRESS_REGISTER base_addr;
1267 base_addr.as_uchar = 0;
1268 base_addr.by_field.addr9_3 = local_config[ func ].port1 >> 3;
1272 base_addr.as_uchar
1279 SMC37c669_SERIAL_BASE_ADDRESS_REGISTER base_addr;
1296 base_addr.as_uchar = 0;
1297 base_addr.by_field.addr9_3 = local_config[ func ].port1 >> 3;
1301 base_addr.as_uchar
1308 SMC37c669_PARALLEL_BASE_ADDRESS_REGISTER base_addr;
1344 base_addr
1248 SMC37c669_SERIAL_BASE_ADDRESS_REGISTER base_addr; local
1277 SMC37c669_SERIAL_BASE_ADDRESS_REGISTER base_addr; local
1306 SMC37c669_PARALLEL_BASE_ADDRESS_REGISTER base_addr; local
1354 SMC37c669_FDC_BASE_ADDRESS_REGISTER base_addr; local
1477 SMC37c669_SERIAL_BASE_ADDRESS_REGISTER base_addr; local
1501 SMC37c669_SERIAL_BASE_ADDRESS_REGISTER base_addr; local
1526 SMC37c669_PARALLEL_BASE_ADDRESS_REGISTER base_addr; local
1567 SMC37c669_FDC_BASE_ADDRESS_REGISTER base_addr; local
1749 unsigned char base_addr = 0; local
[all...]
/arch/parisc/include/asm/
H A Dunwind.h47 unsigned long base_addr; member in struct:unwind_table
65 unwind_table_add(const char *name, unsigned long base_addr,
H A Dpci.h42 void __iomem *base_addr; /* aka Host Physical Address */ member in struct:pci_hba_data
/arch/sparc/mm/
H A Dinit_32.c120 unsigned long start_pfn = sp_banks[i].base_addr >> PAGE_SHIFT;
121 unsigned long end_pfn = (sp_banks[i].base_addr + sp_banks[i].num_bytes) >> PAGE_SHIFT;
141 last_pfn = (sp_banks[0].base_addr + sp_banks[0].num_bytes) >> PAGE_SHIFT;
143 curr_pfn = sp_banks[i].base_addr >> PAGE_SHIFT;
151 last_pfn = (sp_banks[i].base_addr + sp_banks[i].num_bytes) >> PAGE_SHIFT;
166 end_of_phys_memory = sp_banks[i].base_addr +
178 sp_banks[i].base_addr = 0xdeadbeef;
181 sp_banks[i+1].base_addr = 0xdeadbeef;
241 curr_pfn = sp_banks[i].base_addr >> PAGE_SHIFT;
245 last_pfn = (sp_banks[i].base_addr
[all...]
/arch/arm/mach-omap2/
H A Dirq.c220 static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs) argument
225 irqnr = readl_relaxed(base_addr + 0x98);
229 irqnr = readl_relaxed(base_addr + 0xb8);
233 irqnr = readl_relaxed(base_addr + 0xd8);
237 irqnr = readl_relaxed(base_addr + 0xf8);
244 irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET);
256 void __iomem *base_addr = OMAP2_IRQ_BASE; local
257 omap_intc_handle_irq(base_addr, regs);
357 void __iomem *base_addr = OMAP3_IRQ_BASE; local
358 omap_intc_handle_irq(base_addr, reg
[all...]
/arch/ia64/sn/kernel/
H A Dbte.c444 u64 *base_addr; local
447 base_addr = (u64 *)
449 mynodepda->bte_if[i].bte_base_addr = base_addr;
450 mynodepda->bte_if[i].bte_source_addr = BTE_SOURCE_ADDR(base_addr);
451 mynodepda->bte_if[i].bte_destination_addr = BTE_DEST_ADDR(base_addr);
452 mynodepda->bte_if[i].bte_control_addr = BTE_CTRL_ADDR(base_addr);
453 mynodepda->bte_if[i].bte_notify_addr = BTE_NOTIF_ADDR(base_addr);
/arch/parisc/kernel/
H A Dunwind.c95 unsigned long base_addr, unsigned long gp,
103 table->base_addr = base_addr;
105 table->start = base_addr + start->region_start;
106 table->end = base_addr + end->region_end;
117 start->region_start += base_addr;
118 start->region_end += base_addr;
137 unwind_table_add(const char *name, unsigned long base_addr, argument
151 unwind_table_init(table, name, base_addr, gp, start, end);
94 unwind_table_init(struct unwind_table *table, const char *name, unsigned long base_addr, unsigned long gp, void *table_start, void *table_end) argument
/arch/sh/mm/
H A Dcache-sh4.c320 unsigned long base_addr = addr; local
353 ea = base_addr + PAGE_SIZE;
354 a = base_addr;
369 base_addr += way_incr;
/arch/mips/include/asm/octeon/
H A Dcvmx-bootmem.h77 uint64_t base_addr; member in struct:cvmx_bootmem_named_block_desc
/arch/sparc/kernel/
H A Dsetup_32.c287 if (sp_banks[i].base_addr < phys_base)
288 phys_base = sp_banks[i].base_addr;
289 top = sp_banks[i].base_addr +
H A Dchmc.c165 u64 base_addr; member in struct:jbusmc_dimm_group
282 if (phys_addr < dp->base_addr ||
283 (dp->base_addr + dp->size) <= phys_addr)
376 dp->base_addr = (p->portid * (64UL * 1024 * 1024 * 1024));
377 dp->base_addr += (index * (8UL * 1024 * 1024 * 1024));
378 dp->size = jbusmc_dimm_group_size(dp->base_addr, mem_regs, num_mem_regs);

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