Searched refs:bfin_read32 (Results 1 - 25 of 29) sorted by relevance

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/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF516.h15 #define bfin_read_EMAC_OPMODE() bfin_read32(EMAC_OPMODE)
17 #define bfin_read_EMAC_ADDRLO() bfin_read32(EMAC_ADDRLO)
19 #define bfin_read_EMAC_ADDRHI() bfin_read32(EMAC_ADDRHI)
21 #define bfin_read_EMAC_HASHLO() bfin_read32(EMAC_HASHLO)
23 #define bfin_read_EMAC_HASHHI() bfin_read32(EMAC_HASHHI)
25 #define bfin_read_EMAC_STAADD() bfin_read32(EMAC_STAADD)
27 #define bfin_read_EMAC_STADAT() bfin_read32(EMAC_STADAT)
29 #define bfin_read_EMAC_FLC() bfin_read32(EMAC_FLC)
31 #define bfin_read_EMAC_VLAN1() bfin_read32(EMAC_VLAN1)
33 #define bfin_read_EMAC_VLAN2() bfin_read32(EMAC_VLAN
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H A DcdefBF518.h21 #define bfin_read_EMAC_PTP_FOFF() bfin_read32(EMAC_PTP_FOFF)
23 #define bfin_read_EMAC_PTP_FV1() bfin_read32(EMAC_PTP_FV1)
25 #define bfin_read_EMAC_PTP_FV2() bfin_read32(EMAC_PTP_FV2)
27 #define bfin_read_EMAC_PTP_FV3() bfin_read32(EMAC_PTP_FV3)
29 #define bfin_read_EMAC_PTP_ADDEND() bfin_read32(EMAC_PTP_ADDEND)
31 #define bfin_read_EMAC_PTP_ACCR() bfin_read32(EMAC_PTP_ACCR)
33 #define bfin_read_EMAC_PTP_OFFSET() bfin_read32(EMAC_PTP_OFFSET)
35 #define bfin_read_EMAC_PTP_TIMELO() bfin_read32(EMAC_PTP_TIMELO)
37 #define bfin_read_EMAC_PTP_TIMEHI() bfin_read32(EMAC_PTP_TIMEHI)
39 #define bfin_read_EMAC_PTP_RXSNAPLO() bfin_read32(EMAC_PTP_RXSNAPL
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H A DcdefBF514.h19 #define bfin_read_RSI_ARGUMENT() bfin_read32(RSI_ARGUMENT)
25 #define bfin_read_RSI_RESPONSE0() bfin_read32(RSI_RESPONSE0)
27 #define bfin_read_RSI_RESPONSE1() bfin_read32(RSI_RESPONSE1)
29 #define bfin_read_RSI_RESPONSE2() bfin_read32(RSI_RESPONSE2)
31 #define bfin_read_RSI_RESPONSE3() bfin_read32(RSI_RESPONSE3)
33 #define bfin_read_RSI_DATA_TIMER() bfin_read32(RSI_DATA_TIMER)
41 #define bfin_read_RSI_STATUS() bfin_read32(RSI_STATUS)
45 #define bfin_read_RSI_MASK0() bfin_read32(RSI_MASK0)
47 #define bfin_read_RSI_MASK1() bfin_read32(RSI_MASK1)
53 #define bfin_read_RSI_FIFO() bfin_read32(RSI_FIF
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H A DcdefBF512.h19 #define bfin_read_CHIPID() bfin_read32(CHIPID)
29 #define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT)
31 #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
33 #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + (x << 6))
36 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
38 #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
40 #define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
42 #define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
45 #define bfin_read_SIC_ISR0() bfin_read32(SIC_ISR0)
47 #define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR
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/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF527.h15 #define bfin_read_EMAC_OPMODE() bfin_read32(EMAC_OPMODE)
17 #define bfin_read_EMAC_ADDRLO() bfin_read32(EMAC_ADDRLO)
19 #define bfin_read_EMAC_ADDRHI() bfin_read32(EMAC_ADDRHI)
21 #define bfin_read_EMAC_HASHLO() bfin_read32(EMAC_HASHLO)
23 #define bfin_read_EMAC_HASHHI() bfin_read32(EMAC_HASHHI)
25 #define bfin_read_EMAC_STAADD() bfin_read32(EMAC_STAADD)
27 #define bfin_read_EMAC_STADAT() bfin_read32(EMAC_STADAT)
29 #define bfin_read_EMAC_FLC() bfin_read32(EMAC_FLC)
31 #define bfin_read_EMAC_VLAN1() bfin_read32(EMAC_VLAN1)
33 #define bfin_read_EMAC_VLAN2() bfin_read32(EMAC_VLAN
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H A DcdefBF522.h19 #define bfin_read_CHIPID() bfin_read32(CHIPID)
29 #define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT)
31 #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
33 #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + (x << 6))
36 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
38 #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
40 #define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
42 #define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
45 #define bfin_read_SIC_ISR0() bfin_read32(SIC_ISR0)
47 #define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR
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/arch/blackfin/mach-bf537/include/mach/
H A DcdefBF537.h15 #define bfin_read_EMAC_OPMODE() bfin_read32(EMAC_OPMODE)
17 #define bfin_read_EMAC_ADDRLO() bfin_read32(EMAC_ADDRLO)
19 #define bfin_read_EMAC_ADDRHI() bfin_read32(EMAC_ADDRHI)
21 #define bfin_read_EMAC_HASHLO() bfin_read32(EMAC_HASHLO)
23 #define bfin_read_EMAC_HASHHI() bfin_read32(EMAC_HASHHI)
25 #define bfin_read_EMAC_STAADD() bfin_read32(EMAC_STAADD)
27 #define bfin_read_EMAC_STADAT() bfin_read32(EMAC_STADAT)
29 #define bfin_read_EMAC_FLC() bfin_read32(EMAC_FLC)
31 #define bfin_read_EMAC_VLAN1() bfin_read32(EMAC_VLAN1)
33 #define bfin_read_EMAC_VLAN2() bfin_read32(EMAC_VLAN
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H A DcdefBF534.h19 #define bfin_read_CHIPID() bfin_read32(CHIPID)
26 #define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT)
28 #define bfin_read_SIC_IMASK() bfin_read32(SIC_IMASK)
30 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
32 #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
34 #define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
36 #define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
38 #define bfin_read_SIC_ISR() bfin_read32(SIC_ISR)
40 #define bfin_read_SIC_IWR() bfin_read32(SIC_IWR)
46 #define bfin_read_WDOG_CNT() bfin_read32(WDOG_CN
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/arch/blackfin/include/asm/
H A Dcdef_LPBlackfin.h17 #define bfin_read_SRAM_BASE_ADDRESS() bfin_read32(SRAM_BASE_ADDRESS)
19 #define bfin_read_DMEM_CONTROL() bfin_read32(DMEM_CONTROL)
21 #define bfin_read_DCPLB_STATUS() bfin_read32(DCPLB_STATUS)
23 #define bfin_read_DCPLB_FAULT_ADDR() bfin_read32(DCPLB_FAULT_ADDR)
28 #define bfin_read_DCPLB_ADDR0() bfin_read32(DCPLB_ADDR0)
30 #define bfin_read_DCPLB_ADDR1() bfin_read32(DCPLB_ADDR1)
32 #define bfin_read_DCPLB_ADDR2() bfin_read32(DCPLB_ADDR2)
34 #define bfin_read_DCPLB_ADDR3() bfin_read32(DCPLB_ADDR3)
36 #define bfin_read_DCPLB_ADDR4() bfin_read32(DCPLB_ADDR4)
38 #define bfin_read_DCPLB_ADDR5() bfin_read32(DCPLB_ADDR
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H A Dcplb.h109 u32 ctrl = bfin_read32(mmr) & ~mask;
117 u32 ctrl = bfin_read32(mmr) & ~mask;
129 u32 ctrl = bfin_read32(mmr) | mask;
137 u32 ctrl = bfin_read32(mmr) | mask;
H A Ddef_LPBlackfin.h48 #define bfin_read32(addr) _bfin_readX(addr, 32, , ) macro
57 sizeof(*(addr)) == 4 ? bfin_read32(addr) : \
/arch/blackfin/mach-bf548/include/mach/
H A DcdefBF549.h20 #define bfin_read_MXVR_STATE_0() bfin_read32(MXVR_STATE_0)
22 #define bfin_read_MXVR_STATE_1() bfin_read32(MXVR_STATE_1)
24 #define bfin_read_MXVR_INT_STAT_0() bfin_read32(MXVR_INT_STAT_0)
26 #define bfin_read_MXVR_INT_STAT_1() bfin_read32(MXVR_INT_STAT_1)
28 #define bfin_read_MXVR_INT_EN_0() bfin_read32(MXVR_INT_EN_0)
30 #define bfin_read_MXVR_INT_EN_1() bfin_read32(MXVR_INT_EN_1)
40 #define bfin_read_MXVR_LADDR() bfin_read32(MXVR_LADDR)
44 #define bfin_read_MXVR_AADDR() bfin_read32(MXVR_AADDR)
49 #define bfin_read_MXVR_ALLOC_0() bfin_read32(MXVR_ALLOC_0)
51 #define bfin_read_MXVR_ALLOC_1() bfin_read32(MXVR_ALLOC_
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H A DcdefBF54x_base.h27 #define bfin_read_CHIPID() bfin_read32(CHIPID)
39 #define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT)
41 #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
43 #define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
45 #define bfin_read_SIC_IMASK2() bfin_read32(SIC_IMASK2)
47 #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + (x << 2))
50 #define bfin_read_SIC_ISR0() bfin_read32(SIC_ISR0)
52 #define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1)
54 #define bfin_read_SIC_ISR2() bfin_read32(SIC_ISR2)
56 #define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR
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H A DcdefBF547.h19 #define bfin_read_TIMER8_COUNTER() bfin_read32(TIMER8_COUNTER)
21 #define bfin_read_TIMER8_PERIOD() bfin_read32(TIMER8_PERIOD)
23 #define bfin_read_TIMER8_WIDTH() bfin_read32(TIMER8_WIDTH)
27 #define bfin_read_TIMER9_COUNTER() bfin_read32(TIMER9_COUNTER)
29 #define bfin_read_TIMER9_PERIOD() bfin_read32(TIMER9_PERIOD)
31 #define bfin_read_TIMER9_WIDTH() bfin_read32(TIMER9_WIDTH)
35 #define bfin_read_TIMER10_COUNTER() bfin_read32(TIMER10_COUNTER)
37 #define bfin_read_TIMER10_PERIOD() bfin_read32(TIMER10_PERIOD)
39 #define bfin_read_TIMER10_WIDTH() bfin_read32(TIMER10_WIDTH)
48 #define bfin_read_TIMER_STATUS1() bfin_read32(TIMER_STATUS
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H A DcdefBF544.h19 #define bfin_read_TIMER8_COUNTER() bfin_read32(TIMER8_COUNTER)
21 #define bfin_read_TIMER8_PERIOD() bfin_read32(TIMER8_PERIOD)
23 #define bfin_read_TIMER8_WIDTH() bfin_read32(TIMER8_WIDTH)
27 #define bfin_read_TIMER9_COUNTER() bfin_read32(TIMER9_COUNTER)
29 #define bfin_read_TIMER9_PERIOD() bfin_read32(TIMER9_PERIOD)
31 #define bfin_read_TIMER9_WIDTH() bfin_read32(TIMER9_WIDTH)
35 #define bfin_read_TIMER10_COUNTER() bfin_read32(TIMER10_COUNTER)
37 #define bfin_read_TIMER10_PERIOD() bfin_read32(TIMER10_PERIOD)
39 #define bfin_read_TIMER10_WIDTH() bfin_read32(TIMER10_WIDTH)
48 #define bfin_read_TIMER_STATUS1() bfin_read32(TIMER_STATUS
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H A DcdefBF542.h74 #define bfin_read_SDH_ARGUMENT() bfin_read32(SDH_ARGUMENT)
80 #define bfin_read_SDH_RESPONSE0() bfin_read32(SDH_RESPONSE0)
82 #define bfin_read_SDH_RESPONSE1() bfin_read32(SDH_RESPONSE1)
84 #define bfin_read_SDH_RESPONSE2() bfin_read32(SDH_RESPONSE2)
86 #define bfin_read_SDH_RESPONSE3() bfin_read32(SDH_RESPONSE3)
88 #define bfin_read_SDH_DATA_TIMER() bfin_read32(SDH_DATA_TIMER)
96 #define bfin_read_SDH_STATUS() bfin_read32(SDH_STATUS)
100 #define bfin_read_SDH_MASK0() bfin_read32(SDH_MASK0)
102 #define bfin_read_SDH_MASK1() bfin_read32(SDH_MASK1)
106 #define bfin_read_SDH_FIFO() bfin_read32(SDH_FIF
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/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF539.h15 #define bfin_read_MXVR_PLL_CTL_0() bfin_read32(MXVR_PLL_CTL_0)
17 #define bfin_read_MXVR_STATE_0() bfin_read32(MXVR_STATE_0)
19 #define bfin_read_MXVR_STATE_1() bfin_read32(MXVR_STATE_1)
21 #define bfin_read_MXVR_INT_STAT_0() bfin_read32(MXVR_INT_STAT_0)
23 #define bfin_read_MXVR_INT_STAT_1() bfin_read32(MXVR_INT_STAT_1)
25 #define bfin_read_MXVR_INT_EN_0() bfin_read32(MXVR_INT_EN_0)
27 #define bfin_read_MXVR_INT_EN_1() bfin_read32(MXVR_INT_EN_1)
37 #define bfin_read_MXVR_LADDR() bfin_read32(MXVR_LADDR)
41 #define bfin_read_MXVR_AADDR() bfin_read32(MXVR_AADDR)
43 #define bfin_read_MXVR_ALLOC_0() bfin_read32(MXVR_ALLOC_
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H A DcdefBF538.h20 #define bfin_read_CHIPID() bfin_read32(CHIPID)
28 #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
30 #define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
32 #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + x * (SIC_IMASK1 - SIC_IMASK0))
34 #define bfin_read_SIC_ISR0() bfin_read32(SIC_ISR0)
36 #define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1)
38 #define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0))
40 #define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0)
42 #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
44 #define bfin_read_SIC_IWR(x) bfin_read32(SIC_IWR
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/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h16 #define bfin_read_CHIPID() bfin_read32(CHIPID)
26 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
28 #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
30 #define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
32 #define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
34 #define bfin_read_SIC_IMASK() bfin_read32(SIC_IMASK)
36 #define bfin_read_SIC_ISR() bfin_read32(SIC_ISR)
38 #define bfin_read_SIC_IWR() bfin_read32(SIC_IWR)
44 #define bfin_read_WDOG_CNT() bfin_read32(WDOG_CNT)
46 #define bfin_read_WDOG_STAT() bfin_read32(WDOG_STA
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/arch/blackfin/mach-bf561/include/mach/
H A Dblackfin.h32 #define bfin_read_SIC_IMASK(x) bfin_read32(__SIC_MUX(SIC_IMASK0, x))
34 #define bfin_read_SICB_IMASK(x) bfin_read32(__SIC_MUX(SICB_IMASK0, x))
36 #define bfin_read_SIC_ISR(x) bfin_read32(__SIC_MUX(SIC_ISR0, x))
38 #define bfin_read_SICB_ISR(x) bfin_read32(__SIC_MUX(SICB_ISR0, x))
H A DcdefBF561.h23 #define bfin_read_CHIPID() bfin_read32(CHIPID)
32 #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
34 #define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
36 #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
38 #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
40 #define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
42 #define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
44 #define bfin_read_SIC_IAR4() bfin_read32(SIC_IAR4)
46 #define bfin_read_SIC_IAR5() bfin_read32(SIC_IAR5)
48 #define bfin_read_SIC_IAR6() bfin_read32(SIC_IAR
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H A Dpll.h37 *iwr0 = bfin_read32(SIC_IWR0 + SICA_SICB_OFF);
38 *iwr1 = bfin_read32(SIC_IWR1 + SICA_SICB_OFF);
/arch/blackfin/mm/
H A Dmaccess.c34 u32 mmr = bfin_read32(src);
/arch/blackfin/mach-bf537/boards/
H A Ddnp5370.c404 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
/arch/blackfin/kernel/
H A Dperf_event.c192 return bfin_read32(PFCNTR0 + (idx * 4));

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