Searched refs:CSR18 (Results 1 - 7 of 7) sorted by relevance
| /drivers/net/ethernet/amd/ |
| H A D | ariadne.h | 78 #define CSR18 0x1200 /* Current Receive Buffer Address */ macro
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| /drivers/net/ethernet/dec/tulip/ |
| H A D | tulip.h | 122 CSR18 = 0x88, enumerator in enum:tulip_offsets
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| H A D | tulip_core.c | 1825 tmp = ioread32(ioaddr + CSR18);
1828 iowrite32(tmp, ioaddr + CSR18);
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| /drivers/net/wireless/rt2x00/ |
| H A D | rt2400pci.h | 245 * CSR18: IFS timer register 0.
249 #define CSR18 0x0048 macro
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| H A D | rt2500pci.h | 322 * CSR18: IFS timer register 0.
326 #define CSR18 0x0048 macro
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| H A D | rt2400pci.c | 378 rt2x00pci_register_read(rt2x00dev, CSR18, ®);
381 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
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| H A D | rt2500pci.c | 384 rt2x00pci_register_read(rt2x00dev, CSR18, ®);
387 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
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