Searched refs:CSR3 (Results 1 - 17 of 17) sorted by relevance
/drivers/net/ethernet/amd/ |
H A D | am79c961a.h | 48 #define CSR3 3 macro
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H A D | depca.h | 28 #define CSR3 3 macro 69 ** CONTROL AND STATUS REGISTER 3 (CSR3)
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H A D | sun3lance.c | 205 #define CSR3 3 /* misc */ macro 228 /* CSR3 */ 506 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON; 508 REGA(CSR3) = CSR3_BSWP; 537 REGA(CSR3) = CSR3_BSWP; 718 REGA(CSR3) = CSR3_BSWP; 756 REGA(CSR3) = CSR3_BSWP; 932 REGA( CSR3 ) = CSR3_BSWP;
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H A D | am79c961a.c | 300 write_rreg (dev->base_addr, CSR3, CSR3_IDONM|CSR3_BABLM|CSR3_DXSUFLO); 369 write_rreg (dev->base_addr, CSR3, CSR3_MASKALL); 644 write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
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H A D | ariadne.h | 65 #define CSR3 0x0300 /* - Interrupt Masks and Deferral Control */ macro 198 * Bit definitions for CSR3 (Interrupt Masks and Deferral Control)
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H A D | atarilance.c | 306 #define CSR3 3 /* misc */ macro 329 /* CSR3 */ 655 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); 746 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); 1113 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
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H A D | pcnet32.c | 206 #define CSR3 3 macro 463 val = lp->a->read_csr(ioaddr, CSR3); 465 lp->a->write_csr(ioaddr, CSR3, val); 1342 val = lp->a->read_csr(ioaddr, CSR3); 1344 lp->a->write_csr(ioaddr, CSR3, val); 2161 val = lp->a->read_csr(ioaddr, CSR3); 2163 lp->a->write_csr(ioaddr, CSR3, val); 2491 val = lp->a->read_csr(ioaddr, CSR3); 2493 lp->a->write_csr(ioaddr, CSR3, val);
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H A D | ni65.c | 153 #define CSR3 0x03 macro 588 writereg(0,CSR3); /* busmaster/no word-swap */
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H A D | depca.c | 1202 outw(CSR3, DEPCA_ADDR); /* ALE control */ 1258 LoadCSRs(dev); /* Reload CSR3 */ 1899 outw(CSR3, DEPCA_ADDR); 1900 printk("CSR3: 0x%4.4x\n", inw(DEPCA_DATA)); 1947 LoadCSRs(dev); /* Reload CSR3 */ 1963 LoadCSRs(dev); /* Reload CSR3 */ 1979 LoadCSRs(dev); /* Reload CSR3 */
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H A D | ariadne.c | 427 lance->RAP = CSR3; /* Interrupt Masks and Deferral Control */
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/drivers/net/ethernet/dec/tulip/ |
H A D | tulip.h | 109 CSR3 = 0x18, enumerator in enum:tulip_offsets
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H A D | xircom_cb.c | 50 #define CSR3 0x18 macro 574 outl(address, card->io_port + CSR3); /* Receive descr list address */ 611 outl(val, card->io_port + CSR3); /* Receive descriptor address */
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H A D | tulip_core.c | 333 iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
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/drivers/net/wireless/rt2x00/ |
H A D | rt2400pci.h | 87 * CSR3: STA MAC address register 0. 89 #define CSR3 0x000c macro
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H A D | rt2500pci.h | 98 * CSR3: STA MAC address register 0. 100 #define CSR3 0x000c macro
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H A D | rt2400pci.c | 313 rt2x00pci_register_multiwrite(rt2x00dev, CSR3,
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H A D | rt2500pci.c | 319 rt2x00pci_register_multiwrite(rt2x00dev, CSR3,
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