Searched refs:EXYNOS_DSIM_MSYNC (Results 1 - 2 of 2) sorted by relevance

/drivers/video/exynos/
H A Dexynos_mipi_dsi_regs.h29 #define EXYNOS_DSIM_MSYNC 0x24 /* Main display sync area register */ macro
106 /* EXYNOS_DSIM_MSYNC */
H A Dexynos_mipi_dsi_lowlevel.c182 reg = (readl(dsim->reg_base + EXYNOS_DSIM_MSYNC)) &
188 writel(reg, dsim->reg_base + EXYNOS_DSIM_MSYNC);

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