| /drivers/scsi/aic7xxx_old/ |
| H A D | aic7xxx.seq | 300 mvi INTSTAT,BAD_PHASE; /* unknown phase - signal driver */
310 mvi INTSTAT, BAD_PHASE;
535 mvi INTSTAT, SEQ_SG_FIXUP;
585 mvi INTSTAT,DATA_OVERRUN;
745 mvi INTSTAT,AWAITING_MSG;
793 mvi INTSTAT,SEND_REJECT; /* let driver know */
831 mvi INTSTAT,BAD_STATUS; /* let driver know */
866 mvi INTSTAT,CMDCMPLT;
879 mvi INTSTAT,EXTENDED_MSG; /* let driver know */
998 mvi INTSTAT, NO_MATC
[all...] |
| H A D | aic7xxx_reg.h | 395 #define INTSTAT 0x91 macro
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| H A D | aic7xxx.reg | 682 register INTSTAT {
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| /drivers/net/ethernet/smsc/ |
| H A D | epic100.c | 197 COMMAND=0, INTSTAT=4, INTMASK=8, GENCTL=0x0C, NVCTL=0x10, EECTL=0x14, enumerator in enum:epic_registers
839 (int)inl(ioaddr + INTSTAT));
876 (int)inl(ioaddr + INTSTAT), (int)inl(ioaddr + RxSTAT));
1093 status = inl(ioaddr + INTSTAT);
1095 outl(status & EpicNormalEvent, ioaddr + INTSTAT);
1100 (int)inl(ioaddr + INTSTAT));
1142 outl(status & 0x7f18, ioaddr + INTSTAT);
1254 status = inl(ioaddr + INTSTAT);
1290 outl(EpicNapiEvent, ioaddr + INTSTAT);
1316 dev->name, (int)inl(ioaddr + INTSTAT));
[all...] |
| /drivers/scsi/aic7xxx/ |
| H A D | aic7xxx.seq | 640 mvi INTSTAT,CMDCMPLT ret;
1689 mvi INTSTAT,CMDCMPLT ret;
1824 mvi INTSTAT, OUT_OF_RANGE;
1828 mvi INTSTAT, OUT_OF_RANGE;
1836 mvi INTSTAT, OUT_OF_RANGE;
1840 mvi INTSTAT, OUT_OF_RANGE;
2396 mov INTSTAT, SINDEX;
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| H A D | aic79xx_pci.c | 481 if ((ahd_inb(ahd, INTSTAT) & PCIINT) != 0) {
491 if ((ahd_inb(ahd, INTSTAT) & PCIINT) != 0) {
800 intstat = ahd_inb(ahd, INTSTAT);
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| H A D | aic79xx_osm.h | 512 ahd_inb(ahd, INTSTAT);
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| H A D | aic7xxx_osm.h | 522 ahc_inb(ahc, INTSTAT);
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| H A D | aic7xxx_pci.c | 1111 if ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0
1123 && ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0
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| H A D | aic7xxx.reg | 870 register INTSTAT {
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| H A D | aic7xxx_reg.h_shipped | 640 #define INTSTAT 0x91
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| H A D | aic7xxx_core.c | 366 if ((ahc_inb(ahc, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) == 0)
753 intstat = ahc_inb(ahc, INTSTAT);
791 * copy of INTSTAT separately.
5638 intstat = ahc_inb(ahc, INTSTAT);
5641 intstat = ahc_inb(ahc, INTSTAT);
5648 printk("Infinite interrupt loop, INTSTAT = %x",
5649 ahc_inb(ahc, INTSTAT));
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| H A D | aic79xx_core.c | 406 if ((ahd_inb(ahd, INTSTAT) & ~CMDCMPLT) == 0)
977 intstat = ahd_inb(ahd, INTSTAT);
1017 * copy of INTSTAT separately.
7938 intstat = ahd_inb(ahd, INTSTAT);
7941 intstat = ahd_inb(ahd, INTSTAT);
7950 printk("Infinite interrupt loop, INTSTAT = %x",
7951 ahd_inb(ahd, INTSTAT));
9764 ahd_intstat_print(ahd_inb(ahd, INTSTAT), &cur_col, 50);
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| H A D | aic79xx.seq | 286 mvi INTSTAT, CMDCMPLT;
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| H A D | aic79xx.reg | 114 register INTSTAT {
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| H A D | aic79xx_reg.h_shipped | 26 ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap)
1245 #define INTSTAT 0x01
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| /drivers/scsi/ |
| H A D | aha152x.h | 235 #define INTSTAT 0x20 macro
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| H A D | aha152x.c | 875 if (TESTHI(DMASTAT, INTSTAT)) {
976 return TESTHI(DMASTAT, INTSTAT);
1468 if( TESTLO(DMASTAT, INTSTAT) )
2179 while(TESTLO(DMASTAT, INTSTAT) || TESTLO(DMASTAT, DFIFOEMP) || TESTLO(SSTAT2, SEMPTY)) {
2185 while(TESTLO(DMASTAT, DFIFOFULL|INTSTAT) && time_before(jiffies,the_time))
2188 if(TESTLO(DMASTAT, DFIFOFULL|INTSTAT)) {
2257 if(TESTLO(DMASTAT, INTSTAT) ||
2320 while(TESTLO(DMASTAT, INTSTAT) && CURRENT_SC->SCp.this_residual>0) {
2356 while(TESTLO(DMASTAT, DFIFOEMP|INTSTAT) && time_before(jiffies,the_time))
2359 if(TESTLO(DMASTAT, DFIFOEMP|INTSTAT)) {
[all...] |
| H A D | aic7xxx_old.c | 1518 ( !(aic_inb(p, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) &&
4881 printk(WARN_LEAD "Unknown SEQINT, INTSTAT 0x%x, SCSISIGI 0x%x.\n",
6244 * Read the INTSTAT location after clearing the CMDINT bit. This forces
6250 aic_inb(p, INTSTAT);
6344 if (!((intstat = aic_inb(p, INTSTAT)) & INT_PEND))
6477 } while ( (aic_inb(p, INTSTAT) & INT_PEND) );
8322 if(aic_inb(p, INTSTAT) & INT_PEND)
10817 while((aic_inb(p, INTSTAT) & INT_PEND) && !(p->flags & AHC_IN_ISR))
|