Searched refs:PAUSE (Results 1 - 18 of 18) sorted by relevance
/drivers/net/ethernet/apple/ |
H A D | mace.c | 306 out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16); 472 out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ 482 out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); 510 st_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ 511 st_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ 972 out_le32(&rd->control, (PAUSE << 16) | PAUSE);
|
H A D | bmac.c | 185 DBDMA_SET(RUN|WAKE) | DBDMA_CLEAR(PAUSE|DEAD)); 193 DBDMA_CLEAR(ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)); 486 st_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ 487 st_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ 1417 st_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ 1418 st_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ 1507 out_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); 1513 out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
|
/drivers/scsi/ |
H A D | mac53c94.c | 113 writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); 139 writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
|
H A D | mesh.c | 366 out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */ 1715 out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */
|
H A D | aic7xxx_old.c | 1496 while ((aic_inb(p, HCNTRL) & PAUSE) == 0) 8350 aic_outb(p, PAUSE | CHIPRST, HCNTRL); 9270 temp_p->pause = temp_p->unpause | PAUSE; 9717 temp_p->pause = hcntrl | PAUSE | INTEN; 9723 aic_outb(temp_p, hcntrl | PAUSE, HCNTRL); 9724 while( (aic_inb(temp_p, HCNTRL) & PAUSE) == 0 ) ; 10528 (aic_inb(p, HCNTRL) & PAUSE) ? "is" : "isn't" );
|
/drivers/scsi/aic7xxx_old/ |
H A D | aic7xxx_reg.h | 384 #define PAUSE 0x04 macro
|
H A D | aic7xxx.reg | 646 bit PAUSE 0x04
|
/drivers/ata/ |
H A D | pata_macio.c | 579 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma_regs->control);
|
/drivers/scsi/aic7xxx/ |
H A D | aic79xx_pci.c | 461 ahd_outb(ahd, HCNTRL, hcntrl|PAUSE);
|
H A D | aic7xxx.reg | 830 field PAUSE 0x04
|
H A D | aic7xxx_reg.h_shipped | 629 #define PAUSE 0x04
|
H A D | aic7xxx_pci.c | 1219 ahc_outb(ahc, HCNTRL, hcntrl|PAUSE);
|
H A D | aic79xx.reg | 269 field PAUSE 0x04
|
H A D | aic79xx_reg.h_shipped | 1318 #define PAUSE 0x04
|
H A D | aic7xxx_core.c | 328 return ((ahc_inb(ahc, HCNTRL) & PAUSE) != 0); 4464 ahc->pause = ahc->unpause | PAUSE;
|
H A D | aic79xx_core.c | 359 return ((ahd_inb(ahd, HCNTRL) & PAUSE) != 0); 6135 ahd->pause = PAUSE;
|
/drivers/block/ |
H A D | swim3.c | 772 out_le32(&dr->control, (RUN | PAUSE) << 16);
|
/drivers/ide/ |
H A D | pmac.c | 1484 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma->control);
|
Completed in 487 milliseconds