Searched refs:PIPEACONF_ENABLE (Results 1 - 6 of 6) sorted by relevance

/drivers/gpu/drm/gma500/
H A Dmdfld_intel_display.c331 if ((temp & PIPEACONF_ENABLE) != 0) {
332 temp &= ~PIPEACONF_ENABLE;
345 & PIPEACONF_ENABLE)) || pipe == 1) {
466 if ((temp & PIPEACONF_ENABLE) == 0) {
491 temp &= ~PIPEACONF_ENABLE;
507 temp |= PIPEACONF_ENABLE;
543 if ((temp & PIPEACONF_ENABLE) != 0) {
544 temp &= ~PIPEACONF_ENABLE;
556 | REG_READ(PIPECCONF)) & PIPEACONF_ENABLE))
1003 *pipeconf = PIPEACONF_ENABLE; /* FIXME_JLIU
[all...]
H A Dpsb_irq.c468 if (!(reg_val & PIPEACONF_ENABLE))
527 if (!(reg_val & PIPEACONF_ENABLE))
594 if (!(reg_val & PIPEACONF_ENABLE)) {
H A Doaktrail_crtc.c201 if ((temp & PIPEACONF_ENABLE) == 0)
202 REG_WRITE(pipeconf_reg, temp | PIPEACONF_ENABLE);
237 if ((temp & PIPEACONF_ENABLE) != 0) {
238 REG_WRITE(pipeconf_reg, temp & ~PIPEACONF_ENABLE);
H A Dcdv_intel_display.c611 if ((temp & PIPEACONF_ENABLE) == 0)
612 REG_WRITE(pipeconf_reg, temp | PIPEACONF_ENABLE);
635 if ((temp & PIPEACONF_ENABLE) != 0) {
636 REG_WRITE(pipeconf_reg, temp & ~PIPEACONF_ENABLE);
804 pipeconf |= PIPEACONF_ENABLE;
H A Dpsb_intel_display.c463 if ((temp & PIPEACONF_ENABLE) == 0)
464 REG_WRITE(pipeconf_reg, temp | PIPEACONF_ENABLE);
501 if ((temp & PIPEACONF_ENABLE) != 0) {
502 REG_WRITE(pipeconf_reg, temp & ~PIPEACONF_ENABLE);
704 pipeconf |= PIPEACONF_ENABLE;
H A Dpsb_intel_reg.h455 #define PIPEACONF_ENABLE (1 << 31) macro

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