Searched refs:RD_REG_DWORD (Results 1 - 9 of 9) sorted by relevance

/drivers/scsi/qla2xxx/
H A Dqla_dbg.c112 stat = RD_REG_DWORD(&reg->host_status);
125 RD_REG_DWORD(&reg->hccr);
131 RD_REG_DWORD(&reg->hccr);
174 *buf++ = htonl(RD_REG_DWORD(dmp_reg++));
187 ((RD_REG_DWORD(&reg->host_status) & HSRX_RISC_PAUSED) == 0) &&
209 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
230 if ((RD_REG_DWORD(&reg->ctrl_status) &
237 RD_REG_DWORD(&reg->hccr); /* PCI Posting. */
286 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
475 mq->qregs[que_idx] = htonl(RD_REG_DWORD(
[all...]
H A Dqla_sup.c464 (RD_REG_DWORD(&reg->flash_addr) & FARX_DATA_FLAG) == 0 &&
476 data = RD_REG_DWORD(&reg->flash_data);
504 RD_REG_DWORD(&reg->flash_data); /* PCI Posting. */
508 for (cnt = 500000; (RD_REG_DWORD(&reg->flash_addr) & FARX_DATA_FLAG) &&
1114 RD_REG_DWORD(&reg->ctrl_status) | CSRX_FLASH_ENABLE);
1115 RD_REG_DWORD(&reg->ctrl_status); /* PCI Posting. */
1153 RD_REG_DWORD(&reg->ctrl_status) & ~CSRX_FLASH_ENABLE);
1154 RD_REG_DWORD(&reg->ctrl_status); /* PCI Posting. */
1380 RD_REG_DWORD(&reg->ctrl_status) | CSRX_FLASH_ENABLE);
1381 RD_REG_DWORD(
[all...]
H A Dqla_isr.c156 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
2057 RD_REG_DWORD(&reg->iobase_addr);
2059 for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
2071 for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
2083 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
2089 RD_REG_DWORD(&reg->iobase_window);
2132 stat = RD_REG_DWORD(&reg->host_status);
2137 hccr = RD_REG_DWORD(&reg->hccr);
2276 stat = RD_REG_DWORD(&reg->host_status);
2281 hccr = RD_REG_DWORD(
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H A Dqla_nx.c367 win_read = RD_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase));
507 data = RD_REG_DWORD((void __iomem *)off);
920 RD_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase));
928 rval = RD_REG_DWORD((void *)
2082 if (RD_REG_DWORD(&reg->host_int)) {
2083 stat = RD_REG_DWORD(&reg->host_status);
2156 if (RD_REG_DWORD(&reg->host_int)) {
2157 stat = RD_REG_DWORD(&reg->host_status);
2254 if (RD_REG_DWORD(&reg->host_int)) {
2255 stat = RD_REG_DWORD(
[all...]
H A Dqla_init.c691 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
945 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
965 d2 = RD_REG_DWORD(&reg->ctrl_status);
968 d2 = RD_REG_DWORD(&reg->ctrl_status);
990 RD_REG_DWORD(&reg->hccr);
993 RD_REG_DWORD(&reg->hccr);
996 RD_REG_DWORD(&reg->hccr);
1743 RD_REG_DWORD(&ioreg->hccr);
4198 RD_REG_DWORD(&reg->hccr);
4200 RD_REG_DWORD(
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H A Dqla_iocb.c1857 cnt = RD_REG_DWORD(&reg->isp25mq.req_q_out);
1859 cnt = RD_REG_DWORD(&reg->isp82.req_q_out);
1861 cnt = RD_REG_DWORD(&reg->isp24.req_q_out);
2561 while (RD_REG_DWORD(ha->nxdb_rd_ptr) != dbval) {
H A Dqla_os.c1494 RD_REG_DWORD(&reg->ictrl);
1509 RD_REG_DWORD(&reg->ictrl);
4180 stat = RD_REG_DWORD(&reg->hccr);
4184 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
4188 stat = RD_REG_DWORD(&reg24->host_status);
H A Dqla_mbx.c162 if (RD_REG_DWORD(&reg->isp82.hint) &
188 if (RD_REG_DWORD(&reg->isp82.hint) &
267 ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
4022 stat = RD_REG_DWORD(&reg->host_status);
4033 RD_REG_DWORD(&reg->hccr);
H A Dqla_def.h109 #define RD_REG_DWORD(addr) readl(addr) macro

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