Searched refs:SDLC (Results 1 - 11 of 11) sorted by relevance
/drivers/net/hamradio/ |
H A D | z8530.h | 57 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 78 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 90 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 99 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 101 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 118 #define LOOPMODE 2 /* SDLC Loop mode */ 119 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 196 #define END_FR 0x80 /* End of Frame (SDLC) */ 224 /* Write Register 7' (SDLC/HDL [all...] |
H A D | dmascc.c | 501 /* Determine type of chip by enabling SDLC/HDLC enhancements */ 761 /* X1 clock, SDLC mode */ 762 write_scc(priv, R4, SDLC | X1CLK); 769 /* SDLC address field */ 771 /* SDLC flag */
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H A D | scc.c | 799 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ 803 wr(scc,R6,0); /* SDLC address zero (not used) */ 804 wr(scc,R7,FLAG); /* SDLC flag value */ 859 or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */
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/drivers/tty/serial/ |
H A D | zs.h | 109 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 131 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 143 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 153 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 155 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 173 #define LOOPMODE 2 /* SDLC Loop mode */ 174 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 218 #define WR7P_EN 1 /* WR7 Prime SDLC Feature Enable */ 252 #define END_FR 0x80 /* End of Frame (SDLC) */ [all...] |
H A D | ip22zilog.h | 90 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 112 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 125 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 135 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 137 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 154 #define LOOPMODE 2 /* SDLC Loop mode */ 155 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 232 #define END_FR 0x80 /* End of Frame (SDLC) */
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H A D | sunzilog.h | 82 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 104 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 117 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 127 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 129 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 132 #define AUTO_TxFLAG 1 /* Automatic Tx SDLC Flag */ 156 #define LOOPMODE 2 /* SDLC Loop mode */ 157 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 236 #define END_FR 0x80 /* End of Frame (SDLC) */ [all...] |
H A D | pmac_zilog.h | 179 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 202 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 215 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 225 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 227 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 247 #define LOOPMODE 2 /* SDLC Loop mode */ 248 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 294 #define ENSTFIFO 4 /* Enable status FIFO (SDLC) */ 327 #define END_FR 0x80 /* End of Frame (SDLC) */ [all...] |
/drivers/net/wan/ |
H A D | z85230.h | 78 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 99 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 111 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 120 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 122 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 139 #define LOOPMODE 2 /* SDLC Loop mode */ 140 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 219 #define END_FR 0x80 /* End of Frame (SDLC) */
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H A D | z85230.c | 218 4, SYNC_ENAB|SDLC|X1CLK, 243 4, SYNC_ENAB|SDLC|X1CLK,
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/drivers/isdn/hardware/eicon/ |
H A D | pc.h | 122 #define LL_DATA_PEND 5 /* data pending indication (SDLC SHM only) */ 417 #define SDLC 4 /* sdlc, sna layer-2 */ macro
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H A D | divacapi.h | 420 #define SDLC 4 /* sdlc, sna layer-2 */ macro
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