Searched refs:mcr (Results 1 - 25 of 57) sorted by relevance

123

/drivers/mtd/nand/
H A Dtxx9ndfmc.c117 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); local
119 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_WE, TXX9_NDFMCR);
122 txx9ndfmc_write(dev, mcr, TXX9_NDFMCR);
155 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); local
157 mcr &= ~(TXX9_NDFMCR_CLE | TXX9_NDFMCR_ALE | TXX9_NDFMCR_CE);
158 mcr |= ctrl & NAND_CLE ? TXX9_NDFMCR_CLE : 0;
159 mcr |= ctrl & NAND_ALE ? TXX9_NDFMCR_ALE : 0;
161 mcr |= ctrl & NAND_NCE ? TXX9_NDFMCR_CE : 0;
163 mcr &= ~TXX9_NDFMCR_CS_MASK;
164 mcr |
191 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); local
229 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); local
[all...]
/drivers/spi/
H A Dspi-txx9.c162 u32 mcr; local
169 mcr = txx9spi_rd(c, TXx9_SPMCR);
170 if (unlikely((mcr & TXx9_SPMCR_OPMODE) == TXx9_SPMCR_ACTIVE)) {
175 mcr &= ~(TXx9_SPMCR_OPMODE | TXx9_SPMCR_SPSTP | TXx9_SPMCR_BCLR);
178 txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR);
202 txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR,
206 txx9spi_wr(c, mcr | TXx9_SPMCR_ACTIVE, TXx9_SPMCR);
284 txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR);
346 u32 mcr; local
387 mcr
[all...]
/drivers/net/wan/
H A Dn2.c171 u8 mcr = inb(io + N2_MCR); local
178 mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
184 mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
190 mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
196 mcr &= port->phy_node ? ~CLOCK_OUT_PORT1 : ~CLOCK_OUT_PORT0;
201 outb(mcr, io + N2_MCR);
215 u8 mcr = inb(io + N2_MCR) | (port->phy_node ? TX422_PORT1:TX422_PORT0); local
222 mcr &= port->phy_node ? ~DTR_PORT1 : ~DTR_PORT0; /* set DTR ON */
223 outb(mcr, io + N2_MCR);
238 u8 mcr local
[all...]
/drivers/usb/serial/
H A Dark3116.c82 __u32 mcr; /* modem contol register value */ member in struct:ark3116_private
167 priv->mcr = 0;
497 ctrl = priv->mcr;
521 * in priv->mcr is actually the one that is in the hardware
527 priv->mcr |= UART_MCR_RTS;
529 priv->mcr |= UART_MCR_DTR;
531 priv->mcr |= UART_MCR_OUT1;
533 priv->mcr |= UART_MCR_OUT2;
535 priv->mcr &= ~UART_MCR_RTS;
537 priv->mcr
[all...]
H A Dmos7720.c1823 unsigned int mcr ; local
1828 mcr = mos7720_port->shadowMCR;
1831 result = ((mcr & UART_MCR_DTR) ? TIOCM_DTR : 0) /* 0x002 */
1832 | ((mcr & UART_MCR_RTS) ? TIOCM_RTS : 0) /* 0x004 */
1848 unsigned int mcr ; local
1852 mcr = mos7720_port->shadowMCR;
1855 mcr |= UART_MCR_RTS;
1857 mcr |= UART_MCR_DTR;
1859 mcr |= UART_MCR_LOOP;
1862 mcr
1905 unsigned int mcr; local
[all...]
H A Dti_usb_3410_5052.c126 static int ti_set_mcr(struct ti_port *tport, unsigned int mcr);
857 unsigned int mcr; local
970 mcr = tport->tp_shadow_mcr;
973 mcr &= ~(TI_MCR_DTR | TI_MCR_RTS);
974 status = ti_set_mcr(tport, mcr);
990 unsigned int mcr; local
1000 mcr = tport->tp_shadow_mcr;
1003 result = ((mcr & TI_MCR_DTR) ? TIOCM_DTR : 0)
1004 | ((mcr & TI_MCR_RTS) ? TIOCM_RTS : 0)
1005 | ((mcr
1022 unsigned int mcr; local
1345 ti_set_mcr(struct ti_port *tport, unsigned int mcr) argument
[all...]
H A Dmetro-usb.c200 unsigned char mcr = METROUSB_MCR_NONE; local
207 mcr |= METROUSB_MCR_DTR;
209 mcr |= METROUSB_MCR_RTS;
218 __func__, mcr, retval);
H A Dspcp8x5.c229 u8 mcr = 0 ; local
234 mcr = (unsigned short)value;
237 mcr, 0x04, NULL, 0, 100);
625 unsigned int mcr; local
630 mcr = priv->line_control;
634 result = ((mcr & MCR_DTR) ? TIOCM_DTR : 0)
635 | ((mcr & MCR_RTS) ? TIOCM_RTS : 0)
H A Dwhiteheat.c183 __u8 mcr; /* FIXME: no locking on mcr */ member in struct:whiteheat_private
429 info->mcr = 0;
792 if (info->mcr & UART_MCR_DTR)
794 if (info->mcr & UART_MCR_RTS)
809 info->mcr |= UART_MCR_RTS;
811 info->mcr |= UART_MCR_DTR;
814 info->mcr &= ~UART_MCR_RTS;
816 info->mcr &= ~UART_MCR_DTR;
818 firm_set_dtr(port, info->mcr
[all...]
/drivers/net/can/
H A Dflexcan.c154 u32 mcr; /* 0x00 */ member in struct:flexcan_regs
242 reg = flexcan_read(&regs->mcr);
244 flexcan_write(reg, &regs->mcr);
254 reg = flexcan_read(&regs->mcr);
256 flexcan_write(reg, &regs->mcr);
656 netdev_dbg(dev, "%s: mcr=0x%08x ctrl=0x%08x\n", __func__,
657 flexcan_read(&regs->mcr), flexcan_read(&regs->ctrl));
678 flexcan_write(FLEXCAN_MCR_SOFTRST, &regs->mcr);
681 reg_mcr = flexcan_read(&regs->mcr);
683 netdev_err(dev, "Failed to softreset can module (mcr
[all...]
/drivers/i2c/busses/
H A Di2c-nomadik.c282 u32 mcr = 0; local
285 mcr |= GEN_MASK(1, I2C_MCR_AM, 12);
286 mcr |= GEN_MASK(dev->cli.slave_adr, I2C_MCR_A7, 1);
289 mcr |= GEN_MASK(0, I2C_MCR_SB, 11);
293 mcr |= GEN_MASK(I2C_WRITE, I2C_MCR_OP, 0);
295 mcr |= GEN_MASK(I2C_READ, I2C_MCR_OP, 0);
299 mcr |= GEN_MASK(1, I2C_MCR_STOP, 14);
301 mcr &= ~(GEN_MASK(1, I2C_MCR_STOP, 14));
303 mcr |= GEN_MASK(dev->cli.count, I2C_MCR_LENGTH, 15);
305 return mcr;
392 u32 mcr; local
468 u32 mcr; local
[all...]
/drivers/tty/serial/8250/
H A D8250.h26 unsigned char mcr; member in struct:uart_8250_port
/drivers/tty/serial/
H A Dpxa.c54 unsigned char mcr; member in struct:uart_pxa_port
304 unsigned char mcr = 0; local
307 mcr |= UART_MCR_RTS;
309 mcr |= UART_MCR_DTR;
311 mcr |= UART_MCR_OUT1;
313 mcr |= UART_MCR_OUT2;
315 mcr |= UART_MCR_LOOP;
317 mcr |= up->mcr;
319 serial_out(up, UART_MCR, mcr);
[all...]
H A Domap-serial.c473 unsigned char mcr = 0; local
477 mcr |= UART_MCR_RTS;
479 mcr |= UART_MCR_DTR;
481 mcr |= UART_MCR_OUT1;
483 mcr |= UART_MCR_OUT2;
485 mcr |= UART_MCR_LOOP;
488 up->mcr = serial_in(up, UART_MCR);
489 up->mcr |= mcr;
490 serial_out(up, UART_MCR, up->mcr);
[all...]
H A Dserial_ks8695.c298 unsigned int mcr; local
300 mcr = UART_GET_MCR(port);
302 mcr |= URMC_URRTS;
304 mcr &= ~URMC_URRTS;
307 mcr |= URMC_URDTR;
309 mcr &= ~URMC_URDTR;
311 UART_PUT_MCR(port, mcr);
H A Dmfd.c74 unsigned char mcr; member in struct:uart_hsu_port
718 unsigned char mcr = 0; local
721 mcr |= UART_MCR_RTS;
723 mcr |= UART_MCR_DTR;
725 mcr |= UART_MCR_OUT1;
727 mcr |= UART_MCR_OUT2;
729 mcr |= UART_MCR_LOOP;
731 mcr |= up->mcr;
733 serial_out(up, UART_MCR, mcr);
[all...]
/drivers/pcmcia/
H A Dpxa2xx_sharpsl.c115 unsigned short cpr, ncpr, ccr, nccr, mcr, nmcr, imr, nimr; local
133 nmcr = (mcr = read_scoop_reg(scoop, SCOOP_MCR)) & ~0x0010;
164 if (mcr != nmcr)
/drivers/staging/serqt_usb2/
H A Dserqt_usb2.c659 __u8 mcr = 0; local
665 mcr = SERIAL_MCR_RTS;
669 mcr = 0;
672 MOUT_Value = mcr << 8;
1382 u8 mcr; local
1392 BoxGetRegister(port->serial, index, MODEM_CONTROL_REGISTER, &mcr);
1401 result = ((mcr & SERIAL_MCR_DTR) ? TIOCM_DTR : 0)
1403 | ((mcr & SERIAL_MCR_RTS) ? TIOCM_RTS : 0)
1425 u8 mcr; local
1433 BoxGetRegister(port->serial, index, MODEM_CONTROL_REGISTER, &mcr);
[all...]
/drivers/staging/comedi/drivers/
H A Dmite.c397 unsigned int chor, chcr, mcr, dcr, lkcr; local
434 mcr = CR_RL(64) | CR_ASEQUP;
437 mcr |= CR_PSIZE8;
440 mcr |= CR_PSIZE16;
443 mcr |= CR_PSIZE32;
450 writel(mcr, mite->mite_io_addr + MITE_MCR(mite_chan->channel));
/drivers/dma/
H A Dtxx9dmac.c679 u32 mcr; local
682 mcr = dma_readl(ddev, MCR);
683 dev_vdbg(ddev->chan[0]->dma.dev, "tasklet: mcr=%x\n", mcr);
685 if ((mcr >> (24 + i)) & 0x11) {
1209 u32 mcr; local
1246 mcr = TXX9_DMA_MCR_MSTEN | MCR_LE;
1248 mcr |= TXX9_DMA_MCR_FIFUM(pdata->memcpy_chan);
1249 dma_writel(ddev, MCR, mcr);
1286 u32 mcr; local
[all...]
/drivers/gpu/drm/gma500/
H A Dcdv_device.c187 int mcr = (0x10<<24) | (port << 16) | (offset << 8); local
190 pci_write_config_dword(pci_root, 0xD0, mcr);
198 int mcr = (0x11<<24) | (port << 16) | (offset << 8) | 0xF0; local
201 pci_write_config_dword(pci_root, 0xD0, mcr);
H A Dpsb_drv.h898 int mcr = (0xD0<<24) | (port << 16) | (offset << 8); local
901 pci_write_config_dword(pci_root, 0xD0, mcr);
908 int mcr = (0xE0<<24) | (port << 16) | (offset << 8) | 0xF0; local
911 pci_write_config_dword(pci_root, 0xD0, mcr);
916 int mcr = (0x10<<24) | (port << 16) | (offset << 8); local
919 pci_write_config_dword(pci_root, 0xD0, mcr);
926 int mcr = (0x11<<24) | (port << 16) | (offset << 8) | 0xF0; local
929 pci_write_config_dword(pci_root, 0xD0, mcr);
/drivers/usb/otg/
H A Dmv_otg.h133 u32 mcr; /* Mux Control */ member in struct:mv_otg_regs
/drivers/sn/
H A Dioc3.c42 unsigned mcr; local
45 mcr = readl(&idd->vma->mcr);
46 } while (!(mcr & 2));
48 return mcr & 1;
57 writel(mcr_pack(500, 65), &idd->vma->mcr);
72 writel(mcr_pack(6, 13), &idd->vma->mcr);
84 writel(mcr_pack(6, 110), &idd->vma->mcr);
86 writel(mcr_pack(80, 30), &idd->vma->mcr);
/drivers/video/
H A Dcg14.c101 u8 mcr; /* Master Control Reg */ member in struct:cg14_regs
211 val = sbus_readb(&regs->mcr);
213 sbus_writeb(val, &regs->mcr);
314 cur_mode = sbus_readb(&regs->mcr);
335 sbus_writeb(cur_mode, &regs->mcr);

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