Searched refs:registers (Results 1 - 25 of 45) sorted by relevance

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/drivers/media/radio/si470x/
H A Dradio-si470x-i2c.c108 radio->registers[regnr] = __be16_to_cpu(buf[READ_INDEX(regnr)]);
127 buf[i] = __cpu_to_be16(radio->registers[WRITE_INDEX(i)]);
142 * si470x_get_all_registers - read entire registers
157 radio->registers[i] = __be16_to_cpu(buf[READ_INDEX(i)]);
200 radio->registers[SYSCONFIG1] |= SYSCONFIG1_RDSIEN;
201 radio->registers[SYSCONFIG1] |= SYSCONFIG1_STCIEN;
202 radio->registers[SYSCONFIG1] &= ~SYSCONFIG1_GPIO2;
203 radio->registers[SYSCONFIG1] |= 0x1 << 2;
280 if (radio->registers[STATUSRSSI] & STATUSRSSI_STC)
284 if ((radio->registers[SYSCONFIG
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H A Dradio-si470x-common.c171 radio->registers[CHANNEL] &= ~CHANNEL_CHAN;
172 radio->registers[CHANNEL] |= CHANNEL_TUNE | chan;
194 } while (((radio->registers[STATUSRSSI] & STATUSRSSI_STC) == 0)
198 if ((radio->registers[STATUSRSSI] & STATUSRSSI_STC) == 0)
206 radio->registers[CHANNEL] &= ~CHANNEL_TUNE;
224 switch ((radio->registers[SYSCONFIG2] & SYSCONFIG2_SPACE) >> 4) {
237 switch ((radio->registers[SYSCONFIG2] & SYSCONFIG2_BAND) >> 6) {
251 chan = radio->registers[READCHAN] & READCHAN_READCHAN;
269 switch ((radio->registers[SYSCONFIG2] & SYSCONFIG2_SPACE) >> 4) {
282 switch ((radio->registers[SYSCONFIG
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H A Dradio-si470x-usb.c95 /* Reports 1-16 give direct read/write access to the 16 Si470x registers */
106 /* Report 18 is used to send the lowest 6 Si470x registers up the HID */
265 radio->registers[regnr] = get_unaligned_be16(&buf[1]);
280 put_unaligned_be16(radio->registers[regnr], &buf[1]);
294 * si470x_get_all_registers - read entire registers
308 radio->registers[regnr] = get_unaligned_be16(
420 if ((radio->registers[SYSCONFIG1] & SYSCONFIG1_RDS) == 0)
424 /* Update RDS registers with URB data */
426 radio->registers[STATUSRSSI + regnr] =
430 if ((radio->registers[STATUSRSS
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H A Dradio-si470x.h149 /* Silabs internal registers (0..15) */
150 unsigned short registers[RADIO_REGISTER_NUM]; member in struct:si470x_device
/drivers/media/video/cpia2/
H A Dcpia2_core.c248 cmd.buffer.registers[0].index = CPIA2_VC_ST_CTRL;
249 cmd.buffer.registers[0].value = CPIA2_VC_ST_CTRL_SRC_VC |
251 cmd.buffer.registers[1].index = CPIA2_VC_ST_CTRL;
252 cmd.buffer.registers[1].value = CPIA2_VC_ST_CTRL_SRC_VC |
261 cmd.buffer.registers[0].index =
263 cmd.buffer.registers[1].index =
265 cmd.buffer.registers[0].value = CPIA2_SYSTEM_CONTROL_CLEAR_ERR;
266 cmd.buffer.registers[1].value =
373 cmd.buffer.registers[0].index = CPIA2_VC_VC_TARGET_KB;
374 cmd.buffer.registers[
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H A Dcpia2_usb.c399 * Write the isoc registers according to the alternate selected
542 u8 request, u8 * registers, u16 start, size_t size)
544 if (!registers || size <= 0)
553 registers, /* buffer */
564 u8 request, u8 * registers, u16 start, size_t size)
566 if (!registers || size <= 0)
575 registers, /* buffer */
586 void *registers,
597 if (!registers) {
603 err = read_packet(udev, request, (u8 *)registers, star
541 write_packet(struct usb_device *udev, u8 request, u8 * registers, u16 start, size_t size) argument
563 read_packet(struct usb_device *udev, u8 request, u8 * registers, u16 start, size_t size) argument
585 cpia2_usb_transfer_cmd(struct camera_data *cam, void *registers, u8 request, u8 start, u8 count, u8 direction) argument
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H A Dcpia2.h254 struct cpia2_register registers[32]; member in union:cpia2_command::reg_types
305 u8 hphase; /* scaling registers */
464 int cpia2_usb_transfer_cmd(struct camera_data *cam, void *registers,
/drivers/net/ethernet/sfc/
H A Dselftest.h41 int registers; member in struct:efx_self_tests
/drivers/staging/comedi/drivers/
H A Dcb_pcimdda.c111 and DIO registers */
112 int reg_sz; /* number of bytes of registers in io region */
161 unsigned long registers; /* set by probe */ member in struct:board_private_struct
264 * o sets dev->private->registers
383 if (devpriv->registers)
402 unsigned long offset = devpriv->registers + chan * 2;
431 channels, then READing off one of the AO registers to initiate the
443 inw(devpriv->registers + chan * 2);
468 * o sets dev->private->registers
477 unsigned long registers; local
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/drivers/char/agp/
H A Damd-k7-agp.c31 volatile u8 __iomem *registers; member in struct:_amd_irongate_private
215 if (!amd_irongate_private.registers) {
216 /* Get the memory mapped registers */
219 amd_irongate_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
220 if (!amd_irongate_private.registers)
225 writel(agp_bridge->gatt_bus_addr, amd_irongate_private.registers+AMD_ATTBASE);
226 readl(amd_irongate_private.registers+AMD_ATTBASE); /* PCI Posting. */
235 enable_reg = readw(amd_irongate_private.registers+AMD_GARTENABLE);
237 writew(enable_reg, amd_irongate_private.registers+AMD_GARTENABLE);
238 readw(amd_irongate_private.registers
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H A Dsworks-agp.c23 /* Memory mapped registers */
38 volatile u8 __iomem *registers; member in struct:_serverworks_private
239 writeb(1, serverworks_private.registers+SVWRKS_POSTFLUSH);
241 while (readb(serverworks_private.registers+SVWRKS_POSTFLUSH) == 1) {
250 writel(1, serverworks_private.registers+SVWRKS_DIRFLUSH);
252 while (readl(serverworks_private.registers+SVWRKS_DIRFLUSH) == 1) {
271 /* Get the memory mapped registers */
274 serverworks_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
275 if (!serverworks_private.registers) {
280 writeb(0xA, serverworks_private.registers
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H A Dintel-gtt.c67 u8 __iomem *registers; member in struct:_intel_private
185 intel_private.registers = ioremap(reg_addr, KB(64));
186 if (!intel_private.registers)
190 intel_private.registers+I810_PGETBL_CTL);
194 if ((readl(intel_private.registers+I810_DRAM_CTL)
206 writel(0, intel_private.registers+I810_PGETBL_CTL);
369 rdct = readb(intel_private.registers+I830_RDRAM_CHANNEL_TYPE);
498 pgetbl_ctl2 = readl(intel_private.registers+I965_PGETBL_CTL2);
500 writel(pgetbl_ctl2, intel_private.registers+I965_PGETBL_CTL2);
503 pgetbl_ctl = readl(intel_private.registers
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H A Dati-agp.c50 volatile u8 __iomem *registers; member in struct:_ati_generic_private
172 writel(1, ati_generic_private.registers+ATI_GART_CACHE_CNTRL);
173 readl(ati_generic_private.registers+ATI_GART_CACHE_CNTRL); /* PCI Posting. */
193 iounmap((volatile u8 __iomem *)ati_generic_private.registers);
201 /* Get the memory mapped registers */
204 ati_generic_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
206 if (!ati_generic_private.registers)
220 writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID);
221 readl(ati_generic_private.registers+ATI_GART_FEATURE_ID); /* PCI Posting.*/
228 writel(agp_bridge->gatt_bus_addr, ati_generic_private.registers
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/drivers/usb/storage/
H A Dshuttle_usbat.c100 /* USBAT ATA registers */
113 /* USBAT User I/O Data registers */
124 /* USBAT User I/O Enable registers */
343 * Stores critical information in internal registers in preparation for the execution
388 * registers where the byte count should be read for transferring the data.
521 unsigned char *registers,
562 * Write to multiple registers
598 data[j<<1] = registers[j];
677 * Write to multiple registers:
678 * Allows us to write specific data to any registers
519 usbat_hp8200e_rw_block_test(struct us_data *us, unsigned char access, unsigned char *registers, unsigned char *data_out, unsigned short num_registers, unsigned char data_reg, unsigned char status_reg, unsigned char timeout, unsigned char qualifier, int direction, void *buf, unsigned short len, int use_sg, int minutes) argument
683 usbat_multiple_write(struct us_data *us, unsigned char *registers, unsigned char *data_out, unsigned short num_registers) argument
1058 unsigned char registers[3] = { local
1116 unsigned char registers[7] = { local
1207 unsigned char registers[7] = { local
1292 usbat_hp8200e_handle_read10(struct us_data *us, unsigned char *registers, unsigned char *data, struct scsi_cmnd *srb) argument
1562 unsigned char registers[32]; local
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/drivers/firewire/
H A Dinit_ohci1394_dma.c50 void __iomem *registers; member in struct:ohci
55 writel(data, ohci->registers + offset);
60 return readl(ohci->registers + offset);
224 /* Accessing some registers without LPS enabled may cause lock up */
245 * init_ohci1394_controller - Map the registers of the controller and init DMA
246 * This maps the registers of the specified controller and initializes it
261 ohci.registers = (void __iomem *)fix_to_virt(FIX_OHCI1394_BASE);
H A Dnosy.c81 __iomem char *registers; member in struct:pcilynx
228 writel(data, lynx->registers + offset);
234 return readl(lynx->registers + offset);
525 iounmap(lynx->registers);
563 lynx->registers = ioremap_nocache(pci_resource_start(dev, 0),
677 iounmap(lynx->registers);
/drivers/scsi/aic7xxx/aicasm/
H A Daicasm_symbol.c467 * Sort the registers by address with a simple insertion sort.
471 symlist_t registers; local
488 SLIST_INIT(&registers);
503 symlist_add(&registers, cursym, SYMLIST_SORT);
540 SLIST_FOREACH(curnode, &registers, links) {
588 regnode = symlist_search(&registers, regname);
600 regnode = symlist_search(&registers, regname);
605 while (SLIST_FIRST(&registers) != NULL) {
611 curnode = SLIST_FIRST(&registers);
612 SLIST_REMOVE_HEAD(&registers, link
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/drivers/scsi/
H A Dscript_asm.pl35 # Programmer's guide, with the new instructions, registers, etc.
104 %registers = (
124 %registers = (
169 $register = join ('|', keys %registers);
184 %symbol_values = (%registers) ; # Traditional symbol table
600 ($registers{$dst_reg} << 16);
603 ($registers{$src_reg} << 16);
606 ($registers{$dst_reg} << 16);
609 "$0 : Illegal combination of registers in line $lineno : $_
610 Either source and destination registers mus
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/drivers/spi/
H A Dspi-s3c24xx-fiq.S26 @ setup the calling registers.
28 @ fiq_rirq The base of the IRQ registers to find S3C2410_SRCPND
/drivers/base/regmap/
H A Dregcache-rbtree.c30 /* block of adjacent registers */
32 /* number of registers available in the block */
108 /* base and top registers of the current rbnode */
140 int registers = 0; local
153 registers += top - base + 1;
157 average = registers / nodes;
161 seq_printf(s, "%d nodes, %d registers, average %d registers\n",
162 nodes, registers, average);
346 * registers ge
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/drivers/mfd/
H A Dwm8994-irq.c24 #include <linux/mfd/wm8994/registers.h>
/drivers/media/video/
H A Dtvaudio.c75 int registers; /* # of registers */ member in struct:CHIPDESC
793 * - carrier 1 freq. registers (3 bytes)
794 * - carrier 2 freq. registers (3 bytes)
797 * Note: frequency registers must be written in single i2c transfer.
841 /* error limit registers (NLELR and NUELR) to some greater values. */
1155 /* values for those registers: */
1169 /* values for those registers: */
1209 /* values for those registers: */
1256 /* the registers o
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/drivers/net/ethernet/dec/tulip/
H A DKconfig71 bool "Use PCI shared mem for NIC registers"
74 Use PCI shared memory for the NIC registers, rather than going through
/drivers/gpio/
H A Dgpio-wm8994.c26 #include <linux/mfd/wm8994/registers.h>
/drivers/regulator/
H A Dwm8994-regulator.c25 #include <linux/mfd/wm8994/registers.h>

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