Searched refs:vblank (Results 1 - 24 of 24) sorted by relevance

/drivers/video/matrox/
H A Dmatroxfb_crtc2.c402 static int matroxfb_dh_get_vblank(const struct matroxfb_dh_fb_info* m2info, struct fb_vblank* vblank) { argument
406 memset(vblank, 0, sizeof(*vblank));
407 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VBLANK;
409 vblank->vcount = mga_inl(0x3C48) & 0x000007FF;
411 if (vblank->vcount >= m2info->fbcon.var.yres)
412 vblank->flags |= FB_VBLANK_VBLANKING;
414 vblank->flags |= FB_VBLANK_HAVE_COUNT;
417 vblank->count = minfo->crtc2.vsync.cnt;
434 struct fb_vblank vblank; local
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H A Dmatroxfb_base.c848 struct fb_vblank *vblank)
853 memset(vblank, 0, sizeof(*vblank));
854 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
857 vblank->vcount = mga_inl(M_VCOUNT);
862 vblank->flags |= FB_VBLANK_HBLANKING;
864 vblank->flags |= FB_VBLANK_VSYNCING;
865 if (vblank->vcount >= minfo->fbcon.var.yres)
866 vblank->flags |= FB_VBLANK_VBLANKING;
868 vblank
847 matroxfb_get_vblank(struct matrox_fb_info *minfo, struct fb_vblank *vblank) argument
895 struct fb_vblank vblank; local
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/drivers/gpu/drm/i915/
H A Dintel_crt.c318 uint32_t vblank, vblank_start, vblank_end; local
340 vblank = I915_READ(vblank_reg);
345 vblank_start = (vblank & 0xfff) + 1;
346 vblank_end = ((vblank >> 16) & 0xfff) + 1;
408 /* restore vblank if necessary */
410 I915_WRITE(vblank_reg, vblank);
H A Di915_irq.c163 DRM_DEBUG_DRIVER("trying to get vblank count for disabled "
193 DRM_DEBUG_DRIVER("trying to get vblank count for disabled "
242 /* Query vblank area. */
245 /* Test position against vblank region. */
252 /* Inside "upper part" of vblank area? Apply corrective offset: */
260 /* In vblank? */
1247 /* Ignore early vblank irqs */
1288 int vblank = 0; local
1382 vblank++;
1541 /* maintain vblank deliver
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H A Dintel_display.c710 * intel_wait_for_vblank - wait for vblank on a given pipe
714 * Wait for vblank to occur on a given pipe. Needed for various bits of
722 /* Clear existing vblank status. Note this will clear any other
726 * that either function could miss a vblank event. Here it is not
727 * fatal, as we will either wait upon the next vblank interrupt or
732 * Currently, the result of us stealing a vblank from the irq
738 /* Wait for vblank interrupt bit to set */
742 DRM_DEBUG_KMS("vblank wait timed out\n");
750 * After disabling a pipe, we can't wait for vblank in the usual way,
751 * spinning on the vblank interrup
9369 u32 vblank; member in struct:intel_display_error_state::intel_pipe_error_state
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/drivers/video/
H A Dfbmon.c1089 u32 vblank; member in struct:__fb_timings
1099 * vblank = right_margin + vsync_len + left_margin
1111 u32 vblank; local
1113 vblank = (hfreq * FLYBACK)/1000;
1114 vblank = (vblank + 500)/1000;
1115 return (vblank + V_FRONTPORCH);
1218 timings->vblank = fb_get_vblank(timings->hfreq);
1219 timings->vtotal = timings->vactive + timings->vblank;
1228 timings->vblank
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H A Dtmiofb.c491 static int tmiofb_vblank(struct fb_info *fbi, struct fb_vblank *vblank) argument
498 vblank->vcount = vcount;
499 vblank->flags = FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_VCOUNT
503 vblank->flags |= FB_VBLANK_VSYNCING;
506 vblank->flags |= FB_VBLANK_VBLANKING;
517 struct fb_vblank vblank = {0}; local
520 tmiofb_vblank(fbi, &vblank);
521 if (copy_to_user(argp, &vblank, sizeof vblank))
H A Dps3fb.c754 static int ps3fb_get_vblank(struct fb_vblank *vblank) argument
756 memset(vblank, 0, sizeof(*vblank));
757 vblank->flags = FB_VBLANK_HAVE_VSYNC;
791 struct fb_vblank vblank; local
793 retval = ps3fb_get_vblank(&vblank);
797 if (copy_to_user(argp, &vblank, sizeof(vblank)))
H A Dsh_mobile_hdmi.c295 u16 htotal, hblank, hdelay, vtotal, vblank, vdelay, voffset; local
310 vblank = mode->lower_margin + vdelay;
326 vtotal, vblank, vdelay, mode->vsync_len, sync);
345 hdmi_write(hdmi, vblank, HDMI_EXTERNAL_V_BLANK);
/drivers/media/video/
H A Dmt9v011.c261 unsigned height, width, hblank, vblank, speed; local
269 vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
273 t_time = row_time * (height + vblank + 1);
291 unsigned height, width, hblank, vblank; local
302 vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
305 line_time = height + vblank + 1;
336 * hblank and vblank should be adjusted, in order to warrant that
H A Dmt9m001.c180 const u16 hblank = 9, vblank = 25; local
199 mt9m001->total_h = rect.height + mt9m001->y_skip_top + vblank;
204 ret = reg_write(client, MT9M001_VERTICAL_BLANKING, vblank);
461 const u16 vblank = 25; local
464 mt9m001->y_skip_top + vblank;
H A Dmt9m032.c180 unsigned int vblank; local
188 vblank = div_u64(1000000000ULL * interval->numerator,
192 if (vblank > MT9M032_VBLANK_MAX) {
199 vblank = div_u64(1000000000ULL * interval->numerator,
205 vblank = clamp_t(unsigned int, vblank, min_vblank, MT9M032_VBLANK_MAX);
207 return mt9m032_write(client, MT9M032_VBLANK, vblank);
H A Dmt9t031.c216 vblank = MT9T031_VERTICAL_BLANK; local
259 ret = reg_write(client, MT9T031_VERTICAL_BLANKING, vblank);
287 mt9t031->total_h = rect->height + mt9t031->y_skip_top + vblank;
551 const u16 vblank = MT9T031_VERTICAL_BLANK; local
553 mt9t031->y_skip_top + vblank;
H A Dmt9p031.c307 unsigned int vblank; local
354 vblank = MT9P031_VERTICAL_BLANK_DEF;
359 ret = mt9p031_write(client, MT9P031_VERTICAL_BLANK, vblank);
/drivers/gpu/drm/radeon/
H A Dradeon_encoders.c268 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; local
286 adjusted_mode->vtotal = native_mode->vdisplay + vblank;
301 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
/drivers/media/video/ivtv/
H A Divtvfb.c466 struct fb_vblank vblank; local
469 memset(&vblank, 0, sizeof(struct fb_vblank));
471 vblank.flags = FB_VBLANK_HAVE_COUNT |FB_VBLANK_HAVE_VCOUNT |
479 vblank.flags |= FB_VBLANK_VSYNCING;
480 vblank.count = itv->last_vsync_field;
481 vblank.vcount = trace;
482 vblank.hcount = 0;
483 if (copy_to_user((void __user *)arg, &vblank, sizeof(vblank)))
/drivers/media/video/cx18/
H A Dcx18-av-core.c300 int hblank, hactive, burst, vblank, vactive, sc; local
323 * 10 = vblank656 - vblank = vsync pulses + equalization pulses
326 * vblank: half lines, after line 5/317, of blanked video
333 * vblank starts counting from the after the 5 vsync pulses and
338 * handle 17 lines, not the 18 in the vblank region).
339 * In addition, we need vblank656 and vblank to be one whole
352 vblank = 38; /* lines 6 - 24 & 318 - 336 */
395 * 12 = vblank656 - vblank = vsync pulses + equalization pulses
399 * vblank: half lines, after line 9/272, of blanked video
405 * vblank start
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/drivers/video/aty/
H A Dradeon_monitor.c221 rinfo->panel_info.vblank = BIOS_IN16(tmp0+24) - BIOS_IN16(tmp0+26);
237 pr_debug(" vblank: %d\n", rinfo->panel_info.vblank);
698 rinfo->panel_info.vblank = var->upper_margin +
793 var->upper_margin = (rinfo->panel_info.vblank - rinfo->panel_info.vOver_plus
H A Datyfb.h181 struct aty_interrupt vblank; member in struct:atyfb_par
H A Datyfb_base.c1609 par->vblank.count++;
1610 if (par->vblank.pan_display) {
1611 par->vblank.pan_display = 0;
1614 wake_up_interruptible(&par->vblank.wait);
1660 if (par->vblank.pan_display) {
1661 par->vblank.pan_display = 0;
1754 par->vblank.pan_display = 1;
1756 par->vblank.pan_display = 0;
1771 vbl = &par->vblank;
2345 init_waitqueue_head(&par->vblank
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H A Dradeonfb.h259 int vOver_plus, vSync_width, vblank; member in struct:panel_info
H A Dradeon_base.c1584 vTotal = mode->yres + rinfo->panel_info.vblank;
1819 newmode->fp_crtc_v_total_disp = (rinfo->panel_info.vblank & 0xffff) |
/drivers/gpu/drm/
H A Ddrm_edid.c831 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; local
874 mode->vtotal = mode->vdisplay + vblank;
/drivers/media/video/cx25840/
H A Dcx25840-core.c775 int hblank, hactive, burst, vblank, vactive, sc; local
790 vblank = 36;
818 vblank = 26;
825 vblank = 20;
831 vblank = 26;
869 "vblank %i, vactive %i, vblank656 %i, src_dec %i, "
872 hblank, hactive, vblank, vactive, vblank656,
887 cx25840_write(client, 0x474, vblank);
889 0xff & (((vblank >> 8) & 0x3) | (vactive << 4)));

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