| /drivers/dma/ |
| H A D | dmaengine.c | 178 bitmap_and(has.bits, want->bits, device->cap_mask.bits,
232 } else if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
359 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
386 if (!dma_has_cap(cap, device->cap_mask) ||
387 dma_has_cap(DMA_PRIVATE, device->cap_mask))
437 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
472 if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
518 dma_cap_set(DMA_PRIVATE, device->cap_mask);
532 dma_cap_clear(DMA_PRIVATE, device->cap_mask);
553 dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
[all...] |
| H A D | iop-adma.c | 567 iop_chan->device->common.cap_mask))
570 iop_chan->device->common.cap_mask))
1142 if (!dma_has_cap(DMA_XOR_VAL, dma_chan->device->cap_mask))
1473 dma_dev->cap_mask = plat_data->cap_mask;
1488 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask))
1490 if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask))
1492 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
1496 if (dma_has_cap(DMA_XOR_VAL, dma_dev->cap_mask))
1499 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
[all...] |
| H A D | mv_xor.c | 1132 dma_dev->cap_mask = plat_data->cap_mask;
1148 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask))
1150 if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask))
1152 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
1200 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
1207 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
1216 dma_has_cap(DMA_XOR, dma_dev->cap_mask) ? "xor " : "",
1217 dma_has_cap(DMA_MEMSET, dma_dev->cap_mask) ? "fill " : "",
1218 dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)
[all...] |
| H A D | at_hdmac.c | 1185 /* cap_mask is a multi-u32 bitfield, fill it with proper C code. */
1262 dma_cap_set(DMA_MEMCPY, at91sam9rl_config.cap_mask);
1263 dma_cap_set(DMA_MEMCPY, at91sam9g45_config.cap_mask);
1264 dma_cap_set(DMA_SLAVE, at91sam9g45_config.cap_mask);
1286 atdma->dma_common.cap_mask = plat_dat->cap_mask;
1362 if (dma_has_cap(DMA_MEMCPY, atdma->dma_common.cap_mask))
1365 if (dma_has_cap(DMA_SLAVE, atdma->dma_common.cap_mask)) {
1368 dma_cap_set(DMA_CYCLIC, atdma->dma_common.cap_mask);
1376 dma_has_cap(DMA_MEMCPY, atdma->dma_common.cap_mask)
[all...] |
| H A D | sirf-dma.c | 621 dma_cap_set(DMA_SLAVE, dma->cap_mask);
622 dma_cap_set(DMA_CYCLIC, dma->cap_mask);
623 dma_cap_set(DMA_INTERLEAVE, dma->cap_mask);
624 dma_cap_set(DMA_PRIVATE, dma->cap_mask);
|
| H A D | ep93xx_dma.c | 1314 dma_cap_zero(dma_dev->cap_mask);
1315 dma_cap_set(DMA_SLAVE, dma_dev->cap_mask);
1316 dma_cap_set(DMA_CYCLIC, dma_dev->cap_mask);
1330 dma_cap_set(DMA_MEMCPY, dma_dev->cap_mask);
1338 dma_cap_set(DMA_PRIVATE, dma_dev->cap_mask);
|
| H A D | dmatest.c | 592 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
596 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
600 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
|
| H A D | fsldma.c | 1354 dma_cap_set(DMA_MEMCPY, fdev->common.cap_mask);
1355 dma_cap_set(DMA_INTERRUPT, fdev->common.cap_mask);
1356 dma_cap_set(DMA_SG, fdev->common.cap_mask);
1357 dma_cap_set(DMA_SLAVE, fdev->common.cap_mask);
|
| H A D | ste_dma40.c | 1827 dma_cap_mask_t cap = d40c->chan.device->cap_mask;
2678 if (dma_has_cap(DMA_SLAVE, dev->cap_mask))
2681 if (dma_has_cap(DMA_MEMCPY, dev->cap_mask)) {
2691 if (dma_has_cap(DMA_SG, dev->cap_mask))
2694 if (dma_has_cap(DMA_CYCLIC, dev->cap_mask))
2713 dma_cap_zero(base->dma_slave.cap_mask);
2714 dma_cap_set(DMA_SLAVE, base->dma_slave.cap_mask);
2715 dma_cap_set(DMA_CYCLIC, base->dma_slave.cap_mask);
2729 dma_cap_zero(base->dma_memcpy.cap_mask);
2730 dma_cap_set(DMA_MEMCPY, base->dma_memcpy.cap_mask);
[all...] |
| H A D | txx9dmac.c | 1141 dma_cap_set(DMA_MEMCPY, dc->dma.cap_mask);
1144 dma_cap_set(DMA_SLAVE, dc->dma.cap_mask);
1145 dma_cap_set(DMA_PRIVATE, dc->dma.cap_mask);
1187 dma_has_cap(DMA_MEMCPY, dc->dma.cap_mask) ? " memcpy" : "",
1188 dma_has_cap(DMA_SLAVE, dc->dma.cap_mask) ? " slave" : "");
|
| H A D | mxs-dma.c | 631 dma_cap_set(DMA_SLAVE, mxs_dma->dma_device.cap_mask);
632 dma_cap_set(DMA_CYCLIC, mxs_dma->dma_device.cap_mask);
|
| H A D | coh901318.c | 1501 dma_cap_zero(base->dma_slave.cap_mask);
1502 dma_cap_set(DMA_SLAVE, base->dma_slave.cap_mask);
1521 dma_cap_zero(base->dma_memcpy.cap_mask);
1522 dma_cap_set(DMA_MEMCPY, base->dma_memcpy.cap_mask);
|
| H A D | imx-dma.c | 1015 dma_cap_set(DMA_SLAVE, imxdma->dma_device.cap_mask);
1016 dma_cap_set(DMA_CYCLIC, imxdma->dma_device.cap_mask);
1017 dma_cap_set(DMA_MEMCPY, imxdma->dma_device.cap_mask);
1018 dma_cap_set(DMA_INTERLEAVE, imxdma->dma_device.cap_mask);
|
| H A D | intel_mid_dma.c | 1136 dma_cap_zero(dma->common.cap_mask);
1137 dma_cap_set(DMA_MEMCPY, dma->common.cap_mask);
1138 dma_cap_set(DMA_SLAVE, dma->common.cap_mask);
1139 dma_cap_set(DMA_PRIVATE, dma->common.cap_mask);
|
| H A D | pch_dma.c | 931 dma_cap_zero(pd->dma.cap_mask);
932 dma_cap_set(DMA_PRIVATE, pd->dma.cap_mask);
933 dma_cap_set(DMA_SLAVE, pd->dma.cap_mask);
|
| H A D | timb_dma.c | 732 dma_cap_set(DMA_SLAVE, td->dma.cap_mask);
733 dma_cap_set(DMA_PRIVATE, td->dma.cap_mask);
|
| H A D | pl330.c | 2958 pd->cap_mask = pdat->cap_mask;
2960 dma_cap_set(DMA_MEMCPY, pd->cap_mask);
2962 dma_cap_set(DMA_SLAVE, pd->cap_mask);
2963 dma_cap_set(DMA_CYCLIC, pd->cap_mask);
|
| H A D | dw_dmac.c | 1487 dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
1488 dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
1490 dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
|
| /drivers/pci/pcie/ |
| H A D | portdrv_core.c | 252 int cap_mask; local
258 err = pcie_port_platform_notify(dev, &cap_mask);
260 cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
263 cap_mask |= PCIE_PORT_SERVICE_AER;
271 if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) {
287 if ((cap_mask & PCIE_PORT_SERVICE_AER)
300 if ((cap_mask & PCIE_PORT_SERVICE_PME)
|
| /drivers/dma/ioat/ |
| H A D | dma_v3.c | 869 if (!dma_has_cap(DMA_XOR, dma->cap_mask))
957 if (!dma_has_cap(DMA_XOR_VAL, dma_chan->device->cap_mask))
1006 if (!dma_has_cap(DMA_MEMSET, dma_chan->device->cap_mask))
1213 dma_cap_set(DMA_INTERRUPT, dma->cap_mask);
1227 dma_cap_set(DMA_XOR, dma->cap_mask);
1230 dma_cap_set(DMA_XOR_VAL, dma->cap_mask);
1238 dma_cap_set(DMA_PQ, dma->cap_mask);
1241 dma_cap_set(DMA_PQ_VAL, dma->cap_mask);
1248 dma_cap_set(DMA_XOR, dma->cap_mask);
1251 dma_cap_set(DMA_XOR_VAL, dma->cap_mask);
[all...] |
| H A D | dma.c | 1024 dma_cap_set(DMA_MEMCPY, dma->cap_mask);
1100 dma_has_cap(DMA_PQ, dma->cap_mask) ? " pq" : "",
1101 dma_has_cap(DMA_PQ_VAL, dma->cap_mask) ? " pq_val" : "",
1102 dma_has_cap(DMA_XOR, dma->cap_mask) ? " xor" : "",
1103 dma_has_cap(DMA_XOR_VAL, dma->cap_mask) ? " xor_val" : "",
1104 dma_has_cap(DMA_MEMSET, dma->cap_mask) ? " fill" : "",
1105 dma_has_cap(DMA_INTERRUPT, dma->cap_mask) ? " intr" : "");
|
| /drivers/dma/ppc4xx/ |
| H A D | adma.c | 1651 if (dma_has_cap(cap, ref->chan->device->cap_mask)) {
4126 dma_cap_set(DMA_MEMCPY, adev->common.cap_mask);
4127 dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask);
4128 dma_cap_set(DMA_MEMSET, adev->common.cap_mask);
4129 dma_cap_set(DMA_PQ, adev->common.cap_mask);
4130 dma_cap_set(DMA_PQ_VAL, adev->common.cap_mask);
4131 dma_cap_set(DMA_XOR_VAL, adev->common.cap_mask);
4134 dma_cap_set(DMA_XOR, adev->common.cap_mask);
4135 dma_cap_set(DMA_PQ, adev->common.cap_mask);
4136 dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask);
[all...] |
| /drivers/net/ethernet/mellanox/mlx4/ |
| H A D | fw.h | 186 u32 cap_mask; member in struct:mlx4_set_ib_param
|
| /drivers/infiniband/hw/mthca/ |
| H A D | mthca_cmd.h | 241 u32 cap_mask; member in struct:mthca_set_ib_param
|
| /drivers/infiniband/hw/mlx4/ |
| H A D | main.c | 456 u32 cap_mask)
470 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
473 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
487 u32 cap_mask; local
496 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
501 cap_mask);
455 mlx4_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols, u32 cap_mask) argument
|