/arch/m32r/lib/ |
H A D | ashxdi3.S | 10 ; input r2 shift val 23 cmpz r2 || ldi r3, #32 24 jc r14 || cmpu r2, r3 28 addi r2, #-32 29 sra r1, r2 33 mv r3, r0 || srl r1, r2 34 sra r0, r2 || neg r2, r2 35 sll r3, r2 [all...] |
H A D | memcpy.S | 11 * n : r2 24 or r7, r1 || cmpz r2 25 jc r14 || cmpeq r0, r1 ; return if r2=0 30 srl3 r3, r2, #2 31 and3 r2, r2, #3 36 st r7, @+r4 || cmpz r2 38 addi r4, #4 || jc r14 ; return if r2=0 42 addi r2, #-1 || stb r7, @r4+ 43 bnez r2, byte_cop [all...] |
H A D | checksum.S | 57 ; r2: unsigned int sum 59 push r2 || ldi r2, #0 66 ldi r3, #0 || addx r2, r4 67 addx r2, r3 80 addx r2, r4 || addi r0, #2 81 addx r2, r3 93 ld r3, @r0+ || addx r2, r3 ; +12 94 ld r4, @r0+ || addx r2, r4 ; +16 95 ld r5, @r0+ || addx r2, r [all...] |
H A D | memset.S | 11 * len: r2 23 mv r4, r0 || cmpz r2 25 cmpui r2, #16 27 cmpui r2, #4 36 addi r2, #-1 || addi r3, #-1 38 cmpui r2, #4 45 or r1, r3 || addi r2, #-4 47 st r1, @+r4 || addi r2, #-4 48 bgtz r2, word_set_loop 49 bnez r2, byte_set_wra [all...] |
/arch/cris/boot/rescue/ |
H A D | testrescue.S | 15 moveq -1, $r2 16 move.b $r2, [R_PORT_PA_DIR] 17 moveq 0, $r2 18 move.b $r2, [R_PORT_PA_DATA]
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/arch/arm/lib/ |
H A D | call_with_stack.S | 31 str sp, [r2, #-4]! 32 str lr, [r2, #-4]! 34 mov sp, r2 35 mov r2, r0 39 mov pc, r2
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H A D | strchr.S | 19 1: ldrb r2, [r0], #1 20 teq r2, r1 21 teqne r2, #0 23 teq r2, r1
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H A D | strrchr.S | 19 1: ldrb r2, [r0], #1 20 teq r2, r1 22 teq r2, #0
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H A D | memzero.S | 24 strltb r2, [r0], #1 @ 1 25 strleb r2, [r0], #1 @ 1 26 strb r2, [r0], #1 @ 1 34 mov r2, #0 @ 1 50 mov ip, r2 @ 1 51 mov lr, r2 @ 1 54 stmgeia r0!, {r2, r3, ip, lr} @ 4 55 stmgeia r0!, {r2, r3, ip, lr} @ 4 56 stmgeia r0!, {r2, r3, ip, lr} @ 4 57 stmgeia r0!, {r2, r [all...] |
H A D | findbit.S | 27 mov r2, #0 29 ARM( ldrb r3, [r0, r2, lsr #3] ) 30 THUMB( lsr r3, r2, #3 ) 34 add r2, r2, #8 @ next bit pointer 35 2: cmp r2, r1 @ any more? 48 ands ip, r2, #7 50 ARM( ldrb r3, [r0, r2, lsr #3] ) 51 THUMB( lsr r3, r2, #3 ) 56 orr r2, r [all...] |
H A D | io-writesl.S | 14 teq r2, #0 @ do we have to check for the zero len? 19 subs r2, r2, #4 23 subs r2, r2, #4 30 2: movs r2, r2, lsl #31 46 subs r2, r2, #1 54 subs r2, r [all...] |
H A D | io-writesw-armv4.S | 29 sub r2, r2, #1 33 teq r2, #0 40 subs r2, r2, #8 44 subs r2, r2, #8 51 .Lno_outsw_8: tst r2, #4 58 .Lno_outsw_4: movs r2, r2, ls [all...] |
H A D | bitops.h | 9 mov r2, #1 13 mov r3, r2, lsl r3 variable 14 1: ldrex r2, [r1] variable 15 \instr r2, r2, r3 variable 16 strex r0, r2, [r1] variable 29 mov r2, #1 33 mov r3, r2, lsl r3 @ create mask variable 35 1: ldrex r2, [r1] variable 36 ands r0, r2, r variable 37 \\instr r2, r2, r3 @ toggle bit variable 38 strex ip, r2, [r1] variable [all...] |
H A D | getuser.S | 20 * r2, r3 contains the zero-extended value 34 1: TUSER(ldrb) r2, [r0] 41 2: TUSER(ldrb) r2, [r0] 44 2: TUSER(ldrb) r2, [r0], #1 48 orr r2, r2, r3, lsl #8 50 orr r2, r3, r2, lsl #8 57 4: TUSER(ldr) r2, [r0] 63 mov r2, # [all...] |
/arch/sh/lib64/ |
H A D | copy_page.S | 13 r2 : destination effective address (start of page) 33 /* Copy 4096 bytes worth of data from r3 to r2. 49 alloco r2, 0x00 51 alloco r2, 0x20 55 add r2, r6, r6 58 sub r3, r2, r60 70 bge/u r2, r6, tr2 ! skip prefetch for last 4 lines 71 ldx.q r2, r22, r63 ! prefetch 4 lines hence 74 bge/u r2, r7, tr3 ! skip alloco for last 2 lines 75 alloco r2, [all...] |
/arch/arm/plat-s5p/ |
H A D | sleep.S | 58 ldr r2, [r1, #L2X0_CTRL] 59 tst r2, #0x1 61 ldr r2, [r0, #L2X0_R_AUX_CTRL] 62 str r2, [r1, #L2X0_AUX_CTRL] 63 ldr r2, [r0, #L2X0_R_TAG_LATENCY] 64 str r2, [r1, #L2X0_TAG_LATENCY_CTRL] 65 ldr r2, [r0, #L2X0_R_DATA_LATENCY] 66 str r2, [r1, #L2X0_DATA_LATENCY_CTRL] 67 ldr r2, [r0, #L2X0_R_PREFETCH_CTRL] 68 str r2, [r [all...] |
/arch/s390/kernel/ |
H A D | compat_wrapper.S | 13 lgfr %r2,%r2 # int 17 llgfr %r2,%r2 # unsigned int 23 llgfr %r2,%r2 # unsigned int 29 llgtr %r2,%r2 # const char * 35 llgfr %r2,%r2 # unsigne [all...] |
H A D | mcount.S | 22 stm %r2,%r5,16(%r15) 26 2: l %r2,1b-0b(%r1) 27 icm %r2,0xf,0(%r2) 33 la %r2,0(%r14) 40 l %r2,100(%r15) 47 0: st %r2,100(%r15) 51 3: lm %r2,%r5,16(%r15) 57 stm %r2,%r5,16(%r15) 64 0: l %r2, [all...] |
/arch/sh/lib/ |
H A D | __clear_user.S | 21 mov r4, r2 26 add #31, r2 27 and r1, r2 28 cmp/eq r4, r2 30 mov r2, r3 33 mov r4, r2 36 0: mov.b r0, @r2 38 add #1, r2 41 mov r2, r4 46 cmp/hi r2, r [all...] |
H A D | div64.S | 18 mov #0, r2 20 mov r1, r2 24 rotcl r2 27 rotcl r2 28 mul.l r6, r2 38 mov r2, r1 45 mov r2, r0
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/arch/unicore32/lib/ |
H A D | delay.S | 27 ldw r2, .LC1 28 mul r0, r2, r0 30 ldw r2, .LC0 31 ldw r2, [r2] @ max = 0x01ffffff 33 mov r2, r2 >> #10 @ max = 0x00007fff 34 mul r0, r2, r0 @ max = 2^32-1
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/arch/hexagon/lib/ |
H A D | memset.S | 42 p0 = cmp.eq(r2, #0) 43 p1 = cmp.gtu(r2, #7) 60 loop0(1f, r2) /* byte loop */ 72 p1 = cmp.eq(r2, #1) 85 p1 = cmp.eq(r2, #2) 97 p0 = cmp.gtu(r2, #7) 98 p1 = cmp.eq(r2, #4) 104 p0 = cmp.gtu(r2, #11) 110 r10 = lsr(r2, #3) 127 p1 = cmp.eq(r2, # 197 r2 = add(r2,#-1) define 207 r2 = add(r2,#-2) define 218 r2 = add(r2,#-4) define 232 r2 = add(r2,#-8) define 238 r2 = add(r2,#-8) define 244 r2 = add(r2,#-8) define 261 r2 = add(r2,#-32) define 274 r2 = add(r2,#-8) define 282 r2 = add(r2,#-4) define 291 r2 = add(r2,#-2) define 306 r2 = add(r2,#-32) define [all...] |
/arch/ia64/kvm/ |
H A D | trampoline.S | 17 add r2 = CTX(B0),r32; \ 22 st8 [r2]=r16,16; \ 28 st8 [r2]=r16,16; \ 34 st8 [r2]=r16; \ 42 add r2 = CTX(B0),r33; \ 45 ld8 r16=[r2],16; \ 51 ld8 r16=[r2],16; \ 57 ld8 r16=[r2]; \ 71 add r2=CTX(R4),r32; \ 75 st8.spill [r2] [all...] |
/arch/hexagon/mm/ |
H A D | copy_from_user.S | 44 #define bytes r2 52 /* Alignment loop. r2 has been updated. Return it. */ 58 r0 = r2 67 r2 += sub(src_sav,src) 70 r0 = r2 77 r2 += sub(src_sav,src) 80 r0 = r2 87 r2 += sub(src_sav,src) 90 r0 = r2 97 r2 [all...] |
/arch/hexagon/kernel/ |
H A D | head.S | 60 r2.H = #0xffc0 61 r2.L = #0x0000 62 r1 = and(r1,r2) /* round PC to 4MB boundary */ 63 r2 = lsr(r1, #22) /* 4MB page number */ define 64 r2 = asl(r2, #2) /* times sizeof(PTE) (4bytes) */ define 65 r0 = add(r0,r2) /* r0 = address of correct PTE */ 66 r2 = #PTE_BITS define 67 r1 = add(r1,r2) /* r1 = 4MB PTE for the first entry */ 68 r2 143 r2 = sub(r2,r0); define [all...] |