Searched defs:mmr_base (Results 1 - 3 of 3) sorted by relevance

/drivers/dma/
H A Dmv_xor.h34 #define XOR_CURR_DESC(chan) (chan->mmr_base + 0x210 + (chan->idx * 4))
35 #define XOR_NEXT_DESC(chan) (chan->mmr_base + 0x200 + (chan->idx * 4))
36 #define XOR_BYTE_COUNT(chan) (chan->mmr_base + 0x220 + (chan->idx * 4))
37 #define XOR_DEST_POINTER(chan) (chan->mmr_base + 0x2B0 + (chan->idx * 4))
38 #define XOR_BLOCK_SIZE(chan) (chan->mmr_base + 0x2C0 + (chan->idx * 4))
39 #define XOR_INIT_VALUE_LOW(chan) (chan->mmr_base + 0x2E0)
40 #define XOR_INIT_VALUE_HIGH(chan) (chan->mmr_base + 0x2E4)
42 #define XOR_CONFIG(chan) (chan->mmr_base + 0x10 + (chan->idx * 4))
43 #define XOR_ACTIVATION(chan) (chan->mmr_base + 0x20 + (chan->idx * 4))
44 #define XOR_INTR_CAUSE(chan) (chan->mmr_base
96 void __iomem *mmr_base; member in struct:mv_xor_chan
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/drivers/char/
H A Dmbcs.c203 void *mmr_base; local
208 mmr_base = soft->mmr_base;
219 mbcs_getdma_set(mmr_base, tiocx_dma_addr(gdma->hostAddr),
233 cm_control.cm_control_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
235 MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL, cm_control.cm_control_reg);
243 void *mmr_base; local
248 mmr_base = soft->mmr_base;
259 mbcs_putdma_set(mmr_base, tiocx_dma_add
284 void *mmr_base = soft->mmr_base; local
483 uint64_t mmr_base; local
531 void *mmr_base; local
671 void *mmr_base = soft->mmr_base; local
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H A Dmbcs.h66 #define MBCS_MMR_ADDR(mmr_base, offset)((uint64_t *)(mmr_base + offset))
67 #define MBCS_MMR_SET(mmr_base, offset, value) { \
69 mbcs_mmr_set_u64p = (uint64_t *)(mmr_base + offset); \
73 #define MBCS_MMR_GET(mmr_base, offset) *(uint64_t *)(mmr_base + offset)
74 #define MBCS_MMR_ZERO(mmr_base, offset) MBCS_MMR_SET(mmr_base, offset, 0)
522 void *mmr_base; member in struct:mbcs_soft

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