Searched refs:timer (Results 1 - 25 of 714) sorted by relevance

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/arch/arm/plat-nomadik/
H A DMakefile5 obj-$(CONFIG_HAS_MTU) += timer.o
/arch/arm/plat-omap/
H A Ddmtimer.c52 * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
53 * @timer: timer pointer over which read operation to perform
60 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) argument
63 return __omap_dm_timer_read(timer, reg, timer->posted);
67 * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
68 * @timer: timer pointer over which write operation is to perform
76 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u3 argument
83 omap_timer_restore_context(struct omap_dm_timer *timer) argument
106 omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) argument
123 omap_dm_timer_reset(struct omap_dm_timer *timer) argument
136 omap_dm_timer_prepare(struct omap_dm_timer *timer) argument
159 struct omap_dm_timer *timer = NULL, *t; local
191 struct omap_dm_timer *timer = NULL, *t; local
220 omap_dm_timer_free(struct omap_dm_timer *timer) argument
233 omap_dm_timer_enable(struct omap_dm_timer *timer) argument
239 omap_dm_timer_disable(struct omap_dm_timer *timer) argument
245 omap_dm_timer_get_irq(struct omap_dm_timer *timer) argument
262 struct omap_dm_timer *timer = NULL; local
291 omap_dm_timer_get_fclk(struct omap_dm_timer *timer) argument
309 omap_dm_timer_trigger(struct omap_dm_timer *timer) argument
321 omap_dm_timer_start(struct omap_dm_timer *timer) argument
349 omap_dm_timer_stop(struct omap_dm_timer *timer) argument
379 omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) argument
398 omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int load) argument
425 omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int load) argument
461 omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match) argument
486 omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger) argument
512 omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) argument
535 omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value) argument
552 omap_dm_timer_read_status(struct omap_dm_timer *timer) argument
567 omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) argument
579 omap_dm_timer_read_counter(struct omap_dm_timer *timer) argument
590 omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value) argument
607 struct omap_dm_timer *timer; local
633 struct omap_dm_timer *timer; local
723 struct omap_dm_timer *timer; local
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/arch/powerpc/boot/dts/fsl/
H A Dpq3-mpic-timer-B.dtsi35 timer@42100 {
36 compatible = "fsl,mpic-global-timer";
/arch/mips/jz4740/
H A Dtimer.h3 * JZ4740 platform timer support
64 static inline void jz4740_timer_stop(unsigned int timer) argument
66 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
69 static inline void jz4740_timer_start(unsigned int timer) argument
71 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
74 static inline bool jz4740_timer_is_enabled(unsigned int timer) argument
76 return readb(jz4740_timer_base + JZ_REG_TIMER_ENABLE) & BIT(timer);
79 static inline void jz4740_timer_enable(unsigned int timer) argument
81 writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);
84 static inline void jz4740_timer_disable(unsigned int timer) argument
90 jz4740_timer_set_period(unsigned int timer, uint16_t period) argument
95 jz4740_timer_set_duty(unsigned int timer, uint16_t duty) argument
100 jz4740_timer_set_count(unsigned int timer, uint16_t count) argument
105 jz4740_timer_get_count(unsigned int timer) argument
110 jz4740_timer_ack_full(unsigned int timer) argument
115 jz4740_timer_irq_full_enable(unsigned int timer) argument
121 jz4740_timer_irq_full_disable(unsigned int timer) argument
126 jz4740_timer_set_ctrl(unsigned int timer, uint16_t ctrl) argument
131 jz4740_timer_get_ctrl(unsigned int timer) argument
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/arch/arm/mach-zynq/
H A DMakefile6 obj-y := common.o timer.o
H A Dtimer.c6 * based on arch/mips/kernel/time.c timer driver
40 * The input frequency to the timer module for emulation is 2.5MHz which is
41 * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
44 * The input frequency to the timer module in silicon will be 200MHz. With the
73 * struct xttcpss_timer - This definition defines local timer structure
75 * @base_addr: Base address of timer
85 * xttcpss_set_interval - Set the timer interval value
87 * @timer: Pointer to the timer instance
90 static void xttcpss_set_interval(struct xttcpss_timer *timer, argument
120 struct xttcpss_timer *timer = dev_id; local
184 struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKSOURCE]; local
214 struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKEVENT]; local
229 struct xttcpss_timer *timer = &timers[XTTCPSS_CLOCKEVENT]; local
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/arch/arm/plat-omap/include/plat/
H A Ddmtimer.h48 /* timer interrupt enable bits */
64 /* timer capabilities used in hwmod database */
112 int omap_dm_timer_free(struct omap_dm_timer *timer);
113 void omap_dm_timer_enable(struct omap_dm_timer *timer);
114 void omap_dm_timer_disable(struct omap_dm_timer *timer);
116 int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
119 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer);
121 int omap_dm_timer_trigger(struct omap_dm_timer *timer);
122 int omap_dm_timer_start(struct omap_dm_timer *timer);
123 int omap_dm_timer_stop(struct omap_dm_timer *timer);
287 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg, int posted) argument
297 __omap_dm_timer_write(struct omap_dm_timer *timer, u32 reg, u32 val, int posted) argument
307 __omap_dm_timer_init_regs(struct omap_dm_timer *timer) argument
336 __omap_dm_timer_reset(struct omap_dm_timer *timer, int autoidle, int wakeup) argument
376 __omap_dm_timer_stop(struct omap_dm_timer *timer, int posted, unsigned long rate) argument
400 __omap_dm_timer_load_start(struct omap_dm_timer *timer, u32 ctrl, unsigned int load, int posted) argument
408 __omap_dm_timer_int_enable(struct omap_dm_timer *timer, unsigned int value) argument
416 __omap_dm_timer_read_counter(struct omap_dm_timer *timer, int posted) argument
421 __omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) argument
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/arch/s390/include/asm/
H A Dtimer.h2 * include/asm-s390/timer.h
5 * Virtual CPU timer
15 #include <linux/timer.h>
34 __u64 timer; /* last programmed timer */ member in struct:vtimer_queue
35 __u64 elapsed; /* elapsed time of timer expire values */
36 __u64 idle_enter; /* cpu timer on idle enter */
37 __u64 idle_exit; /* cpu timer on idle exit */
40 extern void init_virt_timer(struct vtimer_list *timer);
43 extern int mod_virt_timer(struct vtimer_list *timer, __u6
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/arch/sh/include/asm/
H A Dheartbeat.h4 #include <linux/timer.h>
12 struct timer_list timer; member in struct:heartbeat_data
/arch/sparc/include/asm/
H A Dtimex_64.h9 #include <asm/timer.h>
/arch/c6x/boot/dts/
H A Devmc6472.dts39 timer0: timer@25e0000 {
44 timer1: timer@25f0000 {
49 timer2: timer@2600000 {
54 timer3: timer@2610000 {
59 timer4: timer@2620000 {
64 timer5: timer@2630000 {
H A Devmc6474.dts39 timer3: timer@2940000 {
44 timer4: timer@2950000 {
49 timer5: timer@2960000 {
H A Devmc6457.dts39 timer0: timer@2940000 {
/arch/s390/kernel/
H A Dvtime.c3 * Virtual cpu timer based timer functions.
25 #include <asm/timer.h>
37 __u64 timer; local
39 asm volatile("STPT %0" : "=m" (timer));
40 return timer;
45 __u64 timer; local
47 asm volatile (" STPT %0\n" /* Store current cpu timer value */
49 : "=m" (timer) : "m" (expires) );
50 S390_lowcore.system_timer += S390_lowcore.last_update_timer - timer;
61 __u64 timer, clock, user, system, steal; local
114 __u64 timer, system; local
180 list_add_sorted(struct vtimer_list *timer, struct list_head *head) argument
272 init_virt_timer(struct vtimer_list *timer) argument
279 vtimer_pending(struct vtimer_list *timer) argument
287 internal_add_vtimer(struct vtimer_list *timer) argument
327 prepare_vtimer(struct vtimer_list *timer) argument
340 struct vtimer_list *timer; local
354 struct vtimer_list *timer; local
363 __mod_vtimer(struct vtimer_list *timer, __u64 expires, int periodic) argument
415 mod_virt_timer(struct vtimer_list *timer, __u64 expires) argument
427 mod_virt_timer_periodic(struct vtimer_list *timer, __u64 expires) argument
438 del_virt_timer(struct vtimer_list *timer) argument
[all...]
/arch/um/include/shared/skas/
H A Dstub-data.h14 struct itimerval timer; member in struct:stub_data
/arch/arm/mach-omap1/
H A Dtime.c7 * Partial timer rewrite and additional dynamic tick timer support by
11 * MPU timer code based on the older MPU timer code for OMAP
75 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); local
76 return readl(&timer->read_tim);
81 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); local
83 writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl);
88 omap_mpu_timer_regs_t __iomem *timer local
96 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); local
111 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); local
199 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(1); local
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/arch/arm/mach-bcmring/
H A DMakefile7 obj-y := arch.o mm.o irq.o clock.o core.o timer.o dma.o
/arch/hexagon/include/asm/
H A Dtimex.h23 #include <asm/timer-regs.h>
/arch/cris/arch-v32/lib/
H A Ddelay.c16 * On ETRAX FS, we can check the free-running read-only 100MHz timer
24 u32 t0 = REG_RD(timer, regi_timer0, r_time);
25 while (REG_RD(timer, regi_timer0, r_time) - t0 < n10ns)
/arch/c6x/platforms/
H A Dtimer64.c35 static struct timer_regs __iomem *timer; variable in typeref:struct:__iomem
69 ((soc_readl(&timer->emumgt) & (0xf << 16)) >> 16)
82 u32 tcr = soc_readl(&timer->tcr) & ~TCR_ENAMODELO_MASK;
84 soc_writel(tcr, &timer->tcr);
85 soc_writel(period - 1, &timer->prdlo);
86 soc_writel(0, &timer->cntlo);
88 soc_writel(tcr, &timer->tcr);
98 /* disable timer, reset count */
99 soc_writel(soc_readl(&timer->tcr) & ~TCR_ENAMODELO_MASK, &timer
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/arch/powerpc/boot/dts/
H A Dpcm030.dts22 timer@600 { // General Purpose Timer
26 gpt2: timer@620 { // General Purpose Timer in GPIO mode
32 gpt3: timer@630 { // General Purpose Timer in GPIO mode
38 gpt4: timer@640 { // General Purpose Timer in GPIO mode
44 gpt5: timer@650 { // General Purpose Timer in GPIO mode
50 gpt6: timer@660 { // General Purpose Timer in GPIO mode
56 gpt7: timer@670 { // General Purpose Timer in GPIO mode
/arch/powerpc/oprofile/cell/
H A Dspu_profiler.c137 static enum hrtimer_restart profile_spus(struct hrtimer *timer) argument
186 hrtimer_forward(timer, timer->base->get_time(), kt);
190 printk(KERN_INFO "SPU_PROF: spu-prof timer ending\n");
194 static struct hrtimer timer; variable in typeref:struct:hrtimer
206 pr_debug("timer resolution: %lu\n", TICK_NSEC);
208 hrtimer_init(&timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
209 hrtimer_set_expires(&timer, kt);
210 timer.function = profile_spus;
220 hrtimer_start(&timer, k
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/arch/arm/mach-footbridge/
H A Dpersonal.c21 .timer = &footbridge_timer,
/arch/arm/mach-omap1/include/mach/
H A Dmtd-xip.h33 volatile xip_omap_mpu_timer_regs_t* timer = xip_omap_mpu_timer_base(nr); local
34 return timer->read_tim;
54 * the system timer tick period. This should put the CPU into idle mode
/arch/arm/plat-s5p/
H A Dirq.c21 #include <plat/regs-timer.h>
23 #include <plat/irq-vic-timer.h>

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