1/* 2 * linux/arch/arm/mach-omap2/board-3430sdp.c 3 * 4 * Copyright (C) 2007 Texas Instruments 5 * 6 * Modified from mach-omap2/board-generic.c 7 * 8 * Initial code: Syed Mohammed Khasim 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15#include <linux/kernel.h> 16#include <linux/init.h> 17#include <linux/platform_device.h> 18#include <linux/delay.h> 19#include <linux/input.h> 20#include <linux/input/matrix_keypad.h> 21#include <linux/spi/spi.h> 22#include <linux/i2c/twl.h> 23#include <linux/regulator/machine.h> 24#include <linux/io.h> 25#include <linux/gpio.h> 26#include <linux/mmc/host.h> 27 28#include <mach/hardware.h> 29#include <asm/mach-types.h> 30#include <asm/mach/arch.h> 31#include <asm/mach/map.h> 32 33#include <plat/mcspi.h> 34#include <plat/board.h> 35#include <plat/usb.h> 36#include "common.h" 37#include <plat/dma.h> 38#include <plat/gpmc.h> 39#include <video/omapdss.h> 40#include <video/omap-panel-dvi.h> 41 42#include <plat/gpmc-smc91x.h> 43 44#include "board-flash.h" 45#include "mux.h" 46#include "sdram-qimonda-hyb18m512160af-6.h" 47#include "hsmmc.h" 48#include "pm.h" 49#include "control.h" 50#include "common-board-devices.h" 51 52#define CONFIG_DISABLE_HFCLK 1 53 54#define SDP3430_TS_GPIO_IRQ_SDPV1 3 55#define SDP3430_TS_GPIO_IRQ_SDPV2 2 56 57#define ENABLE_VAUX3_DEDICATED 0x03 58#define ENABLE_VAUX3_DEV_GRP 0x20 59 60#define TWL4030_MSECURE_GPIO 22 61 62static uint32_t board_keymap[] = { 63 KEY(0, 0, KEY_LEFT), 64 KEY(0, 1, KEY_RIGHT), 65 KEY(0, 2, KEY_A), 66 KEY(0, 3, KEY_B), 67 KEY(0, 4, KEY_C), 68 KEY(1, 0, KEY_DOWN), 69 KEY(1, 1, KEY_UP), 70 KEY(1, 2, KEY_E), 71 KEY(1, 3, KEY_F), 72 KEY(1, 4, KEY_G), 73 KEY(2, 0, KEY_ENTER), 74 KEY(2, 1, KEY_I), 75 KEY(2, 2, KEY_J), 76 KEY(2, 3, KEY_K), 77 KEY(2, 4, KEY_3), 78 KEY(3, 0, KEY_M), 79 KEY(3, 1, KEY_N), 80 KEY(3, 2, KEY_O), 81 KEY(3, 3, KEY_P), 82 KEY(3, 4, KEY_Q), 83 KEY(4, 0, KEY_R), 84 KEY(4, 1, KEY_4), 85 KEY(4, 2, KEY_T), 86 KEY(4, 3, KEY_U), 87 KEY(4, 4, KEY_D), 88 KEY(5, 0, KEY_V), 89 KEY(5, 1, KEY_W), 90 KEY(5, 2, KEY_L), 91 KEY(5, 3, KEY_S), 92 KEY(5, 4, KEY_H), 93 0 94}; 95 96static struct matrix_keymap_data board_map_data = { 97 .keymap = board_keymap, 98 .keymap_size = ARRAY_SIZE(board_keymap), 99}; 100 101static struct twl4030_keypad_data sdp3430_kp_data = { 102 .keymap_data = &board_map_data, 103 .rows = 5, 104 .cols = 6, 105 .rep = 1, 106}; 107 108#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8 109#define SDP3430_LCD_PANEL_ENABLE_GPIO 5 110 111static struct gpio sdp3430_dss_gpios[] __initdata = { 112 {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" }, 113 {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"}, 114}; 115 116static int lcd_enabled; 117static int dvi_enabled; 118 119static void __init sdp3430_display_init(void) 120{ 121 int r; 122 123 r = gpio_request_array(sdp3430_dss_gpios, 124 ARRAY_SIZE(sdp3430_dss_gpios)); 125 if (r) 126 printk(KERN_ERR "failed to get LCD control GPIOs\n"); 127 128} 129 130static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev) 131{ 132 if (dvi_enabled) { 133 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); 134 return -EINVAL; 135 } 136 137 gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1); 138 gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1); 139 140 lcd_enabled = 1; 141 142 return 0; 143} 144 145static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev) 146{ 147 lcd_enabled = 0; 148 149 gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0); 150 gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0); 151} 152 153static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev) 154{ 155 if (lcd_enabled) { 156 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); 157 return -EINVAL; 158 } 159 160 dvi_enabled = 1; 161 162 return 0; 163} 164 165static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev) 166{ 167 dvi_enabled = 0; 168} 169 170static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev) 171{ 172 return 0; 173} 174 175static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev) 176{ 177} 178 179 180static struct omap_dss_device sdp3430_lcd_device = { 181 .name = "lcd", 182 .driver_name = "sharp_ls_panel", 183 .type = OMAP_DISPLAY_TYPE_DPI, 184 .phy.dpi.data_lines = 16, 185 .platform_enable = sdp3430_panel_enable_lcd, 186 .platform_disable = sdp3430_panel_disable_lcd, 187}; 188 189static struct panel_dvi_platform_data dvi_panel = { 190 .platform_enable = sdp3430_panel_enable_dvi, 191 .platform_disable = sdp3430_panel_disable_dvi, 192}; 193 194static struct omap_dss_device sdp3430_dvi_device = { 195 .name = "dvi", 196 .type = OMAP_DISPLAY_TYPE_DPI, 197 .driver_name = "dvi", 198 .data = &dvi_panel, 199 .phy.dpi.data_lines = 24, 200}; 201 202static struct omap_dss_device sdp3430_tv_device = { 203 .name = "tv", 204 .driver_name = "venc", 205 .type = OMAP_DISPLAY_TYPE_VENC, 206 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, 207 .platform_enable = sdp3430_panel_enable_tv, 208 .platform_disable = sdp3430_panel_disable_tv, 209}; 210 211 212static struct omap_dss_device *sdp3430_dss_devices[] = { 213 &sdp3430_lcd_device, 214 &sdp3430_dvi_device, 215 &sdp3430_tv_device, 216}; 217 218static struct omap_dss_board_info sdp3430_dss_data = { 219 .num_devices = ARRAY_SIZE(sdp3430_dss_devices), 220 .devices = sdp3430_dss_devices, 221 .default_device = &sdp3430_lcd_device, 222}; 223 224static struct omap_board_config_kernel sdp3430_config[] __initdata = { 225}; 226 227static struct omap2_hsmmc_info mmc[] = { 228 { 229 .mmc = 1, 230 /* 8 bits (default) requires S6.3 == ON, 231 * so the SIM card isn't used; else 4 bits. 232 */ 233 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 234 .gpio_wp = 4, 235 .deferred = true, 236 }, 237 { 238 .mmc = 2, 239 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 240 .gpio_wp = 7, 241 .deferred = true, 242 }, 243 {} /* Terminator */ 244}; 245 246static int sdp3430_twl_gpio_setup(struct device *dev, 247 unsigned gpio, unsigned ngpio) 248{ 249 /* gpio + 0 is "mmc0_cd" (input/IRQ), 250 * gpio + 1 is "mmc1_cd" (input/IRQ) 251 */ 252 mmc[0].gpio_cd = gpio + 0; 253 mmc[1].gpio_cd = gpio + 1; 254 omap_hsmmc_late_init(mmc); 255 256 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */ 257 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl"); 258 259 /* gpio + 15 is "sub_lcd_nRST" (output) */ 260 gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST"); 261 262 return 0; 263} 264 265static struct twl4030_gpio_platform_data sdp3430_gpio_data = { 266 .gpio_base = OMAP_MAX_GPIO_LINES, 267 .irq_base = TWL4030_GPIO_IRQ_BASE, 268 .irq_end = TWL4030_GPIO_IRQ_END, 269 .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13) 270 | BIT(16) | BIT(17), 271 .setup = sdp3430_twl_gpio_setup, 272}; 273 274/* regulator consumer mappings */ 275 276/* ads7846 on SPI */ 277static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = { 278 REGULATOR_SUPPLY("vcc", "spi1.0"), 279}; 280 281static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = { 282 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), 283}; 284 285static struct regulator_consumer_supply sdp3430_vsim_supplies[] = { 286 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), 287}; 288 289static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = { 290 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), 291}; 292 293/* 294 * Apply all the fixed voltages since most versions of U-Boot 295 * don't bother with that initialization. 296 */ 297 298/* VAUX1 for mainboard (irda and sub-lcd) */ 299static struct regulator_init_data sdp3430_vaux1 = { 300 .constraints = { 301 .min_uV = 2800000, 302 .max_uV = 2800000, 303 .apply_uV = true, 304 .valid_modes_mask = REGULATOR_MODE_NORMAL 305 | REGULATOR_MODE_STANDBY, 306 .valid_ops_mask = REGULATOR_CHANGE_MODE 307 | REGULATOR_CHANGE_STATUS, 308 }, 309}; 310 311/* VAUX2 for camera module */ 312static struct regulator_init_data sdp3430_vaux2 = { 313 .constraints = { 314 .min_uV = 2800000, 315 .max_uV = 2800000, 316 .apply_uV = true, 317 .valid_modes_mask = REGULATOR_MODE_NORMAL 318 | REGULATOR_MODE_STANDBY, 319 .valid_ops_mask = REGULATOR_CHANGE_MODE 320 | REGULATOR_CHANGE_STATUS, 321 }, 322}; 323 324/* VAUX3 for LCD board */ 325static struct regulator_init_data sdp3430_vaux3 = { 326 .constraints = { 327 .min_uV = 2800000, 328 .max_uV = 2800000, 329 .apply_uV = true, 330 .valid_modes_mask = REGULATOR_MODE_NORMAL 331 | REGULATOR_MODE_STANDBY, 332 .valid_ops_mask = REGULATOR_CHANGE_MODE 333 | REGULATOR_CHANGE_STATUS, 334 }, 335 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies), 336 .consumer_supplies = sdp3430_vaux3_supplies, 337}; 338 339/* VAUX4 for OMAP VDD_CSI2 (camera) */ 340static struct regulator_init_data sdp3430_vaux4 = { 341 .constraints = { 342 .min_uV = 1800000, 343 .max_uV = 1800000, 344 .apply_uV = true, 345 .valid_modes_mask = REGULATOR_MODE_NORMAL 346 | REGULATOR_MODE_STANDBY, 347 .valid_ops_mask = REGULATOR_CHANGE_MODE 348 | REGULATOR_CHANGE_STATUS, 349 }, 350}; 351 352/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ 353static struct regulator_init_data sdp3430_vmmc1 = { 354 .constraints = { 355 .min_uV = 1850000, 356 .max_uV = 3150000, 357 .valid_modes_mask = REGULATOR_MODE_NORMAL 358 | REGULATOR_MODE_STANDBY, 359 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE 360 | REGULATOR_CHANGE_MODE 361 | REGULATOR_CHANGE_STATUS, 362 }, 363 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies), 364 .consumer_supplies = sdp3430_vmmc1_supplies, 365}; 366 367/* VMMC2 for MMC2 card */ 368static struct regulator_init_data sdp3430_vmmc2 = { 369 .constraints = { 370 .min_uV = 1850000, 371 .max_uV = 1850000, 372 .apply_uV = true, 373 .valid_modes_mask = REGULATOR_MODE_NORMAL 374 | REGULATOR_MODE_STANDBY, 375 .valid_ops_mask = REGULATOR_CHANGE_MODE 376 | REGULATOR_CHANGE_STATUS, 377 }, 378 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies), 379 .consumer_supplies = sdp3430_vmmc2_supplies, 380}; 381 382/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ 383static struct regulator_init_data sdp3430_vsim = { 384 .constraints = { 385 .min_uV = 1800000, 386 .max_uV = 3000000, 387 .valid_modes_mask = REGULATOR_MODE_NORMAL 388 | REGULATOR_MODE_STANDBY, 389 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE 390 | REGULATOR_CHANGE_MODE 391 | REGULATOR_CHANGE_STATUS, 392 }, 393 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies), 394 .consumer_supplies = sdp3430_vsim_supplies, 395}; 396 397static struct twl4030_platform_data sdp3430_twldata = { 398 /* platform_data for children goes here */ 399 .gpio = &sdp3430_gpio_data, 400 .keypad = &sdp3430_kp_data, 401 402 .vaux1 = &sdp3430_vaux1, 403 .vaux2 = &sdp3430_vaux2, 404 .vaux3 = &sdp3430_vaux3, 405 .vaux4 = &sdp3430_vaux4, 406 .vmmc1 = &sdp3430_vmmc1, 407 .vmmc2 = &sdp3430_vmmc2, 408 .vsim = &sdp3430_vsim, 409}; 410 411static int __init omap3430_i2c_init(void) 412{ 413 /* i2c1 for PMIC only */ 414 omap3_pmic_get_config(&sdp3430_twldata, 415 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | 416 TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 417 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); 418 sdp3430_twldata.vdac->constraints.apply_uV = true; 419 sdp3430_twldata.vpll2->constraints.apply_uV = true; 420 sdp3430_twldata.vpll2->constraints.name = "VDVI"; 421 422 omap3_pmic_init("twl4030", &sdp3430_twldata); 423 424 /* i2c2 on camera connector (for sensor control) and optional isp1301 */ 425 omap_register_i2c_bus(2, 400, NULL, 0); 426 /* i2c3 on display connector (for DVI, tfp410) */ 427 omap_register_i2c_bus(3, 400, NULL, 0); 428 return 0; 429} 430 431#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 432 433static struct omap_smc91x_platform_data board_smc91x_data = { 434 .cs = 3, 435 .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 | 436 IORESOURCE_IRQ_LOWLEVEL, 437}; 438 439static void __init board_smc91x_init(void) 440{ 441 if (omap_rev() > OMAP3430_REV_ES1_0) 442 board_smc91x_data.gpio_irq = 6; 443 else 444 board_smc91x_data.gpio_irq = 29; 445 446 gpmc_smc91x_init(&board_smc91x_data); 447} 448 449#else 450 451static inline void board_smc91x_init(void) 452{ 453} 454 455#endif 456 457static void enable_board_wakeup_source(void) 458{ 459 /* T2 interrupt line (keypad) */ 460 omap_mux_init_signal("sys_nirq", 461 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); 462} 463 464static const struct usbhs_omap_board_data usbhs_bdata __initconst = { 465 466 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 467 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 468 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, 469 470 .phy_reset = true, 471 .reset_gpio_port[0] = 57, 472 .reset_gpio_port[1] = 61, 473 .reset_gpio_port[2] = -EINVAL 474}; 475 476#ifdef CONFIG_OMAP_MUX 477static struct omap_board_mux board_mux[] __initdata = { 478 { .reg_offset = OMAP_MUX_TERMINATOR }, 479}; 480#else 481#define board_mux NULL 482#endif 483 484/* 485 * SDP3430 V2 Board CS organization 486 * Different from SDP3430 V1. Now 4 switches used to specify CS 487 * 488 * See also the Switch S8 settings in the comments. 489 */ 490static char chip_sel_3430[][GPMC_CS_NUM] = { 491 {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */ 492 {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */ 493 {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */ 494}; 495 496static struct mtd_partition sdp_nor_partitions[] = { 497 /* bootloader (U-Boot, etc) in first sector */ 498 { 499 .name = "Bootloader-NOR", 500 .offset = 0, 501 .size = SZ_256K, 502 .mask_flags = MTD_WRITEABLE, /* force read-only */ 503 }, 504 /* bootloader params in the next sector */ 505 { 506 .name = "Params-NOR", 507 .offset = MTDPART_OFS_APPEND, 508 .size = SZ_256K, 509 .mask_flags = 0, 510 }, 511 /* kernel */ 512 { 513 .name = "Kernel-NOR", 514 .offset = MTDPART_OFS_APPEND, 515 .size = SZ_2M, 516 .mask_flags = 0 517 }, 518 /* file system */ 519 { 520 .name = "Filesystem-NOR", 521 .offset = MTDPART_OFS_APPEND, 522 .size = MTDPART_SIZ_FULL, 523 .mask_flags = 0 524 } 525}; 526 527static struct mtd_partition sdp_onenand_partitions[] = { 528 { 529 .name = "X-Loader-OneNAND", 530 .offset = 0, 531 .size = 4 * (64 * 2048), 532 .mask_flags = MTD_WRITEABLE /* force read-only */ 533 }, 534 { 535 .name = "U-Boot-OneNAND", 536 .offset = MTDPART_OFS_APPEND, 537 .size = 2 * (64 * 2048), 538 .mask_flags = MTD_WRITEABLE /* force read-only */ 539 }, 540 { 541 .name = "U-Boot Environment-OneNAND", 542 .offset = MTDPART_OFS_APPEND, 543 .size = 1 * (64 * 2048), 544 }, 545 { 546 .name = "Kernel-OneNAND", 547 .offset = MTDPART_OFS_APPEND, 548 .size = 16 * (64 * 2048), 549 }, 550 { 551 .name = "File System-OneNAND", 552 .offset = MTDPART_OFS_APPEND, 553 .size = MTDPART_SIZ_FULL, 554 }, 555}; 556 557static struct mtd_partition sdp_nand_partitions[] = { 558 /* All the partition sizes are listed in terms of NAND block size */ 559 { 560 .name = "X-Loader-NAND", 561 .offset = 0, 562 .size = 4 * (64 * 2048), 563 .mask_flags = MTD_WRITEABLE, /* force read-only */ 564 }, 565 { 566 .name = "U-Boot-NAND", 567 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ 568 .size = 10 * (64 * 2048), 569 .mask_flags = MTD_WRITEABLE, /* force read-only */ 570 }, 571 { 572 .name = "Boot Env-NAND", 573 574 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ 575 .size = 6 * (64 * 2048), 576 }, 577 { 578 .name = "Kernel-NAND", 579 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ 580 .size = 40 * (64 * 2048), 581 }, 582 { 583 .name = "File System - NAND", 584 .size = MTDPART_SIZ_FULL, 585 .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */ 586 }, 587}; 588 589static struct flash_partitions sdp_flash_partitions[] = { 590 { 591 .parts = sdp_nor_partitions, 592 .nr_parts = ARRAY_SIZE(sdp_nor_partitions), 593 }, 594 { 595 .parts = sdp_onenand_partitions, 596 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions), 597 }, 598 { 599 .parts = sdp_nand_partitions, 600 .nr_parts = ARRAY_SIZE(sdp_nand_partitions), 601 }, 602}; 603 604static void __init omap_3430sdp_init(void) 605{ 606 int gpio_pendown; 607 608 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 609 omap_board_config = sdp3430_config; 610 omap_board_config_size = ARRAY_SIZE(sdp3430_config); 611 omap_hsmmc_init(mmc); 612 omap3430_i2c_init(); 613 omap_display_init(&sdp3430_dss_data); 614 if (omap_rev() > OMAP3430_REV_ES1_0) 615 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2; 616 else 617 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1; 618 omap_ads7846_init(1, gpio_pendown, 310, NULL); 619 omap_serial_init(); 620 omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL); 621 usb_musb_init(NULL); 622 board_smc91x_init(); 623 board_flash_init(sdp_flash_partitions, chip_sel_3430, 0); 624 sdp3430_display_init(); 625 enable_board_wakeup_source(); 626 usbhs_init(&usbhs_bdata); 627} 628 629MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") 630 /* Maintainer: Syed Khasim - Texas Instruments Inc */ 631 .atag_offset = 0x100, 632 .reserve = omap_reserve, 633 .map_io = omap3_map_io, 634 .init_early = omap3430_init_early, 635 .init_irq = omap3_init_irq, 636 .handle_irq = omap3_intc_handle_irq, 637 .init_machine = omap_3430sdp_init, 638 .timer = &omap3_timer, 639 .restart = omap_prcm_restart, 640MACHINE_END 641