1/* 2 * omap_hwmod implementation for OMAP2/3/4 3 * 4 * Copyright (C) 2009-2011 Nokia Corporation 5 * Copyright (C) 2011 Texas Instruments, Inc. 6 * 7 * Paul Walmsley, Benoît Cousson, Kevin Hilman 8 * 9 * Created in collaboration with (alphabetical order): Thara Gopinath, 10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand 11 * Sawant, Santosh Shilimkar, Richard Woodruff 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 * 17 * Introduction 18 * ------------ 19 * One way to view an OMAP SoC is as a collection of largely unrelated 20 * IP blocks connected by interconnects. The IP blocks include 21 * devices such as ARM processors, audio serial interfaces, UARTs, 22 * etc. Some of these devices, like the DSP, are created by TI; 23 * others, like the SGX, largely originate from external vendors. In 24 * TI's documentation, on-chip devices are referred to as "OMAP 25 * modules." Some of these IP blocks are identical across several 26 * OMAP versions. Others are revised frequently. 27 * 28 * These OMAP modules are tied together by various interconnects. 29 * Most of the address and data flow between modules is via OCP-based 30 * interconnects such as the L3 and L4 buses; but there are other 31 * interconnects that distribute the hardware clock tree, handle idle 32 * and reset signaling, supply power, and connect the modules to 33 * various pads or balls on the OMAP package. 34 * 35 * OMAP hwmod provides a consistent way to describe the on-chip 36 * hardware blocks and their integration into the rest of the chip. 37 * This description can be automatically generated from the TI 38 * hardware database. OMAP hwmod provides a standard, consistent API 39 * to reset, enable, idle, and disable these hardware blocks. And 40 * hwmod provides a way for other core code, such as the Linux device 41 * code or the OMAP power management and address space mapping code, 42 * to query the hardware database. 43 * 44 * Using hwmod 45 * ----------- 46 * Drivers won't call hwmod functions directly. That is done by the 47 * omap_device code, and in rare occasions, by custom integration code 48 * in arch/arm/ *omap*. The omap_device code includes functions to 49 * build a struct platform_device using omap_hwmod data, and that is 50 * currently how hwmod data is communicated to drivers and to the 51 * Linux driver model. Most drivers will call omap_hwmod functions only 52 * indirectly, via pm_runtime*() functions. 53 * 54 * From a layering perspective, here is where the OMAP hwmod code 55 * fits into the kernel software stack: 56 * 57 * +-------------------------------+ 58 * | Device driver code | 59 * | (e.g., drivers/) | 60 * +-------------------------------+ 61 * | Linux driver model | 62 * | (platform_device / | 63 * | platform_driver data/code) | 64 * +-------------------------------+ 65 * | OMAP core-driver integration | 66 * |(arch/arm/mach-omap2/devices.c)| 67 * +-------------------------------+ 68 * | omap_device code | 69 * | (../plat-omap/omap_device.c) | 70 * +-------------------------------+ 71 * ----> | omap_hwmod code/data | <----- 72 * | (../mach-omap2/omap_hwmod*) | 73 * +-------------------------------+ 74 * | OMAP clock/PRCM/register fns | 75 * | (__raw_{read,write}l, clk*) | 76 * +-------------------------------+ 77 * 78 * Device drivers should not contain any OMAP-specific code or data in 79 * them. They should only contain code to operate the IP block that 80 * the driver is responsible for. This is because these IP blocks can 81 * also appear in other SoCs, either from TI (such as DaVinci) or from 82 * other manufacturers; and drivers should be reusable across other 83 * platforms. 84 * 85 * The OMAP hwmod code also will attempt to reset and idle all on-chip 86 * devices upon boot. The goal here is for the kernel to be 87 * completely self-reliant and independent from bootloaders. This is 88 * to ensure a repeatable configuration, both to ensure consistent 89 * runtime behavior, and to make it easier for others to reproduce 90 * bugs. 91 * 92 * OMAP module activity states 93 * --------------------------- 94 * The hwmod code considers modules to be in one of several activity 95 * states. IP blocks start out in an UNKNOWN state, then once they 96 * are registered via the hwmod code, proceed to the REGISTERED state. 97 * Once their clock names are resolved to clock pointers, the module 98 * enters the CLKS_INITED state; and finally, once the module has been 99 * reset and the integration registers programmed, the INITIALIZED state 100 * is entered. The hwmod code will then place the module into either 101 * the IDLE state to save power, or in the case of a critical system 102 * module, the ENABLED state. 103 * 104 * OMAP core integration code can then call omap_hwmod*() functions 105 * directly to move the module between the IDLE, ENABLED, and DISABLED 106 * states, as needed. This is done during both the PM idle loop, and 107 * in the OMAP core integration code's implementation of the PM runtime 108 * functions. 109 * 110 * References 111 * ---------- 112 * This is a partial list. 113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) 114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) 115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) 116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) 117 * - Open Core Protocol Specification 2.2 118 * 119 * To do: 120 * - handle IO mapping 121 * - bus throughput & module latency measurement code 122 * 123 * XXX add tests at the beginning of each function to ensure the hwmod is 124 * in the appropriate state 125 * XXX error return values should be checked to ensure that they are 126 * appropriate 127 */ 128#undef DEBUG 129 130#include <linux/kernel.h> 131#include <linux/errno.h> 132#include <linux/io.h> 133#include <linux/clk.h> 134#include <linux/delay.h> 135#include <linux/err.h> 136#include <linux/list.h> 137#include <linux/mutex.h> 138#include <linux/spinlock.h> 139#include <linux/slab.h> 140 141#include "common.h" 142#include <plat/cpu.h> 143#include "clockdomain.h" 144#include "powerdomain.h" 145#include <plat/clock.h> 146#include <plat/omap_hwmod.h> 147#include <plat/prcm.h> 148 149#include "cm2xxx_3xxx.h" 150#include "cminst44xx.h" 151#include "prm2xxx_3xxx.h" 152#include "prm44xx.h" 153#include "prminst44xx.h" 154#include "mux.h" 155 156/* Maximum microseconds to wait for OMAP module to softreset */ 157#define MAX_MODULE_SOFTRESET_WAIT 10000 158 159/* Name of the OMAP hwmod for the MPU */ 160#define MPU_INITIATOR_NAME "mpu" 161 162/* omap_hwmod_list contains all registered struct omap_hwmods */ 163static LIST_HEAD(omap_hwmod_list); 164 165/* mpu_oh: used to add/remove MPU initiator from sleepdep list */ 166static struct omap_hwmod *mpu_oh; 167 168 169/* Private functions */ 170 171/** 172 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy 173 * @oh: struct omap_hwmod * 174 * 175 * Load the current value of the hwmod OCP_SYSCONFIG register into the 176 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no 177 * OCP_SYSCONFIG register or 0 upon success. 178 */ 179static int _update_sysc_cache(struct omap_hwmod *oh) 180{ 181 if (!oh->class->sysc) { 182 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); 183 return -EINVAL; 184 } 185 186 /* XXX ensure module interface clock is up */ 187 188 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs); 189 190 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE)) 191 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; 192 193 return 0; 194} 195 196/** 197 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register 198 * @v: OCP_SYSCONFIG value to write 199 * @oh: struct omap_hwmod * 200 * 201 * Write @v into the module class' OCP_SYSCONFIG register, if it has 202 * one. No return value. 203 */ 204static void _write_sysconfig(u32 v, struct omap_hwmod *oh) 205{ 206 if (!oh->class->sysc) { 207 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); 208 return; 209 } 210 211 /* XXX ensure module interface clock is up */ 212 213 /* Module might have lost context, always update cache and register */ 214 oh->_sysc_cache = v; 215 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); 216} 217 218/** 219 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v 220 * @oh: struct omap_hwmod * 221 * @standbymode: MIDLEMODE field bits 222 * @v: pointer to register contents to modify 223 * 224 * Update the master standby mode bits in @v to be @standbymode for 225 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL 226 * upon error or 0 upon success. 227 */ 228static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, 229 u32 *v) 230{ 231 u32 mstandby_mask; 232 u8 mstandby_shift; 233 234 if (!oh->class->sysc || 235 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE)) 236 return -EINVAL; 237 238 if (!oh->class->sysc->sysc_fields) { 239 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 240 return -EINVAL; 241 } 242 243 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift; 244 mstandby_mask = (0x3 << mstandby_shift); 245 246 *v &= ~mstandby_mask; 247 *v |= __ffs(standbymode) << mstandby_shift; 248 249 return 0; 250} 251 252/** 253 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v 254 * @oh: struct omap_hwmod * 255 * @idlemode: SIDLEMODE field bits 256 * @v: pointer to register contents to modify 257 * 258 * Update the slave idle mode bits in @v to be @idlemode for the @oh 259 * hwmod. Does not write to the hardware. Returns -EINVAL upon error 260 * or 0 upon success. 261 */ 262static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) 263{ 264 u32 sidle_mask; 265 u8 sidle_shift; 266 267 if (!oh->class->sysc || 268 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE)) 269 return -EINVAL; 270 271 if (!oh->class->sysc->sysc_fields) { 272 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 273 return -EINVAL; 274 } 275 276 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift; 277 sidle_mask = (0x3 << sidle_shift); 278 279 *v &= ~sidle_mask; 280 *v |= __ffs(idlemode) << sidle_shift; 281 282 return 0; 283} 284 285/** 286 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v 287 * @oh: struct omap_hwmod * 288 * @clockact: CLOCKACTIVITY field bits 289 * @v: pointer to register contents to modify 290 * 291 * Update the clockactivity mode bits in @v to be @clockact for the 292 * @oh hwmod. Used for additional powersaving on some modules. Does 293 * not write to the hardware. Returns -EINVAL upon error or 0 upon 294 * success. 295 */ 296static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) 297{ 298 u32 clkact_mask; 299 u8 clkact_shift; 300 301 if (!oh->class->sysc || 302 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) 303 return -EINVAL; 304 305 if (!oh->class->sysc->sysc_fields) { 306 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 307 return -EINVAL; 308 } 309 310 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift; 311 clkact_mask = (0x3 << clkact_shift); 312 313 *v &= ~clkact_mask; 314 *v |= clockact << clkact_shift; 315 316 return 0; 317} 318 319/** 320 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v 321 * @oh: struct omap_hwmod * 322 * @v: pointer to register contents to modify 323 * 324 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon 325 * error or 0 upon success. 326 */ 327static int _set_softreset(struct omap_hwmod *oh, u32 *v) 328{ 329 u32 softrst_mask; 330 331 if (!oh->class->sysc || 332 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 333 return -EINVAL; 334 335 if (!oh->class->sysc->sysc_fields) { 336 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 337 return -EINVAL; 338 } 339 340 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); 341 342 *v |= softrst_mask; 343 344 return 0; 345} 346 347/** 348 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v 349 * @oh: struct omap_hwmod * 350 * @autoidle: desired AUTOIDLE bitfield value (0 or 1) 351 * @v: pointer to register contents to modify 352 * 353 * Update the module autoidle bit in @v to be @autoidle for the @oh 354 * hwmod. The autoidle bit controls whether the module can gate 355 * internal clocks automatically when it isn't doing anything; the 356 * exact function of this bit varies on a per-module basis. This 357 * function does not write to the hardware. Returns -EINVAL upon 358 * error or 0 upon success. 359 */ 360static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, 361 u32 *v) 362{ 363 u32 autoidle_mask; 364 u8 autoidle_shift; 365 366 if (!oh->class->sysc || 367 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE)) 368 return -EINVAL; 369 370 if (!oh->class->sysc->sysc_fields) { 371 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 372 return -EINVAL; 373 } 374 375 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; 376 autoidle_mask = (0x1 << autoidle_shift); 377 378 *v &= ~autoidle_mask; 379 *v |= autoidle << autoidle_shift; 380 381 return 0; 382} 383 384/** 385 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux 386 * @oh: struct omap_hwmod * 387 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable 388 * 389 * Set or clear the I/O pad wakeup flag in the mux entries for the 390 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array 391 * in memory. If the hwmod is currently idled, and the new idle 392 * values don't match the previous ones, this function will also 393 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not 394 * currently idled, this function won't touch the hardware: the new 395 * mux settings are written to the SCM PADCTRL registers when the 396 * hwmod is idled. No return value. 397 */ 398static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake) 399{ 400 struct omap_device_pad *pad; 401 bool change = false; 402 u16 prev_idle; 403 int j; 404 405 if (!oh->mux || !oh->mux->enabled) 406 return; 407 408 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) { 409 pad = oh->mux->pads_dynamic[j]; 410 411 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP)) 412 continue; 413 414 prev_idle = pad->idle; 415 416 if (set_wake) 417 pad->idle |= OMAP_WAKEUP_EN; 418 else 419 pad->idle &= ~OMAP_WAKEUP_EN; 420 421 if (prev_idle != pad->idle) 422 change = true; 423 } 424 425 if (change && oh->_state == _HWMOD_STATE_IDLE) 426 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); 427} 428 429/** 430 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware 431 * @oh: struct omap_hwmod * 432 * 433 * Allow the hardware module @oh to send wakeups. Returns -EINVAL 434 * upon error or 0 upon success. 435 */ 436static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) 437{ 438 if (!oh->class->sysc || 439 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || 440 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || 441 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) 442 return -EINVAL; 443 444 if (!oh->class->sysc->sysc_fields) { 445 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 446 return -EINVAL; 447 } 448 449 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) 450 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; 451 452 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 453 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 454 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 455 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 456 457 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 458 459 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED; 460 461 return 0; 462} 463 464/** 465 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware 466 * @oh: struct omap_hwmod * 467 * 468 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL 469 * upon error or 0 upon success. 470 */ 471static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) 472{ 473 if (!oh->class->sysc || 474 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || 475 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || 476 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) 477 return -EINVAL; 478 479 if (!oh->class->sysc->sysc_fields) { 480 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 481 return -EINVAL; 482 } 483 484 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) 485 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); 486 487 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 488 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); 489 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 490 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 491 492 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 493 494 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED; 495 496 return 0; 497} 498 499/** 500 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active 501 * @oh: struct omap_hwmod * 502 * 503 * Prevent the hardware module @oh from entering idle while the 504 * hardare module initiator @init_oh is active. Useful when a module 505 * will be accessed by a particular initiator (e.g., if a module will 506 * be accessed by the IVA, there should be a sleepdep between the IVA 507 * initiator and the module). Only applies to modules in smart-idle 508 * mode. If the clockdomain is marked as not needing autodeps, return 509 * 0 without doing anything. Otherwise, returns -EINVAL upon error or 510 * passes along clkdm_add_sleepdep() value upon success. 511 */ 512static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) 513{ 514 if (!oh->_clk) 515 return -EINVAL; 516 517 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS) 518 return 0; 519 520 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm); 521} 522 523/** 524 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active 525 * @oh: struct omap_hwmod * 526 * 527 * Allow the hardware module @oh to enter idle while the hardare 528 * module initiator @init_oh is active. Useful when a module will not 529 * be accessed by a particular initiator (e.g., if a module will not 530 * be accessed by the IVA, there should be no sleepdep between the IVA 531 * initiator and the module). Only applies to modules in smart-idle 532 * mode. If the clockdomain is marked as not needing autodeps, return 533 * 0 without doing anything. Returns -EINVAL upon error or passes 534 * along clkdm_del_sleepdep() value upon success. 535 */ 536static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) 537{ 538 if (!oh->_clk) 539 return -EINVAL; 540 541 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS) 542 return 0; 543 544 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm); 545} 546 547/** 548 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk 549 * @oh: struct omap_hwmod * 550 * 551 * Called from _init_clocks(). Populates the @oh _clk (main 552 * functional clock pointer) if a main_clk is present. Returns 0 on 553 * success or -EINVAL on error. 554 */ 555static int _init_main_clk(struct omap_hwmod *oh) 556{ 557 int ret = 0; 558 559 if (!oh->main_clk) 560 return 0; 561 562 oh->_clk = omap_clk_get_by_name(oh->main_clk); 563 if (!oh->_clk) { 564 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n", 565 oh->name, oh->main_clk); 566 return -EINVAL; 567 } 568 569 if (!oh->_clk->clkdm) 570 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n", 571 oh->main_clk, oh->_clk->name); 572 573 return ret; 574} 575 576/** 577 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks 578 * @oh: struct omap_hwmod * 579 * 580 * Called from _init_clocks(). Populates the @oh OCP slave interface 581 * clock pointers. Returns 0 on success or -EINVAL on error. 582 */ 583static int _init_interface_clks(struct omap_hwmod *oh) 584{ 585 struct clk *c; 586 int i; 587 int ret = 0; 588 589 if (oh->slaves_cnt == 0) 590 return 0; 591 592 for (i = 0; i < oh->slaves_cnt; i++) { 593 struct omap_hwmod_ocp_if *os = oh->slaves[i]; 594 595 if (!os->clk) 596 continue; 597 598 c = omap_clk_get_by_name(os->clk); 599 if (!c) { 600 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n", 601 oh->name, os->clk); 602 ret = -EINVAL; 603 } 604 os->_clk = c; 605 } 606 607 return ret; 608} 609 610/** 611 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks 612 * @oh: struct omap_hwmod * 613 * 614 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk 615 * clock pointers. Returns 0 on success or -EINVAL on error. 616 */ 617static int _init_opt_clks(struct omap_hwmod *oh) 618{ 619 struct omap_hwmod_opt_clk *oc; 620 struct clk *c; 621 int i; 622 int ret = 0; 623 624 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { 625 c = omap_clk_get_by_name(oc->clk); 626 if (!c) { 627 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n", 628 oh->name, oc->clk); 629 ret = -EINVAL; 630 } 631 oc->_clk = c; 632 } 633 634 return ret; 635} 636 637/** 638 * _enable_clocks - enable hwmod main clock and interface clocks 639 * @oh: struct omap_hwmod * 640 * 641 * Enables all clocks necessary for register reads and writes to succeed 642 * on the hwmod @oh. Returns 0. 643 */ 644static int _enable_clocks(struct omap_hwmod *oh) 645{ 646 int i; 647 648 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); 649 650 if (oh->_clk) 651 clk_enable(oh->_clk); 652 653 if (oh->slaves_cnt > 0) { 654 for (i = 0; i < oh->slaves_cnt; i++) { 655 struct omap_hwmod_ocp_if *os = oh->slaves[i]; 656 struct clk *c = os->_clk; 657 658 if (c && (os->flags & OCPIF_SWSUP_IDLE)) 659 clk_enable(c); 660 } 661 } 662 663 /* The opt clocks are controlled by the device driver. */ 664 665 return 0; 666} 667 668/** 669 * _disable_clocks - disable hwmod main clock and interface clocks 670 * @oh: struct omap_hwmod * 671 * 672 * Disables the hwmod @oh main functional and interface clocks. Returns 0. 673 */ 674static int _disable_clocks(struct omap_hwmod *oh) 675{ 676 int i; 677 678 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); 679 680 if (oh->_clk) 681 clk_disable(oh->_clk); 682 683 if (oh->slaves_cnt > 0) { 684 for (i = 0; i < oh->slaves_cnt; i++) { 685 struct omap_hwmod_ocp_if *os = oh->slaves[i]; 686 struct clk *c = os->_clk; 687 688 if (c && (os->flags & OCPIF_SWSUP_IDLE)) 689 clk_disable(c); 690 } 691 } 692 693 /* The opt clocks are controlled by the device driver. */ 694 695 return 0; 696} 697 698static void _enable_optional_clocks(struct omap_hwmod *oh) 699{ 700 struct omap_hwmod_opt_clk *oc; 701 int i; 702 703 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name); 704 705 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) 706 if (oc->_clk) { 707 pr_debug("omap_hwmod: enable %s:%s\n", oc->role, 708 oc->_clk->name); 709 clk_enable(oc->_clk); 710 } 711} 712 713static void _disable_optional_clocks(struct omap_hwmod *oh) 714{ 715 struct omap_hwmod_opt_clk *oc; 716 int i; 717 718 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name); 719 720 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) 721 if (oc->_clk) { 722 pr_debug("omap_hwmod: disable %s:%s\n", oc->role, 723 oc->_clk->name); 724 clk_disable(oc->_clk); 725 } 726} 727 728/** 729 * _enable_module - enable CLKCTRL modulemode on OMAP4 730 * @oh: struct omap_hwmod * 731 * 732 * Enables the PRCM module mode related to the hwmod @oh. 733 * No return value. 734 */ 735static void _enable_module(struct omap_hwmod *oh) 736{ 737 /* The module mode does not exist prior OMAP4 */ 738 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 739 return; 740 741 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 742 return; 743 744 pr_debug("omap_hwmod: %s: _enable_module: %d\n", 745 oh->name, oh->prcm.omap4.modulemode); 746 747 omap4_cminst_module_enable(oh->prcm.omap4.modulemode, 748 oh->clkdm->prcm_partition, 749 oh->clkdm->cm_inst, 750 oh->clkdm->clkdm_offs, 751 oh->prcm.omap4.clkctrl_offs); 752} 753 754/** 755 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4 756 * @oh: struct omap_hwmod * 757 * 758 * Wait for a module @oh to enter slave idle. Returns 0 if the module 759 * does not have an IDLEST bit or if the module successfully enters 760 * slave idle; otherwise, pass along the return value of the 761 * appropriate *_cm*_wait_module_idle() function. 762 */ 763static int _omap4_wait_target_disable(struct omap_hwmod *oh) 764{ 765 if (!cpu_is_omap44xx()) 766 return 0; 767 768 if (!oh) 769 return -EINVAL; 770 771 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 772 return 0; 773 774 if (oh->flags & HWMOD_NO_IDLEST) 775 return 0; 776 777 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition, 778 oh->clkdm->cm_inst, 779 oh->clkdm->clkdm_offs, 780 oh->prcm.omap4.clkctrl_offs); 781} 782 783/** 784 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4 785 * @oh: struct omap_hwmod * 786 * 787 * Disable the PRCM module mode related to the hwmod @oh. 788 * Return EINVAL if the modulemode is not supported and 0 in case of success. 789 */ 790static int _omap4_disable_module(struct omap_hwmod *oh) 791{ 792 int v; 793 794 /* The module mode does not exist prior OMAP4 */ 795 if (!cpu_is_omap44xx()) 796 return -EINVAL; 797 798 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 799 return -EINVAL; 800 801 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); 802 803 omap4_cminst_module_disable(oh->clkdm->prcm_partition, 804 oh->clkdm->cm_inst, 805 oh->clkdm->clkdm_offs, 806 oh->prcm.omap4.clkctrl_offs); 807 808 v = _omap4_wait_target_disable(oh); 809 if (v) 810 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", 811 oh->name); 812 813 return 0; 814} 815 816/** 817 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh 818 * @oh: struct omap_hwmod *oh 819 * 820 * Count and return the number of MPU IRQs associated with the hwmod 821 * @oh. Used to allocate struct resource data. Returns 0 if @oh is 822 * NULL. 823 */ 824static int _count_mpu_irqs(struct omap_hwmod *oh) 825{ 826 struct omap_hwmod_irq_info *ohii; 827 int i = 0; 828 829 if (!oh || !oh->mpu_irqs) 830 return 0; 831 832 do { 833 ohii = &oh->mpu_irqs[i++]; 834 } while (ohii->irq != -1); 835 836 return i-1; 837} 838 839/** 840 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh 841 * @oh: struct omap_hwmod *oh 842 * 843 * Count and return the number of SDMA request lines associated with 844 * the hwmod @oh. Used to allocate struct resource data. Returns 0 845 * if @oh is NULL. 846 */ 847static int _count_sdma_reqs(struct omap_hwmod *oh) 848{ 849 struct omap_hwmod_dma_info *ohdi; 850 int i = 0; 851 852 if (!oh || !oh->sdma_reqs) 853 return 0; 854 855 do { 856 ohdi = &oh->sdma_reqs[i++]; 857 } while (ohdi->dma_req != -1); 858 859 return i-1; 860} 861 862/** 863 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh 864 * @oh: struct omap_hwmod *oh 865 * 866 * Count and return the number of address space ranges associated with 867 * the hwmod @oh. Used to allocate struct resource data. Returns 0 868 * if @oh is NULL. 869 */ 870static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) 871{ 872 struct omap_hwmod_addr_space *mem; 873 int i = 0; 874 875 if (!os || !os->addr) 876 return 0; 877 878 do { 879 mem = &os->addr[i++]; 880 } while (mem->pa_start != mem->pa_end); 881 882 return i-1; 883} 884 885/** 886 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use 887 * @oh: struct omap_hwmod * 888 * 889 * Returns the array index of the OCP slave port that the MPU 890 * addresses the device on, or -EINVAL upon error or not found. 891 */ 892static int __init _find_mpu_port_index(struct omap_hwmod *oh) 893{ 894 int i; 895 int found = 0; 896 897 if (!oh || oh->slaves_cnt == 0) 898 return -EINVAL; 899 900 for (i = 0; i < oh->slaves_cnt; i++) { 901 struct omap_hwmod_ocp_if *os = oh->slaves[i]; 902 903 if (os->user & OCP_USER_MPU) { 904 found = 1; 905 break; 906 } 907 } 908 909 if (found) 910 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n", 911 oh->name, i); 912 else 913 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n", 914 oh->name); 915 916 return (found) ? i : -EINVAL; 917} 918 919/** 920 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU 921 * @oh: struct omap_hwmod * 922 * 923 * Return the virtual address of the base of the register target of 924 * device @oh, or NULL on error. 925 */ 926static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) 927{ 928 struct omap_hwmod_ocp_if *os; 929 struct omap_hwmod_addr_space *mem; 930 int i = 0, found = 0; 931 void __iomem *va_start; 932 933 if (!oh || oh->slaves_cnt == 0) 934 return NULL; 935 936 os = oh->slaves[index]; 937 938 if (!os->addr) 939 return NULL; 940 941 do { 942 mem = &os->addr[i++]; 943 if (mem->flags & ADDR_TYPE_RT) 944 found = 1; 945 } while (!found && mem->pa_start != mem->pa_end); 946 947 if (found) { 948 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); 949 if (!va_start) { 950 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name); 951 return NULL; 952 } 953 pr_debug("omap_hwmod: %s: MPU register target at va %p\n", 954 oh->name, va_start); 955 } else { 956 pr_debug("omap_hwmod: %s: no MPU register target found\n", 957 oh->name); 958 } 959 960 return (found) ? va_start : NULL; 961} 962 963/** 964 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG 965 * @oh: struct omap_hwmod * 966 * 967 * If module is marked as SWSUP_SIDLE, force the module out of slave 968 * idle; otherwise, configure it for smart-idle. If module is marked 969 * as SWSUP_MSUSPEND, force the module out of master standby; 970 * otherwise, configure it for smart-standby. No return value. 971 */ 972static void _enable_sysc(struct omap_hwmod *oh) 973{ 974 u8 idlemode, sf; 975 u32 v; 976 977 if (!oh->class->sysc) 978 return; 979 980 v = oh->_sysc_cache; 981 sf = oh->class->sysc->sysc_flags; 982 983 if (sf & SYSC_HAS_SIDLEMODE) { 984 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? 985 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; 986 _set_slave_idlemode(oh, idlemode, &v); 987 } 988 989 if (sf & SYSC_HAS_MIDLEMODE) { 990 if (oh->flags & HWMOD_SWSUP_MSTANDBY) { 991 idlemode = HWMOD_IDLEMODE_NO; 992 } else { 993 if (sf & SYSC_HAS_ENAWAKEUP) 994 _enable_wakeup(oh, &v); 995 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 996 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 997 else 998 idlemode = HWMOD_IDLEMODE_SMART; 999 } 1000 _set_master_standbymode(oh, idlemode, &v); 1001 } 1002 1003 /* 1004 * XXX The clock framework should handle this, by 1005 * calling into this code. But this must wait until the 1006 * clock structures are tagged with omap_hwmod entries 1007 */ 1008 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) && 1009 (sf & SYSC_HAS_CLOCKACTIVITY)) 1010 _set_clockactivity(oh, oh->class->sysc->clockact, &v); 1011 1012 /* If slave is in SMARTIDLE, also enable wakeup */ 1013 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE)) 1014 _enable_wakeup(oh, &v); 1015 1016 _write_sysconfig(v, oh); 1017 1018 /* 1019 * Set the autoidle bit only after setting the smartidle bit 1020 * Setting this will not have any impact on the other modules. 1021 */ 1022 if (sf & SYSC_HAS_AUTOIDLE) { 1023 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ? 1024 0 : 1; 1025 _set_module_autoidle(oh, idlemode, &v); 1026 _write_sysconfig(v, oh); 1027 } 1028} 1029 1030/** 1031 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG 1032 * @oh: struct omap_hwmod * 1033 * 1034 * If module is marked as SWSUP_SIDLE, force the module into slave 1035 * idle; otherwise, configure it for smart-idle. If module is marked 1036 * as SWSUP_MSUSPEND, force the module into master standby; otherwise, 1037 * configure it for smart-standby. No return value. 1038 */ 1039static void _idle_sysc(struct omap_hwmod *oh) 1040{ 1041 u8 idlemode, sf; 1042 u32 v; 1043 1044 if (!oh->class->sysc) 1045 return; 1046 1047 v = oh->_sysc_cache; 1048 sf = oh->class->sysc->sysc_flags; 1049 1050 if (sf & SYSC_HAS_SIDLEMODE) { 1051 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? 1052 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; 1053 _set_slave_idlemode(oh, idlemode, &v); 1054 } 1055 1056 if (sf & SYSC_HAS_MIDLEMODE) { 1057 if (oh->flags & HWMOD_SWSUP_MSTANDBY) { 1058 idlemode = HWMOD_IDLEMODE_FORCE; 1059 } else { 1060 if (sf & SYSC_HAS_ENAWAKEUP) 1061 _enable_wakeup(oh, &v); 1062 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 1063 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1064 else 1065 idlemode = HWMOD_IDLEMODE_SMART; 1066 } 1067 _set_master_standbymode(oh, idlemode, &v); 1068 } 1069 1070 /* If slave is in SMARTIDLE, also enable wakeup */ 1071 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE)) 1072 _enable_wakeup(oh, &v); 1073 1074 _write_sysconfig(v, oh); 1075} 1076 1077/** 1078 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG 1079 * @oh: struct omap_hwmod * 1080 * 1081 * Force the module into slave idle and master suspend. No return 1082 * value. 1083 */ 1084static void _shutdown_sysc(struct omap_hwmod *oh) 1085{ 1086 u32 v; 1087 u8 sf; 1088 1089 if (!oh->class->sysc) 1090 return; 1091 1092 v = oh->_sysc_cache; 1093 sf = oh->class->sysc->sysc_flags; 1094 1095 if (sf & SYSC_HAS_SIDLEMODE) 1096 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); 1097 1098 if (sf & SYSC_HAS_MIDLEMODE) 1099 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); 1100 1101 if (sf & SYSC_HAS_AUTOIDLE) 1102 _set_module_autoidle(oh, 1, &v); 1103 1104 _write_sysconfig(v, oh); 1105} 1106 1107/** 1108 * _lookup - find an omap_hwmod by name 1109 * @name: find an omap_hwmod by name 1110 * 1111 * Return a pointer to an omap_hwmod by name, or NULL if not found. 1112 */ 1113static struct omap_hwmod *_lookup(const char *name) 1114{ 1115 struct omap_hwmod *oh, *temp_oh; 1116 1117 oh = NULL; 1118 1119 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 1120 if (!strcmp(name, temp_oh->name)) { 1121 oh = temp_oh; 1122 break; 1123 } 1124 } 1125 1126 return oh; 1127} 1128/** 1129 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod 1130 * @oh: struct omap_hwmod * 1131 * 1132 * Convert a clockdomain name stored in a struct omap_hwmod into a 1133 * clockdomain pointer, and save it into the struct omap_hwmod. 1134 * return -EINVAL if clkdm_name does not exist or if the lookup failed. 1135 */ 1136static int _init_clkdm(struct omap_hwmod *oh) 1137{ 1138 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 1139 return 0; 1140 1141 if (!oh->clkdm_name) { 1142 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name); 1143 return -EINVAL; 1144 } 1145 1146 oh->clkdm = clkdm_lookup(oh->clkdm_name); 1147 if (!oh->clkdm) { 1148 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", 1149 oh->name, oh->clkdm_name); 1150 return -EINVAL; 1151 } 1152 1153 pr_debug("omap_hwmod: %s: associated to clkdm %s\n", 1154 oh->name, oh->clkdm_name); 1155 1156 return 0; 1157} 1158 1159/** 1160 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as 1161 * well the clockdomain. 1162 * @oh: struct omap_hwmod * 1163 * @data: not used; pass NULL 1164 * 1165 * Called by omap_hwmod_setup_*() (after omap2_clk_init()). 1166 * Resolves all clock names embedded in the hwmod. Returns 0 on 1167 * success, or a negative error code on failure. 1168 */ 1169static int _init_clocks(struct omap_hwmod *oh, void *data) 1170{ 1171 int ret = 0; 1172 1173 if (oh->_state != _HWMOD_STATE_REGISTERED) 1174 return 0; 1175 1176 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); 1177 1178 ret |= _init_main_clk(oh); 1179 ret |= _init_interface_clks(oh); 1180 ret |= _init_opt_clks(oh); 1181 ret |= _init_clkdm(oh); 1182 1183 if (!ret) 1184 oh->_state = _HWMOD_STATE_CLKS_INITED; 1185 else 1186 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name); 1187 1188 return ret; 1189} 1190 1191/** 1192 * _wait_target_ready - wait for a module to leave slave idle 1193 * @oh: struct omap_hwmod * 1194 * 1195 * Wait for a module @oh to leave slave idle. Returns 0 if the module 1196 * does not have an IDLEST bit or if the module successfully leaves 1197 * slave idle; otherwise, pass along the return value of the 1198 * appropriate *_cm*_wait_module_ready() function. 1199 */ 1200static int _wait_target_ready(struct omap_hwmod *oh) 1201{ 1202 struct omap_hwmod_ocp_if *os; 1203 int ret; 1204 1205 if (!oh) 1206 return -EINVAL; 1207 1208 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 1209 return 0; 1210 1211 os = oh->slaves[oh->_mpu_port_index]; 1212 1213 if (oh->flags & HWMOD_NO_IDLEST) 1214 return 0; 1215 1216 /* XXX check module SIDLEMODE */ 1217 1218 /* XXX check clock enable states */ 1219 1220 if (cpu_is_omap24xx() || cpu_is_omap34xx()) { 1221 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, 1222 oh->prcm.omap2.idlest_reg_id, 1223 oh->prcm.omap2.idlest_idle_bit); 1224 } else if (cpu_is_omap44xx()) { 1225 if (!oh->clkdm) 1226 return -EINVAL; 1227 1228 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, 1229 oh->clkdm->cm_inst, 1230 oh->clkdm->clkdm_offs, 1231 oh->prcm.omap4.clkctrl_offs); 1232 } else { 1233 BUG(); 1234 }; 1235 1236 return ret; 1237} 1238 1239/** 1240 * _lookup_hardreset - fill register bit info for this hwmod/reset line 1241 * @oh: struct omap_hwmod * 1242 * @name: name of the reset line in the context of this hwmod 1243 * @ohri: struct omap_hwmod_rst_info * that this function will fill in 1244 * 1245 * Return the bit position of the reset line that match the 1246 * input name. Return -ENOENT if not found. 1247 */ 1248static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name, 1249 struct omap_hwmod_rst_info *ohri) 1250{ 1251 int i; 1252 1253 for (i = 0; i < oh->rst_lines_cnt; i++) { 1254 const char *rst_line = oh->rst_lines[i].name; 1255 if (!strcmp(rst_line, name)) { 1256 ohri->rst_shift = oh->rst_lines[i].rst_shift; 1257 ohri->st_shift = oh->rst_lines[i].st_shift; 1258 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n", 1259 oh->name, __func__, rst_line, ohri->rst_shift, 1260 ohri->st_shift); 1261 1262 return 0; 1263 } 1264 } 1265 1266 return -ENOENT; 1267} 1268 1269/** 1270 * _assert_hardreset - assert the HW reset line of submodules 1271 * contained in the hwmod module. 1272 * @oh: struct omap_hwmod * 1273 * @name: name of the reset line to lookup and assert 1274 * 1275 * Some IP like dsp, ipu or iva contain processor that require 1276 * an HW reset line to be assert / deassert in order to enable fully 1277 * the IP. 1278 */ 1279static int _assert_hardreset(struct omap_hwmod *oh, const char *name) 1280{ 1281 struct omap_hwmod_rst_info ohri; 1282 u8 ret; 1283 1284 if (!oh) 1285 return -EINVAL; 1286 1287 ret = _lookup_hardreset(oh, name, &ohri); 1288 if (IS_ERR_VALUE(ret)) 1289 return ret; 1290 1291 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 1292 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, 1293 ohri.rst_shift); 1294 else if (cpu_is_omap44xx()) 1295 return omap4_prminst_assert_hardreset(ohri.rst_shift, 1296 oh->clkdm->pwrdm.ptr->prcm_partition, 1297 oh->clkdm->pwrdm.ptr->prcm_offs, 1298 oh->prcm.omap4.rstctrl_offs); 1299 else 1300 return -EINVAL; 1301} 1302 1303/** 1304 * _deassert_hardreset - deassert the HW reset line of submodules contained 1305 * in the hwmod module. 1306 * @oh: struct omap_hwmod * 1307 * @name: name of the reset line to look up and deassert 1308 * 1309 * Some IP like dsp, ipu or iva contain processor that require 1310 * an HW reset line to be assert / deassert in order to enable fully 1311 * the IP. 1312 */ 1313static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) 1314{ 1315 struct omap_hwmod_rst_info ohri; 1316 int ret; 1317 1318 if (!oh) 1319 return -EINVAL; 1320 1321 ret = _lookup_hardreset(oh, name, &ohri); 1322 if (IS_ERR_VALUE(ret)) 1323 return ret; 1324 1325 if (cpu_is_omap24xx() || cpu_is_omap34xx()) { 1326 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, 1327 ohri.rst_shift, 1328 ohri.st_shift); 1329 } else if (cpu_is_omap44xx()) { 1330 if (ohri.st_shift) 1331 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", 1332 oh->name, name); 1333 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift, 1334 oh->clkdm->pwrdm.ptr->prcm_partition, 1335 oh->clkdm->pwrdm.ptr->prcm_offs, 1336 oh->prcm.omap4.rstctrl_offs); 1337 } else { 1338 return -EINVAL; 1339 } 1340 1341 if (ret == -EBUSY) 1342 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); 1343 1344 return ret; 1345} 1346 1347/** 1348 * _read_hardreset - read the HW reset line state of submodules 1349 * contained in the hwmod module 1350 * @oh: struct omap_hwmod * 1351 * @name: name of the reset line to look up and read 1352 * 1353 * Return the state of the reset line. 1354 */ 1355static int _read_hardreset(struct omap_hwmod *oh, const char *name) 1356{ 1357 struct omap_hwmod_rst_info ohri; 1358 u8 ret; 1359 1360 if (!oh) 1361 return -EINVAL; 1362 1363 ret = _lookup_hardreset(oh, name, &ohri); 1364 if (IS_ERR_VALUE(ret)) 1365 return ret; 1366 1367 if (cpu_is_omap24xx() || cpu_is_omap34xx()) { 1368 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, 1369 ohri.st_shift); 1370 } else if (cpu_is_omap44xx()) { 1371 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift, 1372 oh->clkdm->pwrdm.ptr->prcm_partition, 1373 oh->clkdm->pwrdm.ptr->prcm_offs, 1374 oh->prcm.omap4.rstctrl_offs); 1375 } else { 1376 return -EINVAL; 1377 } 1378} 1379 1380/** 1381 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit 1382 * @oh: struct omap_hwmod * 1383 * 1384 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be 1385 * enabled for this to work. Returns -EINVAL if the hwmod cannot be 1386 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if 1387 * the module did not reset in time, or 0 upon success. 1388 * 1389 * In OMAP3 a specific SYSSTATUS register is used to get the reset status. 1390 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead 1391 * use the SYSCONFIG softreset bit to provide the status. 1392 * 1393 * Note that some IP like McBSP do have reset control but don't have 1394 * reset status. 1395 */ 1396static int _ocp_softreset(struct omap_hwmod *oh) 1397{ 1398 u32 v, softrst_mask; 1399 int c = 0; 1400 int ret = 0; 1401 1402 if (!oh->class->sysc || 1403 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 1404 return -EINVAL; 1405 1406 /* clocks must be on for this operation */ 1407 if (oh->_state != _HWMOD_STATE_ENABLED) { 1408 pr_warning("omap_hwmod: %s: reset can only be entered from " 1409 "enabled state\n", oh->name); 1410 return -EINVAL; 1411 } 1412 1413 /* For some modules, all optionnal clocks need to be enabled as well */ 1414 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1415 _enable_optional_clocks(oh); 1416 1417 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name); 1418 1419 v = oh->_sysc_cache; 1420 ret = _set_softreset(oh, &v); 1421 if (ret) 1422 goto dis_opt_clks; 1423 _write_sysconfig(v, oh); 1424 1425 if (oh->class->sysc->srst_udelay) 1426 udelay(oh->class->sysc->srst_udelay); 1427 1428 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) 1429 omap_test_timeout((omap_hwmod_read(oh, 1430 oh->class->sysc->syss_offs) 1431 & SYSS_RESETDONE_MASK), 1432 MAX_MODULE_SOFTRESET_WAIT, c); 1433 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { 1434 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); 1435 omap_test_timeout(!(omap_hwmod_read(oh, 1436 oh->class->sysc->sysc_offs) 1437 & softrst_mask), 1438 MAX_MODULE_SOFTRESET_WAIT, c); 1439 } 1440 1441 if (c == MAX_MODULE_SOFTRESET_WAIT) 1442 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", 1443 oh->name, MAX_MODULE_SOFTRESET_WAIT); 1444 else 1445 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c); 1446 1447 /* 1448 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from 1449 * _wait_target_ready() or _reset() 1450 */ 1451 1452 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0; 1453 1454dis_opt_clks: 1455 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1456 _disable_optional_clocks(oh); 1457 1458 return ret; 1459} 1460 1461/** 1462 * _reset - reset an omap_hwmod 1463 * @oh: struct omap_hwmod * 1464 * 1465 * Resets an omap_hwmod @oh. The default software reset mechanism for 1466 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET 1467 * bit. However, some hwmods cannot be reset via this method: some 1468 * are not targets and therefore have no OCP header registers to 1469 * access; others (like the IVA) have idiosyncratic reset sequences. 1470 * So for these relatively rare cases, custom reset code can be 1471 * supplied in the struct omap_hwmod_class .reset function pointer. 1472 * Passes along the return value from either _reset() or the custom 1473 * reset function - these must return -EINVAL if the hwmod cannot be 1474 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if 1475 * the module did not reset in time, or 0 upon success. 1476 */ 1477static int _reset(struct omap_hwmod *oh) 1478{ 1479 int ret; 1480 1481 pr_debug("omap_hwmod: %s: resetting\n", oh->name); 1482 1483 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh); 1484 1485 if (oh->class->sysc) { 1486 _update_sysc_cache(oh); 1487 _enable_sysc(oh); 1488 } 1489 1490 return ret; 1491} 1492 1493/** 1494 * _enable - enable an omap_hwmod 1495 * @oh: struct omap_hwmod * 1496 * 1497 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's 1498 * register target. Returns -EINVAL if the hwmod is in the wrong 1499 * state or passes along the return value of _wait_target_ready(). 1500 */ 1501static int _enable(struct omap_hwmod *oh) 1502{ 1503 int r; 1504 int hwsup = 0; 1505 1506 pr_debug("omap_hwmod: %s: enabling\n", oh->name); 1507 1508 /* 1509 * hwmods with HWMOD_INIT_NO_IDLE flag set are left 1510 * in enabled state at init. 1511 * Now that someone is really trying to enable them, 1512 * just ensure that the hwmod mux is set. 1513 */ 1514 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) { 1515 /* 1516 * If the caller has mux data populated, do the mux'ing 1517 * which wouldn't have been done as part of the _enable() 1518 * done during setup. 1519 */ 1520 if (oh->mux) 1521 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); 1522 1523 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE; 1524 return 0; 1525 } 1526 1527 if (oh->_state != _HWMOD_STATE_INITIALIZED && 1528 oh->_state != _HWMOD_STATE_IDLE && 1529 oh->_state != _HWMOD_STATE_DISABLED) { 1530 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n", 1531 oh->name); 1532 return -EINVAL; 1533 } 1534 1535 1536 /* 1537 * If an IP contains only one HW reset line, then de-assert it in order 1538 * to allow the module state transition. Otherwise the PRCM will return 1539 * Intransition status, and the init will failed. 1540 */ 1541 if ((oh->_state == _HWMOD_STATE_INITIALIZED || 1542 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) 1543 _deassert_hardreset(oh, oh->rst_lines[0].name); 1544 1545 /* Mux pins for device runtime if populated */ 1546 if (oh->mux && (!oh->mux->enabled || 1547 ((oh->_state == _HWMOD_STATE_IDLE) && 1548 oh->mux->pads_dynamic))) 1549 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); 1550 1551 _add_initiator_dep(oh, mpu_oh); 1552 1553 if (oh->clkdm) { 1554 /* 1555 * A clockdomain must be in SW_SUP before enabling 1556 * completely the module. The clockdomain can be set 1557 * in HW_AUTO only when the module become ready. 1558 */ 1559 hwsup = clkdm_in_hwsup(oh->clkdm); 1560 r = clkdm_hwmod_enable(oh->clkdm, oh); 1561 if (r) { 1562 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", 1563 oh->name, oh->clkdm->name, r); 1564 return r; 1565 } 1566 } 1567 1568 _enable_clocks(oh); 1569 _enable_module(oh); 1570 1571 r = _wait_target_ready(oh); 1572 if (!r) { 1573 /* 1574 * Set the clockdomain to HW_AUTO only if the target is ready, 1575 * assuming that the previous state was HW_AUTO 1576 */ 1577 if (oh->clkdm && hwsup) 1578 clkdm_allow_idle(oh->clkdm); 1579 1580 oh->_state = _HWMOD_STATE_ENABLED; 1581 1582 /* Access the sysconfig only if the target is ready */ 1583 if (oh->class->sysc) { 1584 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) 1585 _update_sysc_cache(oh); 1586 _enable_sysc(oh); 1587 } 1588 } else { 1589 _disable_clocks(oh); 1590 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", 1591 oh->name, r); 1592 1593 if (oh->clkdm) 1594 clkdm_hwmod_disable(oh->clkdm, oh); 1595 } 1596 1597 return r; 1598} 1599 1600/** 1601 * _idle - idle an omap_hwmod 1602 * @oh: struct omap_hwmod * 1603 * 1604 * Idles an omap_hwmod @oh. This should be called once the hwmod has 1605 * no further work. Returns -EINVAL if the hwmod is in the wrong 1606 * state or returns 0. 1607 */ 1608static int _idle(struct omap_hwmod *oh) 1609{ 1610 pr_debug("omap_hwmod: %s: idling\n", oh->name); 1611 1612 if (oh->_state != _HWMOD_STATE_ENABLED) { 1613 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n", 1614 oh->name); 1615 return -EINVAL; 1616 } 1617 1618 if (oh->class->sysc) 1619 _idle_sysc(oh); 1620 _del_initiator_dep(oh, mpu_oh); 1621 1622 _omap4_disable_module(oh); 1623 1624 /* 1625 * The module must be in idle mode before disabling any parents 1626 * clocks. Otherwise, the parent clock might be disabled before 1627 * the module transition is done, and thus will prevent the 1628 * transition to complete properly. 1629 */ 1630 _disable_clocks(oh); 1631 if (oh->clkdm) 1632 clkdm_hwmod_disable(oh->clkdm, oh); 1633 1634 /* Mux pins for device idle if populated */ 1635 if (oh->mux && oh->mux->pads_dynamic) 1636 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); 1637 1638 oh->_state = _HWMOD_STATE_IDLE; 1639 1640 return 0; 1641} 1642 1643/** 1644 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit 1645 * @oh: struct omap_hwmod * 1646 * @autoidle: desired AUTOIDLE bitfield value (0 or 1) 1647 * 1648 * Sets the IP block's OCP autoidle bit in hardware, and updates our 1649 * local copy. Intended to be used by drivers that require 1650 * direct manipulation of the AUTOIDLE bits. 1651 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes 1652 * along the return value from _set_module_autoidle(). 1653 * 1654 * Any users of this function should be scrutinized carefully. 1655 */ 1656int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle) 1657{ 1658 u32 v; 1659 int retval = 0; 1660 unsigned long flags; 1661 1662 if (!oh || oh->_state != _HWMOD_STATE_ENABLED) 1663 return -EINVAL; 1664 1665 spin_lock_irqsave(&oh->_lock, flags); 1666 1667 v = oh->_sysc_cache; 1668 1669 retval = _set_module_autoidle(oh, autoidle, &v); 1670 1671 if (!retval) 1672 _write_sysconfig(v, oh); 1673 1674 spin_unlock_irqrestore(&oh->_lock, flags); 1675 1676 return retval; 1677} 1678 1679/** 1680 * _shutdown - shutdown an omap_hwmod 1681 * @oh: struct omap_hwmod * 1682 * 1683 * Shut down an omap_hwmod @oh. This should be called when the driver 1684 * used for the hwmod is removed or unloaded or if the driver is not 1685 * used by the system. Returns -EINVAL if the hwmod is in the wrong 1686 * state or returns 0. 1687 */ 1688static int _shutdown(struct omap_hwmod *oh) 1689{ 1690 int ret; 1691 u8 prev_state; 1692 1693 if (oh->_state != _HWMOD_STATE_IDLE && 1694 oh->_state != _HWMOD_STATE_ENABLED) { 1695 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n", 1696 oh->name); 1697 return -EINVAL; 1698 } 1699 1700 pr_debug("omap_hwmod: %s: disabling\n", oh->name); 1701 1702 if (oh->class->pre_shutdown) { 1703 prev_state = oh->_state; 1704 if (oh->_state == _HWMOD_STATE_IDLE) 1705 _enable(oh); 1706 ret = oh->class->pre_shutdown(oh); 1707 if (ret) { 1708 if (prev_state == _HWMOD_STATE_IDLE) 1709 _idle(oh); 1710 return ret; 1711 } 1712 } 1713 1714 if (oh->class->sysc) { 1715 if (oh->_state == _HWMOD_STATE_IDLE) 1716 _enable(oh); 1717 _shutdown_sysc(oh); 1718 } 1719 1720 /* clocks and deps are already disabled in idle */ 1721 if (oh->_state == _HWMOD_STATE_ENABLED) { 1722 _del_initiator_dep(oh, mpu_oh); 1723 /* XXX what about the other system initiators here? dma, dsp */ 1724 _omap4_disable_module(oh); 1725 _disable_clocks(oh); 1726 if (oh->clkdm) 1727 clkdm_hwmod_disable(oh->clkdm, oh); 1728 } 1729 /* XXX Should this code also force-disable the optional clocks? */ 1730 1731 /* 1732 * If an IP contains only one HW reset line, then assert it 1733 * after disabling the clocks and before shutting down the IP. 1734 */ 1735 if (oh->rst_lines_cnt == 1) 1736 _assert_hardreset(oh, oh->rst_lines[0].name); 1737 1738 /* Mux pins to safe mode or use populated off mode values */ 1739 if (oh->mux) 1740 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); 1741 1742 oh->_state = _HWMOD_STATE_DISABLED; 1743 1744 return 0; 1745} 1746 1747/** 1748 * _setup - do initial configuration of omap_hwmod 1749 * @oh: struct omap_hwmod * 1750 * 1751 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh 1752 * OCP_SYSCONFIG register. Returns 0. 1753 */ 1754static int _setup(struct omap_hwmod *oh, void *data) 1755{ 1756 int i, r; 1757 u8 postsetup_state; 1758 1759 if (oh->_state != _HWMOD_STATE_CLKS_INITED) 1760 return 0; 1761 1762 /* Set iclk autoidle mode */ 1763 if (oh->slaves_cnt > 0) { 1764 for (i = 0; i < oh->slaves_cnt; i++) { 1765 struct omap_hwmod_ocp_if *os = oh->slaves[i]; 1766 struct clk *c = os->_clk; 1767 1768 if (!c) 1769 continue; 1770 1771 if (os->flags & OCPIF_SWSUP_IDLE) { 1772 /* XXX omap_iclk_deny_idle(c); */ 1773 } else { 1774 /* XXX omap_iclk_allow_idle(c); */ 1775 clk_enable(c); 1776 } 1777 } 1778 } 1779 1780 oh->_state = _HWMOD_STATE_INITIALIZED; 1781 1782 /* 1783 * In the case of hwmod with hardreset that should not be 1784 * de-assert at boot time, we have to keep the module 1785 * initialized, because we cannot enable it properly with the 1786 * reset asserted. Exit without warning because that behavior is 1787 * expected. 1788 */ 1789 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1) 1790 return 0; 1791 1792 r = _enable(oh); 1793 if (r) { 1794 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n", 1795 oh->name, oh->_state); 1796 return 0; 1797 } 1798 1799 if (!(oh->flags & HWMOD_INIT_NO_RESET)) 1800 _reset(oh); 1801 1802 postsetup_state = oh->_postsetup_state; 1803 if (postsetup_state == _HWMOD_STATE_UNKNOWN) 1804 postsetup_state = _HWMOD_STATE_ENABLED; 1805 1806 /* 1807 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data - 1808 * it should be set by the core code as a runtime flag during startup 1809 */ 1810 if ((oh->flags & HWMOD_INIT_NO_IDLE) && 1811 (postsetup_state == _HWMOD_STATE_IDLE)) { 1812 oh->_int_flags |= _HWMOD_SKIP_ENABLE; 1813 postsetup_state = _HWMOD_STATE_ENABLED; 1814 } 1815 1816 if (postsetup_state == _HWMOD_STATE_IDLE) 1817 _idle(oh); 1818 else if (postsetup_state == _HWMOD_STATE_DISABLED) 1819 _shutdown(oh); 1820 else if (postsetup_state != _HWMOD_STATE_ENABLED) 1821 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", 1822 oh->name, postsetup_state); 1823 1824 return 0; 1825} 1826 1827/** 1828 * _register - register a struct omap_hwmod 1829 * @oh: struct omap_hwmod * 1830 * 1831 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod 1832 * already has been registered by the same name; -EINVAL if the 1833 * omap_hwmod is in the wrong state, if @oh is NULL, if the 1834 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a 1835 * name, or if the omap_hwmod's class is missing a name; or 0 upon 1836 * success. 1837 * 1838 * XXX The data should be copied into bootmem, so the original data 1839 * should be marked __initdata and freed after init. This would allow 1840 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note 1841 * that the copy process would be relatively complex due to the large number 1842 * of substructures. 1843 */ 1844static int __init _register(struct omap_hwmod *oh) 1845{ 1846 int ms_id; 1847 1848 if (!oh || !oh->name || !oh->class || !oh->class->name || 1849 (oh->_state != _HWMOD_STATE_UNKNOWN)) 1850 return -EINVAL; 1851 1852 pr_debug("omap_hwmod: %s: registering\n", oh->name); 1853 1854 if (_lookup(oh->name)) 1855 return -EEXIST; 1856 1857 ms_id = _find_mpu_port_index(oh); 1858 if (!IS_ERR_VALUE(ms_id)) 1859 oh->_mpu_port_index = ms_id; 1860 else 1861 oh->_int_flags |= _HWMOD_NO_MPU_PORT; 1862 1863 list_add_tail(&oh->node, &omap_hwmod_list); 1864 1865 spin_lock_init(&oh->_lock); 1866 1867 oh->_state = _HWMOD_STATE_REGISTERED; 1868 1869 /* 1870 * XXX Rather than doing a strcmp(), this should test a flag 1871 * set in the hwmod data, inserted by the autogenerator code. 1872 */ 1873 if (!strcmp(oh->name, MPU_INITIATOR_NAME)) 1874 mpu_oh = oh; 1875 1876 return 0; 1877} 1878 1879 1880/* Public functions */ 1881 1882u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) 1883{ 1884 if (oh->flags & HWMOD_16BIT_REG) 1885 return __raw_readw(oh->_mpu_rt_va + reg_offs); 1886 else 1887 return __raw_readl(oh->_mpu_rt_va + reg_offs); 1888} 1889 1890void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) 1891{ 1892 if (oh->flags & HWMOD_16BIT_REG) 1893 __raw_writew(v, oh->_mpu_rt_va + reg_offs); 1894 else 1895 __raw_writel(v, oh->_mpu_rt_va + reg_offs); 1896} 1897 1898/** 1899 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit 1900 * @oh: struct omap_hwmod * 1901 * 1902 * This is a public function exposed to drivers. Some drivers may need to do 1903 * some settings before and after resetting the device. Those drivers after 1904 * doing the necessary settings could use this function to start a reset by 1905 * setting the SYSCONFIG.SOFTRESET bit. 1906 */ 1907int omap_hwmod_softreset(struct omap_hwmod *oh) 1908{ 1909 u32 v; 1910 int ret; 1911 1912 if (!oh || !(oh->_sysc_cache)) 1913 return -EINVAL; 1914 1915 v = oh->_sysc_cache; 1916 ret = _set_softreset(oh, &v); 1917 if (ret) 1918 goto error; 1919 _write_sysconfig(v, oh); 1920 1921error: 1922 return ret; 1923} 1924 1925/** 1926 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode 1927 * @oh: struct omap_hwmod * 1928 * @idlemode: SIDLEMODE field bits (shifted to bit 0) 1929 * 1930 * Sets the IP block's OCP slave idlemode in hardware, and updates our 1931 * local copy. Intended to be used by drivers that have some erratum 1932 * that requires direct manipulation of the SIDLEMODE bits. Returns 1933 * -EINVAL if @oh is null, or passes along the return value from 1934 * _set_slave_idlemode(). 1935 * 1936 * XXX Does this function have any current users? If not, we should 1937 * remove it; it is better to let the rest of the hwmod code handle this. 1938 * Any users of this function should be scrutinized carefully. 1939 */ 1940int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode) 1941{ 1942 u32 v; 1943 int retval = 0; 1944 1945 if (!oh) 1946 return -EINVAL; 1947 1948 v = oh->_sysc_cache; 1949 1950 retval = _set_slave_idlemode(oh, idlemode, &v); 1951 if (!retval) 1952 _write_sysconfig(v, oh); 1953 1954 return retval; 1955} 1956 1957/** 1958 * omap_hwmod_lookup - look up a registered omap_hwmod by name 1959 * @name: name of the omap_hwmod to look up 1960 * 1961 * Given a @name of an omap_hwmod, return a pointer to the registered 1962 * struct omap_hwmod *, or NULL upon error. 1963 */ 1964struct omap_hwmod *omap_hwmod_lookup(const char *name) 1965{ 1966 struct omap_hwmod *oh; 1967 1968 if (!name) 1969 return NULL; 1970 1971 oh = _lookup(name); 1972 1973 return oh; 1974} 1975 1976/** 1977 * omap_hwmod_for_each - call function for each registered omap_hwmod 1978 * @fn: pointer to a callback function 1979 * @data: void * data to pass to callback function 1980 * 1981 * Call @fn for each registered omap_hwmod, passing @data to each 1982 * function. @fn must return 0 for success or any other value for 1983 * failure. If @fn returns non-zero, the iteration across omap_hwmods 1984 * will stop and the non-zero return value will be passed to the 1985 * caller of omap_hwmod_for_each(). @fn is called with 1986 * omap_hwmod_for_each() held. 1987 */ 1988int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), 1989 void *data) 1990{ 1991 struct omap_hwmod *temp_oh; 1992 int ret = 0; 1993 1994 if (!fn) 1995 return -EINVAL; 1996 1997 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 1998 ret = (*fn)(temp_oh, data); 1999 if (ret) 2000 break; 2001 } 2002 2003 return ret; 2004} 2005 2006/** 2007 * omap_hwmod_register - register an array of hwmods 2008 * @ohs: pointer to an array of omap_hwmods to register 2009 * 2010 * Intended to be called early in boot before the clock framework is 2011 * initialized. If @ohs is not null, will register all omap_hwmods 2012 * listed in @ohs that are valid for this chip. Returns 0. 2013 */ 2014int __init omap_hwmod_register(struct omap_hwmod **ohs) 2015{ 2016 int r, i; 2017 2018 if (!ohs) 2019 return 0; 2020 2021 i = 0; 2022 do { 2023 r = _register(ohs[i]); 2024 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name, 2025 r); 2026 } while (ohs[++i]); 2027 2028 return 0; 2029} 2030 2031/* 2032 * _populate_mpu_rt_base - populate the virtual address for a hwmod 2033 * 2034 * Must be called only from omap_hwmod_setup_*() so ioremap works properly. 2035 * Assumes the caller takes care of locking if needed. 2036 */ 2037static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data) 2038{ 2039 if (oh->_state != _HWMOD_STATE_REGISTERED) 2040 return 0; 2041 2042 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 2043 return 0; 2044 2045 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); 2046 2047 return 0; 2048} 2049 2050/** 2051 * omap_hwmod_setup_one - set up a single hwmod 2052 * @oh_name: const char * name of the already-registered hwmod to set up 2053 * 2054 * Must be called after omap2_clk_init(). Resolves the struct clk 2055 * names to struct clk pointers for each registered omap_hwmod. Also 2056 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon 2057 * success. 2058 */ 2059int __init omap_hwmod_setup_one(const char *oh_name) 2060{ 2061 struct omap_hwmod *oh; 2062 int r; 2063 2064 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__); 2065 2066 if (!mpu_oh) { 2067 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n", 2068 oh_name, MPU_INITIATOR_NAME); 2069 return -EINVAL; 2070 } 2071 2072 oh = _lookup(oh_name); 2073 if (!oh) { 2074 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name); 2075 return -EINVAL; 2076 } 2077 2078 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh) 2079 omap_hwmod_setup_one(MPU_INITIATOR_NAME); 2080 2081 r = _populate_mpu_rt_base(oh, NULL); 2082 if (IS_ERR_VALUE(r)) { 2083 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name); 2084 return -EINVAL; 2085 } 2086 2087 r = _init_clocks(oh, NULL); 2088 if (IS_ERR_VALUE(r)) { 2089 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name); 2090 return -EINVAL; 2091 } 2092 2093 _setup(oh, NULL); 2094 2095 return 0; 2096} 2097 2098/** 2099 * omap_hwmod_setup - do some post-clock framework initialization 2100 * 2101 * Must be called after omap2_clk_init(). Resolves the struct clk names 2102 * to struct clk pointers for each registered omap_hwmod. Also calls 2103 * _setup() on each hwmod. Returns 0 upon success. 2104 */ 2105static int __init omap_hwmod_setup_all(void) 2106{ 2107 int r; 2108 2109 if (!mpu_oh) { 2110 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n", 2111 __func__, MPU_INITIATOR_NAME); 2112 return -EINVAL; 2113 } 2114 2115 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL); 2116 2117 r = omap_hwmod_for_each(_init_clocks, NULL); 2118 WARN(IS_ERR_VALUE(r), 2119 "omap_hwmod: %s: _init_clocks failed\n", __func__); 2120 2121 omap_hwmod_for_each(_setup, NULL); 2122 2123 return 0; 2124} 2125core_initcall(omap_hwmod_setup_all); 2126 2127/** 2128 * omap_hwmod_enable - enable an omap_hwmod 2129 * @oh: struct omap_hwmod * 2130 * 2131 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable(). 2132 * Returns -EINVAL on error or passes along the return value from _enable(). 2133 */ 2134int omap_hwmod_enable(struct omap_hwmod *oh) 2135{ 2136 int r; 2137 unsigned long flags; 2138 2139 if (!oh) 2140 return -EINVAL; 2141 2142 spin_lock_irqsave(&oh->_lock, flags); 2143 r = _enable(oh); 2144 spin_unlock_irqrestore(&oh->_lock, flags); 2145 2146 return r; 2147} 2148 2149/** 2150 * omap_hwmod_idle - idle an omap_hwmod 2151 * @oh: struct omap_hwmod * 2152 * 2153 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle(). 2154 * Returns -EINVAL on error or passes along the return value from _idle(). 2155 */ 2156int omap_hwmod_idle(struct omap_hwmod *oh) 2157{ 2158 unsigned long flags; 2159 2160 if (!oh) 2161 return -EINVAL; 2162 2163 spin_lock_irqsave(&oh->_lock, flags); 2164 _idle(oh); 2165 spin_unlock_irqrestore(&oh->_lock, flags); 2166 2167 return 0; 2168} 2169 2170/** 2171 * omap_hwmod_shutdown - shutdown an omap_hwmod 2172 * @oh: struct omap_hwmod * 2173 * 2174 * Shutdown an omap_hwmod @oh. Intended to be called by 2175 * omap_device_shutdown(). Returns -EINVAL on error or passes along 2176 * the return value from _shutdown(). 2177 */ 2178int omap_hwmod_shutdown(struct omap_hwmod *oh) 2179{ 2180 unsigned long flags; 2181 2182 if (!oh) 2183 return -EINVAL; 2184 2185 spin_lock_irqsave(&oh->_lock, flags); 2186 _shutdown(oh); 2187 spin_unlock_irqrestore(&oh->_lock, flags); 2188 2189 return 0; 2190} 2191 2192/** 2193 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks 2194 * @oh: struct omap_hwmod *oh 2195 * 2196 * Intended to be called by the omap_device code. 2197 */ 2198int omap_hwmod_enable_clocks(struct omap_hwmod *oh) 2199{ 2200 unsigned long flags; 2201 2202 spin_lock_irqsave(&oh->_lock, flags); 2203 _enable_clocks(oh); 2204 spin_unlock_irqrestore(&oh->_lock, flags); 2205 2206 return 0; 2207} 2208 2209/** 2210 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks 2211 * @oh: struct omap_hwmod *oh 2212 * 2213 * Intended to be called by the omap_device code. 2214 */ 2215int omap_hwmod_disable_clocks(struct omap_hwmod *oh) 2216{ 2217 unsigned long flags; 2218 2219 spin_lock_irqsave(&oh->_lock, flags); 2220 _disable_clocks(oh); 2221 spin_unlock_irqrestore(&oh->_lock, flags); 2222 2223 return 0; 2224} 2225 2226/** 2227 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete 2228 * @oh: struct omap_hwmod *oh 2229 * 2230 * Intended to be called by drivers and core code when all posted 2231 * writes to a device must complete before continuing further 2232 * execution (for example, after clearing some device IRQSTATUS 2233 * register bits) 2234 * 2235 * XXX what about targets with multiple OCP threads? 2236 */ 2237void omap_hwmod_ocp_barrier(struct omap_hwmod *oh) 2238{ 2239 BUG_ON(!oh); 2240 2241 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) { 2242 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n", 2243 oh->name); 2244 return; 2245 } 2246 2247 /* 2248 * Forces posted writes to complete on the OCP thread handling 2249 * register writes 2250 */ 2251 omap_hwmod_read(oh, oh->class->sysc->sysc_offs); 2252} 2253 2254/** 2255 * omap_hwmod_reset - reset the hwmod 2256 * @oh: struct omap_hwmod * 2257 * 2258 * Under some conditions, a driver may wish to reset the entire device. 2259 * Called from omap_device code. Returns -EINVAL on error or passes along 2260 * the return value from _reset(). 2261 */ 2262int omap_hwmod_reset(struct omap_hwmod *oh) 2263{ 2264 int r; 2265 unsigned long flags; 2266 2267 if (!oh) 2268 return -EINVAL; 2269 2270 spin_lock_irqsave(&oh->_lock, flags); 2271 r = _reset(oh); 2272 spin_unlock_irqrestore(&oh->_lock, flags); 2273 2274 return r; 2275} 2276 2277/** 2278 * omap_hwmod_count_resources - count number of struct resources needed by hwmod 2279 * @oh: struct omap_hwmod * 2280 * @res: pointer to the first element of an array of struct resource to fill 2281 * 2282 * Count the number of struct resource array elements necessary to 2283 * contain omap_hwmod @oh resources. Intended to be called by code 2284 * that registers omap_devices. Intended to be used to determine the 2285 * size of a dynamically-allocated struct resource array, before 2286 * calling omap_hwmod_fill_resources(). Returns the number of struct 2287 * resource array elements needed. 2288 * 2289 * XXX This code is not optimized. It could attempt to merge adjacent 2290 * resource IDs. 2291 * 2292 */ 2293int omap_hwmod_count_resources(struct omap_hwmod *oh) 2294{ 2295 int ret, i; 2296 2297 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh); 2298 2299 for (i = 0; i < oh->slaves_cnt; i++) 2300 ret += _count_ocp_if_addr_spaces(oh->slaves[i]); 2301 2302 return ret; 2303} 2304 2305/** 2306 * omap_hwmod_fill_resources - fill struct resource array with hwmod data 2307 * @oh: struct omap_hwmod * 2308 * @res: pointer to the first element of an array of struct resource to fill 2309 * 2310 * Fill the struct resource array @res with resource data from the 2311 * omap_hwmod @oh. Intended to be called by code that registers 2312 * omap_devices. See also omap_hwmod_count_resources(). Returns the 2313 * number of array elements filled. 2314 */ 2315int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) 2316{ 2317 int i, j, mpu_irqs_cnt, sdma_reqs_cnt; 2318 int r = 0; 2319 2320 /* For each IRQ, DMA, memory area, fill in array.*/ 2321 2322 mpu_irqs_cnt = _count_mpu_irqs(oh); 2323 for (i = 0; i < mpu_irqs_cnt; i++) { 2324 (res + r)->name = (oh->mpu_irqs + i)->name; 2325 (res + r)->start = (oh->mpu_irqs + i)->irq; 2326 (res + r)->end = (oh->mpu_irqs + i)->irq; 2327 (res + r)->flags = IORESOURCE_IRQ; 2328 r++; 2329 } 2330 2331 sdma_reqs_cnt = _count_sdma_reqs(oh); 2332 for (i = 0; i < sdma_reqs_cnt; i++) { 2333 (res + r)->name = (oh->sdma_reqs + i)->name; 2334 (res + r)->start = (oh->sdma_reqs + i)->dma_req; 2335 (res + r)->end = (oh->sdma_reqs + i)->dma_req; 2336 (res + r)->flags = IORESOURCE_DMA; 2337 r++; 2338 } 2339 2340 for (i = 0; i < oh->slaves_cnt; i++) { 2341 struct omap_hwmod_ocp_if *os; 2342 int addr_cnt; 2343 2344 os = oh->slaves[i]; 2345 addr_cnt = _count_ocp_if_addr_spaces(os); 2346 2347 for (j = 0; j < addr_cnt; j++) { 2348 (res + r)->name = (os->addr + j)->name; 2349 (res + r)->start = (os->addr + j)->pa_start; 2350 (res + r)->end = (os->addr + j)->pa_end; 2351 (res + r)->flags = IORESOURCE_MEM; 2352 r++; 2353 } 2354 } 2355 2356 return r; 2357} 2358 2359/** 2360 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain 2361 * @oh: struct omap_hwmod * 2362 * 2363 * Return the powerdomain pointer associated with the OMAP module 2364 * @oh's main clock. If @oh does not have a main clk, return the 2365 * powerdomain associated with the interface clock associated with the 2366 * module's MPU port. (XXX Perhaps this should use the SDMA port 2367 * instead?) Returns NULL on error, or a struct powerdomain * on 2368 * success. 2369 */ 2370struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) 2371{ 2372 struct clk *c; 2373 2374 if (!oh) 2375 return NULL; 2376 2377 if (oh->_clk) { 2378 c = oh->_clk; 2379 } else { 2380 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 2381 return NULL; 2382 c = oh->slaves[oh->_mpu_port_index]->_clk; 2383 } 2384 2385 if (!c->clkdm) 2386 return NULL; 2387 2388 return c->clkdm->pwrdm.ptr; 2389 2390} 2391 2392/** 2393 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU) 2394 * @oh: struct omap_hwmod * 2395 * 2396 * Returns the virtual address corresponding to the beginning of the 2397 * module's register target, in the address range that is intended to 2398 * be used by the MPU. Returns the virtual address upon success or NULL 2399 * upon error. 2400 */ 2401void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh) 2402{ 2403 if (!oh) 2404 return NULL; 2405 2406 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 2407 return NULL; 2408 2409 if (oh->_state == _HWMOD_STATE_UNKNOWN) 2410 return NULL; 2411 2412 return oh->_mpu_rt_va; 2413} 2414 2415/** 2416 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh 2417 * @oh: struct omap_hwmod * 2418 * @init_oh: struct omap_hwmod * (initiator) 2419 * 2420 * Add a sleep dependency between the initiator @init_oh and @oh. 2421 * Intended to be called by DSP/Bridge code via platform_data for the 2422 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge 2423 * code needs to add/del initiator dependencies dynamically 2424 * before/after accessing a device. Returns the return value from 2425 * _add_initiator_dep(). 2426 * 2427 * XXX Keep a usecount in the clockdomain code 2428 */ 2429int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, 2430 struct omap_hwmod *init_oh) 2431{ 2432 return _add_initiator_dep(oh, init_oh); 2433} 2434 2435/* 2436 * XXX what about functions for drivers to save/restore ocp_sysconfig 2437 * for context save/restore operations? 2438 */ 2439 2440/** 2441 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh 2442 * @oh: struct omap_hwmod * 2443 * @init_oh: struct omap_hwmod * (initiator) 2444 * 2445 * Remove a sleep dependency between the initiator @init_oh and @oh. 2446 * Intended to be called by DSP/Bridge code via platform_data for the 2447 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge 2448 * code needs to add/del initiator dependencies dynamically 2449 * before/after accessing a device. Returns the return value from 2450 * _del_initiator_dep(). 2451 * 2452 * XXX Keep a usecount in the clockdomain code 2453 */ 2454int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, 2455 struct omap_hwmod *init_oh) 2456{ 2457 return _del_initiator_dep(oh, init_oh); 2458} 2459 2460/** 2461 * omap_hwmod_enable_wakeup - allow device to wake up the system 2462 * @oh: struct omap_hwmod * 2463 * 2464 * Sets the module OCP socket ENAWAKEUP bit to allow the module to 2465 * send wakeups to the PRCM, and enable I/O ring wakeup events for 2466 * this IP block if it has dynamic mux entries. Eventually this 2467 * should set PRCM wakeup registers to cause the PRCM to receive 2468 * wakeup events from the module. Does not set any wakeup routing 2469 * registers beyond this point - if the module is to wake up any other 2470 * module or subsystem, that must be set separately. Called by 2471 * omap_device code. Returns -EINVAL on error or 0 upon success. 2472 */ 2473int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) 2474{ 2475 unsigned long flags; 2476 u32 v; 2477 2478 spin_lock_irqsave(&oh->_lock, flags); 2479 2480 if (oh->class->sysc && 2481 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { 2482 v = oh->_sysc_cache; 2483 _enable_wakeup(oh, &v); 2484 _write_sysconfig(v, oh); 2485 } 2486 2487 _set_idle_ioring_wakeup(oh, true); 2488 spin_unlock_irqrestore(&oh->_lock, flags); 2489 2490 return 0; 2491} 2492 2493/** 2494 * omap_hwmod_disable_wakeup - prevent device from waking the system 2495 * @oh: struct omap_hwmod * 2496 * 2497 * Clears the module OCP socket ENAWAKEUP bit to prevent the module 2498 * from sending wakeups to the PRCM, and disable I/O ring wakeup 2499 * events for this IP block if it has dynamic mux entries. Eventually 2500 * this should clear PRCM wakeup registers to cause the PRCM to ignore 2501 * wakeup events from the module. Does not set any wakeup routing 2502 * registers beyond this point - if the module is to wake up any other 2503 * module or subsystem, that must be set separately. Called by 2504 * omap_device code. Returns -EINVAL on error or 0 upon success. 2505 */ 2506int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) 2507{ 2508 unsigned long flags; 2509 u32 v; 2510 2511 spin_lock_irqsave(&oh->_lock, flags); 2512 2513 if (oh->class->sysc && 2514 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { 2515 v = oh->_sysc_cache; 2516 _disable_wakeup(oh, &v); 2517 _write_sysconfig(v, oh); 2518 } 2519 2520 _set_idle_ioring_wakeup(oh, false); 2521 spin_unlock_irqrestore(&oh->_lock, flags); 2522 2523 return 0; 2524} 2525 2526/** 2527 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules 2528 * contained in the hwmod module. 2529 * @oh: struct omap_hwmod * 2530 * @name: name of the reset line to lookup and assert 2531 * 2532 * Some IP like dsp, ipu or iva contain processor that require 2533 * an HW reset line to be assert / deassert in order to enable fully 2534 * the IP. Returns -EINVAL if @oh is null or if the operation is not 2535 * yet supported on this OMAP; otherwise, passes along the return value 2536 * from _assert_hardreset(). 2537 */ 2538int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name) 2539{ 2540 int ret; 2541 unsigned long flags; 2542 2543 if (!oh) 2544 return -EINVAL; 2545 2546 spin_lock_irqsave(&oh->_lock, flags); 2547 ret = _assert_hardreset(oh, name); 2548 spin_unlock_irqrestore(&oh->_lock, flags); 2549 2550 return ret; 2551} 2552 2553/** 2554 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules 2555 * contained in the hwmod module. 2556 * @oh: struct omap_hwmod * 2557 * @name: name of the reset line to look up and deassert 2558 * 2559 * Some IP like dsp, ipu or iva contain processor that require 2560 * an HW reset line to be assert / deassert in order to enable fully 2561 * the IP. Returns -EINVAL if @oh is null or if the operation is not 2562 * yet supported on this OMAP; otherwise, passes along the return value 2563 * from _deassert_hardreset(). 2564 */ 2565int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name) 2566{ 2567 int ret; 2568 unsigned long flags; 2569 2570 if (!oh) 2571 return -EINVAL; 2572 2573 spin_lock_irqsave(&oh->_lock, flags); 2574 ret = _deassert_hardreset(oh, name); 2575 spin_unlock_irqrestore(&oh->_lock, flags); 2576 2577 return ret; 2578} 2579 2580/** 2581 * omap_hwmod_read_hardreset - read the HW reset line state of submodules 2582 * contained in the hwmod module 2583 * @oh: struct omap_hwmod * 2584 * @name: name of the reset line to look up and read 2585 * 2586 * Return the current state of the hwmod @oh's reset line named @name: 2587 * returns -EINVAL upon parameter error or if this operation 2588 * is unsupported on the current OMAP; otherwise, passes along the return 2589 * value from _read_hardreset(). 2590 */ 2591int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name) 2592{ 2593 int ret; 2594 unsigned long flags; 2595 2596 if (!oh) 2597 return -EINVAL; 2598 2599 spin_lock_irqsave(&oh->_lock, flags); 2600 ret = _read_hardreset(oh, name); 2601 spin_unlock_irqrestore(&oh->_lock, flags); 2602 2603 return ret; 2604} 2605 2606 2607/** 2608 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname 2609 * @classname: struct omap_hwmod_class name to search for 2610 * @fn: callback function pointer to call for each hwmod in class @classname 2611 * @user: arbitrary context data to pass to the callback function 2612 * 2613 * For each omap_hwmod of class @classname, call @fn. 2614 * If the callback function returns something other than 2615 * zero, the iterator is terminated, and the callback function's return 2616 * value is passed back to the caller. Returns 0 upon success, -EINVAL 2617 * if @classname or @fn are NULL, or passes back the error code from @fn. 2618 */ 2619int omap_hwmod_for_each_by_class(const char *classname, 2620 int (*fn)(struct omap_hwmod *oh, 2621 void *user), 2622 void *user) 2623{ 2624 struct omap_hwmod *temp_oh; 2625 int ret = 0; 2626 2627 if (!classname || !fn) 2628 return -EINVAL; 2629 2630 pr_debug("omap_hwmod: %s: looking for modules of class %s\n", 2631 __func__, classname); 2632 2633 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 2634 if (!strcmp(temp_oh->class->name, classname)) { 2635 pr_debug("omap_hwmod: %s: %s: calling callback fn\n", 2636 __func__, temp_oh->name); 2637 ret = (*fn)(temp_oh, user); 2638 if (ret) 2639 break; 2640 } 2641 } 2642 2643 if (ret) 2644 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n", 2645 __func__, ret); 2646 2647 return ret; 2648} 2649 2650/** 2651 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod 2652 * @oh: struct omap_hwmod * 2653 * @state: state that _setup() should leave the hwmod in 2654 * 2655 * Sets the hwmod state that @oh will enter at the end of _setup() 2656 * (called by omap_hwmod_setup_*()). Only valid to call between 2657 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns 2658 * 0 upon success or -EINVAL if there is a problem with the arguments 2659 * or if the hwmod is in the wrong state. 2660 */ 2661int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state) 2662{ 2663 int ret; 2664 unsigned long flags; 2665 2666 if (!oh) 2667 return -EINVAL; 2668 2669 if (state != _HWMOD_STATE_DISABLED && 2670 state != _HWMOD_STATE_ENABLED && 2671 state != _HWMOD_STATE_IDLE) 2672 return -EINVAL; 2673 2674 spin_lock_irqsave(&oh->_lock, flags); 2675 2676 if (oh->_state != _HWMOD_STATE_REGISTERED) { 2677 ret = -EINVAL; 2678 goto ohsps_unlock; 2679 } 2680 2681 oh->_postsetup_state = state; 2682 ret = 0; 2683 2684ohsps_unlock: 2685 spin_unlock_irqrestore(&oh->_lock, flags); 2686 2687 return ret; 2688} 2689 2690/** 2691 * omap_hwmod_get_context_loss_count - get lost context count 2692 * @oh: struct omap_hwmod * 2693 * 2694 * Query the powerdomain of of @oh to get the context loss 2695 * count for this device. 2696 * 2697 * Returns the context loss count of the powerdomain assocated with @oh 2698 * upon success, or zero if no powerdomain exists for @oh. 2699 */ 2700int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) 2701{ 2702 struct powerdomain *pwrdm; 2703 int ret = 0; 2704 2705 pwrdm = omap_hwmod_get_pwrdm(oh); 2706 if (pwrdm) 2707 ret = pwrdm_get_context_loss_count(pwrdm); 2708 2709 return ret; 2710} 2711 2712/** 2713 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup 2714 * @oh: struct omap_hwmod * 2715 * 2716 * Prevent the hwmod @oh from being reset during the setup process. 2717 * Intended for use by board-*.c files on boards with devices that 2718 * cannot tolerate being reset. Must be called before the hwmod has 2719 * been set up. Returns 0 upon success or negative error code upon 2720 * failure. 2721 */ 2722int omap_hwmod_no_setup_reset(struct omap_hwmod *oh) 2723{ 2724 if (!oh) 2725 return -EINVAL; 2726 2727 if (oh->_state != _HWMOD_STATE_REGISTERED) { 2728 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n", 2729 oh->name); 2730 return -EINVAL; 2731 } 2732 2733 oh->flags |= HWMOD_INIT_NO_RESET; 2734 2735 return 0; 2736} 2737 2738/** 2739 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ 2740 * @oh: struct omap_hwmod * containing hwmod mux entries 2741 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup 2742 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup 2743 * 2744 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux 2745 * entry number @pad_idx for the hwmod @oh, trigger the interrupt 2746 * service routine for the hwmod's mpu_irqs array index @irq_idx. If 2747 * this function is not called for a given pad_idx, then the ISR 2748 * associated with @oh's first MPU IRQ will be triggered when an I/O 2749 * pad wakeup occurs on that pad. Note that @pad_idx is the index of 2750 * the _dynamic or wakeup_ entry: if there are other entries not 2751 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these 2752 * entries are NOT COUNTED in the dynamic pad index. This function 2753 * must be called separately for each pad that requires its interrupt 2754 * to be re-routed this way. Returns -EINVAL if there is an argument 2755 * problem or if @oh does not have hwmod mux entries or MPU IRQs; 2756 * returns -ENOMEM if memory cannot be allocated; or 0 upon success. 2757 * 2758 * XXX This function interface is fragile. Rather than using array 2759 * indexes, which are subject to unpredictable change, it should be 2760 * using hwmod IRQ names, and some other stable key for the hwmod mux 2761 * pad records. 2762 */ 2763int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx) 2764{ 2765 int nr_irqs; 2766 2767 might_sleep(); 2768 2769 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 || 2770 pad_idx >= oh->mux->nr_pads_dynamic) 2771 return -EINVAL; 2772 2773 /* Check the number of available mpu_irqs */ 2774 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++) 2775 ; 2776 2777 if (irq_idx >= nr_irqs) 2778 return -EINVAL; 2779 2780 if (!oh->mux->irqs) { 2781 /* XXX What frees this? */ 2782 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic, 2783 GFP_KERNEL); 2784 if (!oh->mux->irqs) 2785 return -ENOMEM; 2786 } 2787 oh->mux->irqs[pad_idx] = irq_idx; 2788 2789 return 0; 2790} 2791