1/* linux/arch/arm/plat-s3c24xx/s3c244x.c
2 *
3 * Copyright (c) 2004-2006 Simtec Electronics
4 *   Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/platform_device.h>
21#include <linux/device.h>
22#include <linux/syscore_ops.h>
23#include <linux/clk.h>
24#include <linux/io.h>
25
26#include <asm/system_misc.h>
27#include <asm/mach/arch.h>
28#include <asm/mach/map.h>
29#include <asm/mach/irq.h>
30
31#include <mach/hardware.h>
32#include <asm/irq.h>
33
34#include <plat/cpu-freq.h>
35
36#include <mach/regs-clock.h>
37#include <plat/regs-serial.h>
38#include <mach/regs-gpio.h>
39#include <mach/regs-gpioj.h>
40#include <mach/regs-dsc.h>
41
42#include <plat/s3c2410.h>
43#include <plat/s3c244x.h>
44#include <plat/clock.h>
45#include <plat/devs.h>
46#include <plat/cpu.h>
47#include <plat/pm.h>
48#include <plat/pll.h>
49#include <plat/nand-core.h>
50#include <plat/watchdog-reset.h>
51
52static struct map_desc s3c244x_iodesc[] __initdata = {
53	IODESC_ENT(CLKPWR),
54	IODESC_ENT(TIMER),
55	IODESC_ENT(WATCHDOG),
56};
57
58/* uart initialisation */
59
60void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
61{
62	s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
63}
64
65void __init s3c244x_map_io(void)
66{
67	/* register our io-tables */
68
69	iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
70
71	/* rename any peripherals used differing from the s3c2410 */
72
73	s3c_device_sdi.name  = "s3c2440-sdi";
74	s3c_device_i2c0.name  = "s3c2440-i2c";
75	s3c_nand_setname("s3c2440-nand");
76	s3c_device_ts.name = "s3c2440-ts";
77	s3c_device_usbgadget.name = "s3c2440-usbgadget";
78}
79
80void __init_or_cpufreq s3c244x_setup_clocks(void)
81{
82	struct clk *xtal_clk;
83	unsigned long clkdiv;
84	unsigned long camdiv;
85	unsigned long xtal;
86	unsigned long hclk, fclk, pclk;
87	int hdiv = 1;
88
89	xtal_clk = clk_get(NULL, "xtal");
90	xtal = clk_get_rate(xtal_clk);
91	clk_put(xtal_clk);
92
93	fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
94
95	clkdiv = __raw_readl(S3C2410_CLKDIVN);
96	camdiv = __raw_readl(S3C2440_CAMDIVN);
97
98	/* work out clock scalings */
99
100	switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
101	case S3C2440_CLKDIVN_HDIVN_1:
102		hdiv = 1;
103		break;
104
105	case S3C2440_CLKDIVN_HDIVN_2:
106		hdiv = 2;
107		break;
108
109	case S3C2440_CLKDIVN_HDIVN_4_8:
110		hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
111		break;
112
113	case S3C2440_CLKDIVN_HDIVN_3_6:
114		hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
115		break;
116	}
117
118	hclk = fclk / hdiv;
119	pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
120
121	/* print brief summary of clocks, etc */
122
123	printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
124	       print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
125
126	s3c24xx_setup_clocks(fclk, hclk, pclk);
127}
128
129void __init s3c244x_init_clocks(int xtal)
130{
131	/* initialise the clocks here, to allow other things like the
132	 * console to use them, and to add new ones after the initialisation
133	 */
134
135	s3c24xx_register_baseclocks(xtal);
136	s3c244x_setup_clocks();
137	s3c2410_baseclk_add();
138}
139
140/* Since the S3C2442 and S3C2440 share items, put both subsystems here */
141
142struct bus_type s3c2440_subsys = {
143	.name		= "s3c2440-core",
144	.dev_name	= "s3c2440-core",
145};
146
147struct bus_type s3c2442_subsys = {
148	.name		= "s3c2442-core",
149	.dev_name	= "s3c2442-core",
150};
151
152/* need to register the subsystem before we actually register the device, and
153 * we also need to ensure that it has been initialised before any of the
154 * drivers even try to use it (even if not on an s3c2440 based system)
155 * as a driver which may support both 2410 and 2440 may try and use it.
156*/
157
158static int __init s3c2440_core_init(void)
159{
160	return subsys_system_register(&s3c2440_subsys, NULL);
161}
162
163core_initcall(s3c2440_core_init);
164
165static int __init s3c2442_core_init(void)
166{
167	return subsys_system_register(&s3c2442_subsys, NULL);
168}
169
170core_initcall(s3c2442_core_init);
171
172
173#ifdef CONFIG_PM
174static struct sleep_save s3c244x_sleep[] = {
175	SAVE_ITEM(S3C2440_DSC0),
176	SAVE_ITEM(S3C2440_DSC1),
177	SAVE_ITEM(S3C2440_GPJDAT),
178	SAVE_ITEM(S3C2440_GPJCON),
179	SAVE_ITEM(S3C2440_GPJUP)
180};
181
182static int s3c244x_suspend(void)
183{
184	s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
185	return 0;
186}
187
188static void s3c244x_resume(void)
189{
190	s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
191}
192#else
193#define s3c244x_suspend NULL
194#define s3c244x_resume  NULL
195#endif
196
197struct syscore_ops s3c244x_pm_syscore_ops = {
198	.suspend	= s3c244x_suspend,
199	.resume		= s3c244x_resume,
200};
201
202void s3c244x_restart(char mode, const char *cmd)
203{
204	if (mode == 's')
205		soft_restart(0);
206
207	arch_wdt_reset();
208
209	/* we'll take a jump through zero as a poor second */
210	soft_restart(0);
211}
212