1/* arch/arm/plat-samsung/adc.c
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 *	http://armlinux.simtec.co.uk/
5 *	Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
6 *
7 * Samsung ADC device core
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
12*/
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/sched.h>
18#include <linux/list.h>
19#include <linux/slab.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/interrupt.h>
23#include <linux/io.h>
24#include <linux/regulator/consumer.h>
25
26#include <plat/regs-adc.h>
27#include <plat/adc.h>
28
29/* This driver is designed to control the usage of the ADC block between
30 * the touchscreen and any other drivers that may need to use it, such as
31 * the hwmon driver.
32 *
33 * Priority will be given to the touchscreen driver, but as this itself is
34 * rate limited it should not starve other requests which are processed in
35 * order that they are received.
36 *
37 * Each user registers to get a client block which uniquely identifies it
38 * and stores information such as the necessary functions to callback when
39 * action is required.
40 */
41
42enum s3c_cpu_type {
43	TYPE_ADCV1, /* S3C24XX */
44	TYPE_ADCV11, /* S3C2443 */
45	TYPE_ADCV12, /* S3C2416, S3C2450 */
46	TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */
47	TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */
48};
49
50struct s3c_adc_client {
51	struct platform_device	*pdev;
52	struct list_head	 pend;
53	wait_queue_head_t	*wait;
54
55	unsigned int		 nr_samples;
56	int			 result;
57	unsigned char		 is_ts;
58	unsigned char		 channel;
59
60	void	(*select_cb)(struct s3c_adc_client *c, unsigned selected);
61	void	(*convert_cb)(struct s3c_adc_client *c,
62			      unsigned val1, unsigned val2,
63			      unsigned *samples_left);
64};
65
66struct adc_device {
67	struct platform_device	*pdev;
68	struct platform_device	*owner;
69	struct clk		*clk;
70	struct s3c_adc_client	*cur;
71	struct s3c_adc_client	*ts_pend;
72	void __iomem		*regs;
73	spinlock_t		 lock;
74
75	unsigned int		 prescale;
76
77	int			 irq;
78	struct regulator	*vdd;
79};
80
81static struct adc_device *adc_dev;
82
83static LIST_HEAD(adc_pending);	/* protected by adc_device.lock */
84
85#define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg)
86
87static inline void s3c_adc_convert(struct adc_device *adc)
88{
89	unsigned con = readl(adc->regs + S3C2410_ADCCON);
90
91	con |= S3C2410_ADCCON_ENABLE_START;
92	writel(con, adc->regs + S3C2410_ADCCON);
93}
94
95static inline void s3c_adc_select(struct adc_device *adc,
96				  struct s3c_adc_client *client)
97{
98	unsigned con = readl(adc->regs + S3C2410_ADCCON);
99	enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
100
101	client->select_cb(client, 1);
102
103	if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV2)
104		con &= ~S3C2410_ADCCON_MUXMASK;
105	con &= ~S3C2410_ADCCON_STDBM;
106	con &= ~S3C2410_ADCCON_STARTMASK;
107
108	if (!client->is_ts) {
109		if (cpu == TYPE_ADCV3)
110			writel(client->channel & 0xf, adc->regs + S5P_ADCMUX);
111		else if (cpu == TYPE_ADCV11 || cpu == TYPE_ADCV12)
112			writel(client->channel & 0xf,
113						adc->regs + S3C2443_ADCMUX);
114		else
115			con |= S3C2410_ADCCON_SELMUX(client->channel);
116	}
117
118	writel(con, adc->regs + S3C2410_ADCCON);
119}
120
121static void s3c_adc_dbgshow(struct adc_device *adc)
122{
123	adc_dbg(adc, "CON=%08x, TSC=%08x, DLY=%08x\n",
124		readl(adc->regs + S3C2410_ADCCON),
125		readl(adc->regs + S3C2410_ADCTSC),
126		readl(adc->regs + S3C2410_ADCDLY));
127}
128
129static void s3c_adc_try(struct adc_device *adc)
130{
131	struct s3c_adc_client *next = adc->ts_pend;
132
133	if (!next && !list_empty(&adc_pending)) {
134		next = list_first_entry(&adc_pending,
135					struct s3c_adc_client, pend);
136		list_del(&next->pend);
137	} else
138		adc->ts_pend = NULL;
139
140	if (next) {
141		adc_dbg(adc, "new client is %p\n", next);
142		adc->cur = next;
143		s3c_adc_select(adc, next);
144		s3c_adc_convert(adc);
145		s3c_adc_dbgshow(adc);
146	}
147}
148
149int s3c_adc_start(struct s3c_adc_client *client,
150		  unsigned int channel, unsigned int nr_samples)
151{
152	struct adc_device *adc = adc_dev;
153	unsigned long flags;
154
155	if (!adc) {
156		printk(KERN_ERR "%s: failed to find adc\n", __func__);
157		return -EINVAL;
158	}
159
160	if (client->is_ts && adc->ts_pend)
161		return -EAGAIN;
162
163	spin_lock_irqsave(&adc->lock, flags);
164
165	client->channel = channel;
166	client->nr_samples = nr_samples;
167
168	if (client->is_ts)
169		adc->ts_pend = client;
170	else
171		list_add_tail(&client->pend, &adc_pending);
172
173	if (!adc->cur)
174		s3c_adc_try(adc);
175
176	spin_unlock_irqrestore(&adc->lock, flags);
177
178	return 0;
179}
180EXPORT_SYMBOL_GPL(s3c_adc_start);
181
182static void s3c_convert_done(struct s3c_adc_client *client,
183			     unsigned v, unsigned u, unsigned *left)
184{
185	client->result = v;
186	wake_up(client->wait);
187}
188
189int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch)
190{
191	DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wake);
192	int ret;
193
194	client->convert_cb = s3c_convert_done;
195	client->wait = &wake;
196	client->result = -1;
197
198	ret = s3c_adc_start(client, ch, 1);
199	if (ret < 0)
200		goto err;
201
202	ret = wait_event_timeout(wake, client->result >= 0, HZ / 2);
203	if (client->result < 0) {
204		ret = -ETIMEDOUT;
205		goto err;
206	}
207
208	client->convert_cb = NULL;
209	return client->result;
210
211err:
212	return ret;
213}
214EXPORT_SYMBOL_GPL(s3c_adc_read);
215
216static void s3c_adc_default_select(struct s3c_adc_client *client,
217				   unsigned select)
218{
219}
220
221struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev,
222					void (*select)(struct s3c_adc_client *client,
223						       unsigned int selected),
224					void (*conv)(struct s3c_adc_client *client,
225						     unsigned d0, unsigned d1,
226						     unsigned *samples_left),
227					unsigned int is_ts)
228{
229	struct s3c_adc_client *client;
230
231	WARN_ON(!pdev);
232
233	if (!select)
234		select = s3c_adc_default_select;
235
236	if (!pdev)
237		return ERR_PTR(-EINVAL);
238
239	client = kzalloc(sizeof(struct s3c_adc_client), GFP_KERNEL);
240	if (!client) {
241		dev_err(&pdev->dev, "no memory for adc client\n");
242		return ERR_PTR(-ENOMEM);
243	}
244
245	client->pdev = pdev;
246	client->is_ts = is_ts;
247	client->select_cb = select;
248	client->convert_cb = conv;
249
250	return client;
251}
252EXPORT_SYMBOL_GPL(s3c_adc_register);
253
254void s3c_adc_release(struct s3c_adc_client *client)
255{
256	unsigned long flags;
257
258	spin_lock_irqsave(&adc_dev->lock, flags);
259
260	/* We should really check that nothing is in progress. */
261	if (adc_dev->cur == client)
262		adc_dev->cur = NULL;
263	if (adc_dev->ts_pend == client)
264		adc_dev->ts_pend = NULL;
265	else {
266		struct list_head *p, *n;
267		struct s3c_adc_client *tmp;
268
269		list_for_each_safe(p, n, &adc_pending) {
270			tmp = list_entry(p, struct s3c_adc_client, pend);
271			if (tmp == client)
272				list_del(&tmp->pend);
273		}
274	}
275
276	if (adc_dev->cur == NULL)
277		s3c_adc_try(adc_dev);
278
279	spin_unlock_irqrestore(&adc_dev->lock, flags);
280	kfree(client);
281}
282EXPORT_SYMBOL_GPL(s3c_adc_release);
283
284static irqreturn_t s3c_adc_irq(int irq, void *pw)
285{
286	struct adc_device *adc = pw;
287	struct s3c_adc_client *client = adc->cur;
288	enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
289	unsigned data0, data1;
290
291	if (!client) {
292		dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__);
293		goto exit;
294	}
295
296	data0 = readl(adc->regs + S3C2410_ADCDAT0);
297	data1 = readl(adc->regs + S3C2410_ADCDAT1);
298	adc_dbg(adc, "read %d: 0x%04x, 0x%04x\n", client->nr_samples, data0, data1);
299
300	client->nr_samples--;
301
302	if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV11) {
303		data0 &= 0x3ff;
304		data1 &= 0x3ff;
305	} else {
306		/* S3C2416/S3C64XX/S5P ADC resolution is 12-bit */
307		data0 &= 0xfff;
308		data1 &= 0xfff;
309	}
310
311	if (client->convert_cb)
312		(client->convert_cb)(client, data0, data1, &client->nr_samples);
313
314	if (client->nr_samples > 0) {
315		/* fire another conversion for this */
316
317		client->select_cb(client, 1);
318		s3c_adc_convert(adc);
319	} else {
320		spin_lock(&adc->lock);
321		(client->select_cb)(client, 0);
322		adc->cur = NULL;
323
324		s3c_adc_try(adc);
325		spin_unlock(&adc->lock);
326	}
327
328exit:
329	if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) {
330		/* Clear ADC interrupt */
331		writel(0, adc->regs + S3C64XX_ADCCLRINT);
332	}
333	return IRQ_HANDLED;
334}
335
336static int s3c_adc_probe(struct platform_device *pdev)
337{
338	struct device *dev = &pdev->dev;
339	struct adc_device *adc;
340	struct resource *regs;
341	enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data;
342	int ret;
343	unsigned tmp;
344
345	adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
346	if (adc == NULL) {
347		dev_err(dev, "failed to allocate adc_device\n");
348		return -ENOMEM;
349	}
350
351	spin_lock_init(&adc->lock);
352
353	adc->pdev = pdev;
354	adc->prescale = S3C2410_ADCCON_PRSCVL(49);
355
356	adc->vdd = regulator_get(dev, "vdd");
357	if (IS_ERR(adc->vdd)) {
358		dev_err(dev, "operating without regulator \"vdd\" .\n");
359		ret = PTR_ERR(adc->vdd);
360		goto err_alloc;
361	}
362
363	adc->irq = platform_get_irq(pdev, 1);
364	if (adc->irq <= 0) {
365		dev_err(dev, "failed to get adc irq\n");
366		ret = -ENOENT;
367		goto err_reg;
368	}
369
370	ret = request_irq(adc->irq, s3c_adc_irq, 0, dev_name(dev), adc);
371	if (ret < 0) {
372		dev_err(dev, "failed to attach adc irq\n");
373		goto err_reg;
374	}
375
376	adc->clk = clk_get(dev, "adc");
377	if (IS_ERR(adc->clk)) {
378		dev_err(dev, "failed to get adc clock\n");
379		ret = PTR_ERR(adc->clk);
380		goto err_irq;
381	}
382
383	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
384	if (!regs) {
385		dev_err(dev, "failed to find registers\n");
386		ret = -ENXIO;
387		goto err_clk;
388	}
389
390	adc->regs = ioremap(regs->start, resource_size(regs));
391	if (!adc->regs) {
392		dev_err(dev, "failed to map registers\n");
393		ret = -ENXIO;
394		goto err_clk;
395	}
396
397	ret = regulator_enable(adc->vdd);
398	if (ret)
399		goto err_ioremap;
400
401	clk_enable(adc->clk);
402
403	tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
404
405	/* Enable 12-bit ADC resolution */
406	if (cpu == TYPE_ADCV12)
407		tmp |= S3C2416_ADCCON_RESSEL;
408	if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3)
409		tmp |= S3C64XX_ADCCON_RESSEL;
410
411	writel(tmp, adc->regs + S3C2410_ADCCON);
412
413	dev_info(dev, "attached adc driver\n");
414
415	platform_set_drvdata(pdev, adc);
416	adc_dev = adc;
417
418	return 0;
419
420 err_ioremap:
421	iounmap(adc->regs);
422 err_clk:
423	clk_put(adc->clk);
424
425 err_irq:
426	free_irq(adc->irq, adc);
427 err_reg:
428	regulator_put(adc->vdd);
429 err_alloc:
430	kfree(adc);
431	return ret;
432}
433
434static int __devexit s3c_adc_remove(struct platform_device *pdev)
435{
436	struct adc_device *adc = platform_get_drvdata(pdev);
437
438	iounmap(adc->regs);
439	free_irq(adc->irq, adc);
440	clk_disable(adc->clk);
441	regulator_disable(adc->vdd);
442	regulator_put(adc->vdd);
443	clk_put(adc->clk);
444	kfree(adc);
445
446	return 0;
447}
448
449#ifdef CONFIG_PM
450static int s3c_adc_suspend(struct device *dev)
451{
452	struct platform_device *pdev = container_of(dev,
453			struct platform_device, dev);
454	struct adc_device *adc = platform_get_drvdata(pdev);
455	unsigned long flags;
456	u32 con;
457
458	spin_lock_irqsave(&adc->lock, flags);
459
460	con = readl(adc->regs + S3C2410_ADCCON);
461	con |= S3C2410_ADCCON_STDBM;
462	writel(con, adc->regs + S3C2410_ADCCON);
463
464	disable_irq(adc->irq);
465	spin_unlock_irqrestore(&adc->lock, flags);
466	clk_disable(adc->clk);
467	regulator_disable(adc->vdd);
468
469	return 0;
470}
471
472static int s3c_adc_resume(struct device *dev)
473{
474	struct platform_device *pdev = container_of(dev,
475			struct platform_device, dev);
476	struct adc_device *adc = platform_get_drvdata(pdev);
477	enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data;
478	int ret;
479	unsigned long tmp;
480
481	ret = regulator_enable(adc->vdd);
482	if (ret)
483		return ret;
484	clk_enable(adc->clk);
485	enable_irq(adc->irq);
486
487	tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
488
489	/* Enable 12-bit ADC resolution */
490	if (cpu == TYPE_ADCV12)
491		tmp |= S3C2416_ADCCON_RESSEL;
492	if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3)
493		tmp |= S3C64XX_ADCCON_RESSEL;
494
495	writel(tmp, adc->regs + S3C2410_ADCCON);
496
497	return 0;
498}
499
500#else
501#define s3c_adc_suspend NULL
502#define s3c_adc_resume NULL
503#endif
504
505static struct platform_device_id s3c_adc_driver_ids[] = {
506	{
507		.name           = "s3c24xx-adc",
508		.driver_data    = TYPE_ADCV1,
509	}, {
510		.name		= "s3c2443-adc",
511		.driver_data	= TYPE_ADCV11,
512	}, {
513		.name		= "s3c2416-adc",
514		.driver_data	= TYPE_ADCV12,
515	}, {
516		.name           = "s3c64xx-adc",
517		.driver_data    = TYPE_ADCV2,
518	}, {
519		.name		= "samsung-adc-v3",
520		.driver_data	= TYPE_ADCV3,
521	},
522	{ }
523};
524MODULE_DEVICE_TABLE(platform, s3c_adc_driver_ids);
525
526static const struct dev_pm_ops adc_pm_ops = {
527	.suspend	= s3c_adc_suspend,
528	.resume		= s3c_adc_resume,
529};
530
531static struct platform_driver s3c_adc_driver = {
532	.id_table	= s3c_adc_driver_ids,
533	.driver		= {
534		.name	= "s3c-adc",
535		.owner	= THIS_MODULE,
536		.pm	= &adc_pm_ops,
537	},
538	.probe		= s3c_adc_probe,
539	.remove		= __devexit_p(s3c_adc_remove),
540};
541
542static int __init adc_init(void)
543{
544	int ret;
545
546	ret = platform_driver_register(&s3c_adc_driver);
547	if (ret)
548		printk(KERN_ERR "%s: failed to add adc driver\n", __func__);
549
550	return ret;
551}
552
553module_init(adc_init);
554