1/*
2 * sc-ip22.c: Indy cache management functions.
3 *
4 * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org),
5 * derived from r4xx0.c by David S. Miller (davem@davemloft.net).
6 */
7#include <linux/init.h>
8#include <linux/kernel.h>
9#include <linux/sched.h>
10#include <linux/mm.h>
11
12#include <asm/bcache.h>
13#include <asm/page.h>
14#include <asm/pgtable.h>
15#include <asm/bootinfo.h>
16#include <asm/sgi/ip22.h>
17#include <asm/sgi/mc.h>
18
19/* Secondary cache size in bytes, if present.  */
20static unsigned long scache_size;
21
22#undef DEBUG_CACHE
23
24#define SC_SIZE 0x00080000
25#define SC_LINE 32
26#define CI_MASK (SC_SIZE - SC_LINE)
27#define SC_INDEX(n) ((n) & CI_MASK)
28
29static inline void indy_sc_wipe(unsigned long first, unsigned long last)
30{
31	unsigned long tmp;
32
33	__asm__ __volatile__(
34	".set\tpush\t\t\t# indy_sc_wipe\n\t"
35	".set\tnoreorder\n\t"
36	".set\tmips3\n\t"
37	".set\tnoat\n\t"
38	"mfc0\t%2, $12\n\t"
39	"li\t$1, 0x80\t\t\t# Go 64 bit\n\t"
40	"mtc0\t$1, $12\n\t"
41
42	"dli\t$1, 0x9000000080000000\n\t"
43	"or\t%0, $1\t\t\t# first line to flush\n\t"
44	"or\t%1, $1\t\t\t# last line to flush\n\t"
45	".set\tat\n\t"
46
47	"1:\tsw\t$0, 0(%0)\n\t"
48	"bne\t%0, %1, 1b\n\t"
49	" daddu\t%0, 32\n\t"
50
51	"mtc0\t%2, $12\t\t\t# Back to 32 bit\n\t"
52	"nop; nop; nop; nop;\n\t"
53	".set\tpop"
54	: "=r" (first), "=r" (last), "=&r" (tmp)
55	: "0" (first), "1" (last));
56}
57
58static void indy_sc_wback_invalidate(unsigned long addr, unsigned long size)
59{
60	unsigned long first_line, last_line;
61	unsigned long flags;
62
63#ifdef DEBUG_CACHE
64	printk("indy_sc_wback_invalidate[%08lx,%08lx]", addr, size);
65#endif
66
67	/* Catch bad driver code */
68	BUG_ON(size == 0);
69
70	/* Which lines to flush?  */
71	first_line = SC_INDEX(addr);
72	last_line = SC_INDEX(addr + size - 1);
73
74	local_irq_save(flags);
75	if (first_line <= last_line) {
76		indy_sc_wipe(first_line, last_line);
77		goto out;
78	}
79
80	indy_sc_wipe(first_line, SC_SIZE - SC_LINE);
81	indy_sc_wipe(0, last_line);
82out:
83	local_irq_restore(flags);
84}
85
86static void indy_sc_enable(void)
87{
88	unsigned long addr, tmp1, tmp2;
89
90	/* This is really cool... */
91#ifdef DEBUG_CACHE
92	printk("Enabling R4600 SCACHE\n");
93#endif
94	__asm__ __volatile__(
95	".set\tpush\n\t"
96	".set\tnoreorder\n\t"
97	".set\tmips3\n\t"
98	"mfc0\t%2, $12\n\t"
99	"nop; nop; nop; nop;\n\t"
100	"li\t%1, 0x80\n\t"
101	"mtc0\t%1, $12\n\t"
102	"nop; nop; nop; nop;\n\t"
103	"li\t%0, 0x1\n\t"
104	"dsll\t%0, 31\n\t"
105	"lui\t%1, 0x9000\n\t"
106	"dsll32\t%1, 0\n\t"
107	"or\t%0, %1, %0\n\t"
108	"sb\t$0, 0(%0)\n\t"
109	"mtc0\t$0, $12\n\t"
110	"nop; nop; nop; nop;\n\t"
111	"mtc0\t%2, $12\n\t"
112	"nop; nop; nop; nop;\n\t"
113	".set\tpop"
114	: "=r" (tmp1), "=r" (tmp2), "=r" (addr));
115}
116
117static void indy_sc_disable(void)
118{
119	unsigned long tmp1, tmp2, tmp3;
120
121#ifdef DEBUG_CACHE
122	printk("Disabling R4600 SCACHE\n");
123#endif
124	__asm__ __volatile__(
125	".set\tpush\n\t"
126	".set\tnoreorder\n\t"
127	".set\tmips3\n\t"
128	"li\t%0, 0x1\n\t"
129	"dsll\t%0, 31\n\t"
130	"lui\t%1, 0x9000\n\t"
131	"dsll32\t%1, 0\n\t"
132	"or\t%0, %1, %0\n\t"
133	"mfc0\t%2, $12\n\t"
134	"nop; nop; nop; nop\n\t"
135	"li\t%1, 0x80\n\t"
136	"mtc0\t%1, $12\n\t"
137	"nop; nop; nop; nop\n\t"
138	"sh\t$0, 0(%0)\n\t"
139	"mtc0\t$0, $12\n\t"
140	"nop; nop; nop; nop\n\t"
141	"mtc0\t%2, $12\n\t"
142	"nop; nop; nop; nop\n\t"
143	".set\tpop"
144	: "=r" (tmp1), "=r" (tmp2), "=r" (tmp3));
145}
146
147static inline int __init indy_sc_probe(void)
148{
149	unsigned int size = ip22_eeprom_read(&sgimc->eeprom, 17);
150	if (size == 0)
151		return 0;
152
153	size <<= PAGE_SHIFT;
154	printk(KERN_INFO "R4600/R5000 SCACHE size %dK, linesize 32 bytes.\n",
155	       size >> 10);
156	scache_size = size;
157
158	return 1;
159}
160
161/* XXX Check with wje if the Indy caches can differenciate between
162   writeback + invalidate and just invalidate.  */
163static struct bcache_ops indy_sc_ops = {
164	.bc_enable = indy_sc_enable,
165	.bc_disable = indy_sc_disable,
166	.bc_wback_inv = indy_sc_wback_invalidate,
167	.bc_inv = indy_sc_wback_invalidate
168};
169
170void __cpuinit indy_sc_init(void)
171{
172	if (indy_sc_probe()) {
173		indy_sc_enable();
174		bcops = &indy_sc_ops;
175	}
176}
177