1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License.  See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006, 07 MIPS Technologies, Inc.
7 *   written by Ralf Baechle (ralf@linux-mips.org)
8 *     written by Ralf Baechle <ralf@linux-mips.org>
9 *
10 * Copyright (C) 2008 Wind River Systems, Inc.
11 *   updated by Tiejun Chen <tiejun.chen@windriver.com>
12 *
13 * 1. Probe driver for the Malta's UART ports:
14 *
15 *   o 2 ports in the SMC SuperIO
16 *   o 1 port in the CBUS UART, a discrete 16550 which normally is only used
17 *     for bringups.
18 *
19 * We don't use 8250_platform.c on Malta as it would result in the CBUS
20 * UART becoming ttyS0.
21 *
22 * 2. Register RTC-CMOS platform device on Malta.
23 */
24#include <linux/init.h>
25#include <linux/serial_8250.h>
26#include <linux/mc146818rtc.h>
27#include <linux/module.h>
28#include <linux/irq.h>
29#include <linux/mtd/partitions.h>
30#include <linux/mtd/physmap.h>
31#include <linux/platform_device.h>
32#include <mtd/mtd-abi.h>
33
34#define SMC_PORT(base, int)						\
35{									\
36	.iobase		= base,						\
37	.irq		= int,						\
38	.uartclk	= 1843200,					\
39	.iotype		= UPIO_PORT,					\
40	.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,		\
41	.regshift	= 0,						\
42}
43
44#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
45
46static struct plat_serial8250_port uart8250_data[] = {
47	SMC_PORT(0x3F8, 4),
48	SMC_PORT(0x2F8, 3),
49	{
50		.mapbase	= 0x1f000900,	/* The CBUS UART */
51		.irq		= MIPS_CPU_IRQ_BASE + 2,
52		.uartclk	= 3686400,	/* Twice the usual clk! */
53		.iotype		= UPIO_MEM32,
54		.flags		= CBUS_UART_FLAGS,
55		.regshift	= 3,
56	},
57	{ },
58};
59
60static struct platform_device malta_uart8250_device = {
61	.name			= "serial8250",
62	.id			= PLAT8250_DEV_PLATFORM,
63	.dev			= {
64		.platform_data	= uart8250_data,
65	},
66};
67
68struct resource malta_rtc_resources[] = {
69	{
70		.start	= RTC_PORT(0),
71		.end	= RTC_PORT(7),
72		.flags	= IORESOURCE_IO,
73	}, {
74		.start	= RTC_IRQ,
75		.end	= RTC_IRQ,
76		.flags	= IORESOURCE_IRQ,
77	}
78};
79
80static struct platform_device malta_rtc_device = {
81	.name		= "rtc_cmos",
82	.id		= -1,
83	.resource	= malta_rtc_resources,
84	.num_resources	= ARRAY_SIZE(malta_rtc_resources),
85};
86
87static struct mtd_partition malta_mtd_partitions[] = {
88	{
89		.name =		"YAMON",
90		.offset =	0x0,
91		.size =		0x100000,
92		.mask_flags =	MTD_WRITEABLE
93	}, {
94		.name =		"User FS",
95		.offset = 	0x100000,
96		.size =		0x2e0000
97	}, {
98		.name =		"Board Config",
99		.offset =	0x3e0000,
100		.size =		0x020000,
101		.mask_flags =	MTD_WRITEABLE
102	}
103};
104
105static struct physmap_flash_data malta_flash_data = {
106	.width		= 4,
107	.nr_parts	= ARRAY_SIZE(malta_mtd_partitions),
108	.parts		= malta_mtd_partitions
109};
110
111static struct resource malta_flash_resource = {
112	.start		= 0x1e000000,
113	.end		= 0x1e3fffff,
114	.flags		= IORESOURCE_MEM
115};
116
117static struct platform_device malta_flash_device = {
118	.name		= "physmap-flash",
119	.id		= 0,
120	.dev		= {
121		.platform_data	= &malta_flash_data,
122	},
123	.num_resources	= 1,
124	.resource	= &malta_flash_resource,
125};
126
127static struct platform_device *malta_devices[] __initdata = {
128	&malta_uart8250_device,
129	&malta_rtc_device,
130	&malta_flash_device,
131};
132
133static int __init malta_add_devices(void)
134{
135	int err;
136
137	err = platform_add_devices(malta_devices, ARRAY_SIZE(malta_devices));
138	if (err)
139		return err;
140
141	/*
142	 * Set RTC to BCD mode to support current alarm code.
143	 */
144	CMOS_WRITE(CMOS_READ(RTC_CONTROL) & ~RTC_DM_BINARY, RTC_CONTROL);
145
146	return 0;
147}
148
149device_initcall(malta_add_devices);
150