1/* 2 * Common boot and setup code for both 32-bit and 64-bit. 3 * Extracted from arch/powerpc/kernel/setup_64.c. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13#undef DEBUG 14 15#include <linux/export.h> 16#include <linux/string.h> 17#include <linux/sched.h> 18#include <linux/init.h> 19#include <linux/kernel.h> 20#include <linux/reboot.h> 21#include <linux/delay.h> 22#include <linux/initrd.h> 23#include <linux/platform_device.h> 24#include <linux/seq_file.h> 25#include <linux/ioport.h> 26#include <linux/console.h> 27#include <linux/screen_info.h> 28#include <linux/root_dev.h> 29#include <linux/notifier.h> 30#include <linux/cpu.h> 31#include <linux/unistd.h> 32#include <linux/serial.h> 33#include <linux/serial_8250.h> 34#include <linux/debugfs.h> 35#include <linux/percpu.h> 36#include <linux/memblock.h> 37#include <linux/of_platform.h> 38#include <asm/io.h> 39#include <asm/paca.h> 40#include <asm/prom.h> 41#include <asm/processor.h> 42#include <asm/vdso_datapage.h> 43#include <asm/pgtable.h> 44#include <asm/smp.h> 45#include <asm/elf.h> 46#include <asm/machdep.h> 47#include <asm/time.h> 48#include <asm/cputable.h> 49#include <asm/sections.h> 50#include <asm/firmware.h> 51#include <asm/btext.h> 52#include <asm/nvram.h> 53#include <asm/setup.h> 54#include <asm/rtas.h> 55#include <asm/iommu.h> 56#include <asm/serial.h> 57#include <asm/cache.h> 58#include <asm/page.h> 59#include <asm/mmu.h> 60#include <asm/xmon.h> 61#include <asm/cputhreads.h> 62#include <mm/mmu_decl.h> 63#include <asm/fadump.h> 64 65#include "setup.h" 66 67#ifdef DEBUG 68#include <asm/udbg.h> 69#define DBG(fmt...) udbg_printf(fmt) 70#else 71#define DBG(fmt...) 72#endif 73 74/* The main machine-dep calls structure 75 */ 76struct machdep_calls ppc_md; 77EXPORT_SYMBOL(ppc_md); 78struct machdep_calls *machine_id; 79EXPORT_SYMBOL(machine_id); 80 81unsigned long klimit = (unsigned long) _end; 82 83char cmd_line[COMMAND_LINE_SIZE]; 84 85/* 86 * This still seems to be needed... -- paulus 87 */ 88struct screen_info screen_info = { 89 .orig_x = 0, 90 .orig_y = 25, 91 .orig_video_cols = 80, 92 .orig_video_lines = 25, 93 .orig_video_isVGA = 1, 94 .orig_video_points = 16 95}; 96 97/* Variables required to store legacy IO irq routing */ 98int of_i8042_kbd_irq; 99EXPORT_SYMBOL_GPL(of_i8042_kbd_irq); 100int of_i8042_aux_irq; 101EXPORT_SYMBOL_GPL(of_i8042_aux_irq); 102 103#ifdef __DO_IRQ_CANON 104/* XXX should go elsewhere eventually */ 105int ppc_do_canonicalize_irqs; 106EXPORT_SYMBOL(ppc_do_canonicalize_irqs); 107#endif 108 109/* also used by kexec */ 110void machine_shutdown(void) 111{ 112#ifdef CONFIG_FA_DUMP 113 /* 114 * if fadump is active, cleanup the fadump registration before we 115 * shutdown. 116 */ 117 fadump_cleanup(); 118#endif 119 120 if (ppc_md.machine_shutdown) 121 ppc_md.machine_shutdown(); 122} 123 124void machine_restart(char *cmd) 125{ 126 machine_shutdown(); 127 if (ppc_md.restart) 128 ppc_md.restart(cmd); 129#ifdef CONFIG_SMP 130 smp_send_stop(); 131#endif 132 printk(KERN_EMERG "System Halted, OK to turn off power\n"); 133 local_irq_disable(); 134 while (1) ; 135} 136 137void machine_power_off(void) 138{ 139 machine_shutdown(); 140 if (ppc_md.power_off) 141 ppc_md.power_off(); 142#ifdef CONFIG_SMP 143 smp_send_stop(); 144#endif 145 printk(KERN_EMERG "System Halted, OK to turn off power\n"); 146 local_irq_disable(); 147 while (1) ; 148} 149/* Used by the G5 thermal driver */ 150EXPORT_SYMBOL_GPL(machine_power_off); 151 152void (*pm_power_off)(void) = machine_power_off; 153EXPORT_SYMBOL_GPL(pm_power_off); 154 155void machine_halt(void) 156{ 157 machine_shutdown(); 158 if (ppc_md.halt) 159 ppc_md.halt(); 160#ifdef CONFIG_SMP 161 smp_send_stop(); 162#endif 163 printk(KERN_EMERG "System Halted, OK to turn off power\n"); 164 local_irq_disable(); 165 while (1) ; 166} 167 168 169#ifdef CONFIG_TAU 170extern u32 cpu_temp(unsigned long cpu); 171extern u32 cpu_temp_both(unsigned long cpu); 172#endif /* CONFIG_TAU */ 173 174#ifdef CONFIG_SMP 175DEFINE_PER_CPU(unsigned int, cpu_pvr); 176#endif 177 178static void show_cpuinfo_summary(struct seq_file *m) 179{ 180 struct device_node *root; 181 const char *model = NULL; 182#if defined(CONFIG_SMP) && defined(CONFIG_PPC32) 183 unsigned long bogosum = 0; 184 int i; 185 for_each_online_cpu(i) 186 bogosum += loops_per_jiffy; 187 seq_printf(m, "total bogomips\t: %lu.%02lu\n", 188 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100); 189#endif /* CONFIG_SMP && CONFIG_PPC32 */ 190 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); 191 if (ppc_md.name) 192 seq_printf(m, "platform\t: %s\n", ppc_md.name); 193 root = of_find_node_by_path("/"); 194 if (root) 195 model = of_get_property(root, "model", NULL); 196 if (model) 197 seq_printf(m, "model\t\t: %s\n", model); 198 of_node_put(root); 199 200 if (ppc_md.show_cpuinfo != NULL) 201 ppc_md.show_cpuinfo(m); 202 203#ifdef CONFIG_PPC32 204 /* Display the amount of memory */ 205 seq_printf(m, "Memory\t\t: %d MB\n", 206 (unsigned int)(total_memory / (1024 * 1024))); 207#endif 208} 209 210static int show_cpuinfo(struct seq_file *m, void *v) 211{ 212 unsigned long cpu_id = (unsigned long)v - 1; 213 unsigned int pvr; 214 unsigned short maj; 215 unsigned short min; 216 217 /* We only show online cpus: disable preempt (overzealous, I 218 * knew) to prevent cpu going down. */ 219 preempt_disable(); 220 if (!cpu_online(cpu_id)) { 221 preempt_enable(); 222 return 0; 223 } 224 225#ifdef CONFIG_SMP 226 pvr = per_cpu(cpu_pvr, cpu_id); 227#else 228 pvr = mfspr(SPRN_PVR); 229#endif 230 maj = (pvr >> 8) & 0xFF; 231 min = pvr & 0xFF; 232 233 seq_printf(m, "processor\t: %lu\n", cpu_id); 234 seq_printf(m, "cpu\t\t: "); 235 236 if (cur_cpu_spec->pvr_mask) 237 seq_printf(m, "%s", cur_cpu_spec->cpu_name); 238 else 239 seq_printf(m, "unknown (%08x)", pvr); 240 241#ifdef CONFIG_ALTIVEC 242 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 243 seq_printf(m, ", altivec supported"); 244#endif /* CONFIG_ALTIVEC */ 245 246 seq_printf(m, "\n"); 247 248#ifdef CONFIG_TAU 249 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) { 250#ifdef CONFIG_TAU_AVERAGE 251 /* more straightforward, but potentially misleading */ 252 seq_printf(m, "temperature \t: %u C (uncalibrated)\n", 253 cpu_temp(cpu_id)); 254#else 255 /* show the actual temp sensor range */ 256 u32 temp; 257 temp = cpu_temp_both(cpu_id); 258 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", 259 temp & 0xff, temp >> 16); 260#endif 261 } 262#endif /* CONFIG_TAU */ 263 264 /* 265 * Assume here that all clock rates are the same in a 266 * smp system. -- Cort 267 */ 268 if (ppc_proc_freq) 269 seq_printf(m, "clock\t\t: %lu.%06luMHz\n", 270 ppc_proc_freq / 1000000, ppc_proc_freq % 1000000); 271 272 if (ppc_md.show_percpuinfo != NULL) 273 ppc_md.show_percpuinfo(m, cpu_id); 274 275 /* If we are a Freescale core do a simple check so 276 * we dont have to keep adding cases in the future */ 277 if (PVR_VER(pvr) & 0x8000) { 278 switch (PVR_VER(pvr)) { 279 case 0x8000: /* 7441/7450/7451, Voyager */ 280 case 0x8001: /* 7445/7455, Apollo 6 */ 281 case 0x8002: /* 7447/7457, Apollo 7 */ 282 case 0x8003: /* 7447A, Apollo 7 PM */ 283 case 0x8004: /* 7448, Apollo 8 */ 284 case 0x800c: /* 7410, Nitro */ 285 maj = ((pvr >> 8) & 0xF); 286 min = PVR_MIN(pvr); 287 break; 288 default: /* e500/book-e */ 289 maj = PVR_MAJ(pvr); 290 min = PVR_MIN(pvr); 291 break; 292 } 293 } else { 294 switch (PVR_VER(pvr)) { 295 case 0x0020: /* 403 family */ 296 maj = PVR_MAJ(pvr) + 1; 297 min = PVR_MIN(pvr); 298 break; 299 case 0x1008: /* 740P/750P ?? */ 300 maj = ((pvr >> 8) & 0xFF) - 1; 301 min = pvr & 0xFF; 302 break; 303 default: 304 maj = (pvr >> 8) & 0xFF; 305 min = pvr & 0xFF; 306 break; 307 } 308 } 309 310 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", 311 maj, min, PVR_VER(pvr), PVR_REV(pvr)); 312 313#ifdef CONFIG_PPC32 314 seq_printf(m, "bogomips\t: %lu.%02lu\n", 315 loops_per_jiffy / (500000/HZ), 316 (loops_per_jiffy / (5000/HZ)) % 100); 317#endif 318 319#ifdef CONFIG_SMP 320 seq_printf(m, "\n"); 321#endif 322 323 preempt_enable(); 324 325 /* If this is the last cpu, print the summary */ 326 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids) 327 show_cpuinfo_summary(m); 328 329 return 0; 330} 331 332static void *c_start(struct seq_file *m, loff_t *pos) 333{ 334 if (*pos == 0) /* just in case, cpu 0 is not the first */ 335 *pos = cpumask_first(cpu_online_mask); 336 else 337 *pos = cpumask_next(*pos - 1, cpu_online_mask); 338 if ((*pos) < nr_cpu_ids) 339 return (void *)(unsigned long)(*pos + 1); 340 return NULL; 341} 342 343static void *c_next(struct seq_file *m, void *v, loff_t *pos) 344{ 345 (*pos)++; 346 return c_start(m, pos); 347} 348 349static void c_stop(struct seq_file *m, void *v) 350{ 351} 352 353const struct seq_operations cpuinfo_op = { 354 .start =c_start, 355 .next = c_next, 356 .stop = c_stop, 357 .show = show_cpuinfo, 358}; 359 360void __init check_for_initrd(void) 361{ 362#ifdef CONFIG_BLK_DEV_INITRD 363 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", 364 initrd_start, initrd_end); 365 366 /* If we were passed an initrd, set the ROOT_DEV properly if the values 367 * look sensible. If not, clear initrd reference. 368 */ 369 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && 370 initrd_end > initrd_start) 371 ROOT_DEV = Root_RAM0; 372 else 373 initrd_start = initrd_end = 0; 374 375 if (initrd_start) 376 printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); 377 378 DBG(" <- check_for_initrd()\n"); 379#endif /* CONFIG_BLK_DEV_INITRD */ 380} 381 382#ifdef CONFIG_SMP 383 384int threads_per_core, threads_shift; 385cpumask_t threads_core_mask; 386EXPORT_SYMBOL_GPL(threads_per_core); 387EXPORT_SYMBOL_GPL(threads_shift); 388EXPORT_SYMBOL_GPL(threads_core_mask); 389 390static void __init cpu_init_thread_core_maps(int tpc) 391{ 392 int i; 393 394 threads_per_core = tpc; 395 cpumask_clear(&threads_core_mask); 396 397 /* This implementation only supports power of 2 number of threads 398 * for simplicity and performance 399 */ 400 threads_shift = ilog2(tpc); 401 BUG_ON(tpc != (1 << threads_shift)); 402 403 for (i = 0; i < tpc; i++) 404 cpumask_set_cpu(i, &threads_core_mask); 405 406 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", 407 tpc, tpc > 1 ? "s" : ""); 408 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); 409} 410 411 412/** 413 * setup_cpu_maps - initialize the following cpu maps: 414 * cpu_possible_mask 415 * cpu_present_mask 416 * 417 * Having the possible map set up early allows us to restrict allocations 418 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS. 419 * 420 * We do not initialize the online map here; cpus set their own bits in 421 * cpu_online_mask as they come up. 422 * 423 * This function is valid only for Open Firmware systems. finish_device_tree 424 * must be called before using this. 425 * 426 * While we're here, we may as well set the "physical" cpu ids in the paca. 427 * 428 * NOTE: This must match the parsing done in early_init_dt_scan_cpus. 429 */ 430void __init smp_setup_cpu_maps(void) 431{ 432 struct device_node *dn = NULL; 433 int cpu = 0; 434 int nthreads = 1; 435 436 DBG("smp_setup_cpu_maps()\n"); 437 438 while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) { 439 const int *intserv; 440 int j, len; 441 442 DBG(" * %s...\n", dn->full_name); 443 444 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", 445 &len); 446 if (intserv) { 447 nthreads = len / sizeof(int); 448 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n", 449 nthreads); 450 } else { 451 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); 452 intserv = of_get_property(dn, "reg", NULL); 453 if (!intserv) 454 intserv = &cpu; /* assume logical == phys */ 455 } 456 457 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { 458 DBG(" thread %d -> cpu %d (hard id %d)\n", 459 j, cpu, intserv[j]); 460 set_cpu_present(cpu, true); 461 set_hard_smp_processor_id(cpu, intserv[j]); 462 set_cpu_possible(cpu, true); 463 cpu++; 464 } 465 } 466 467 /* If no SMT supported, nthreads is forced to 1 */ 468 if (!cpu_has_feature(CPU_FTR_SMT)) { 469 DBG(" SMT disabled ! nthreads forced to 1\n"); 470 nthreads = 1; 471 } 472 473#ifdef CONFIG_PPC64 474 /* 475 * On pSeries LPAR, we need to know how many cpus 476 * could possibly be added to this partition. 477 */ 478 if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) && 479 (dn = of_find_node_by_path("/rtas"))) { 480 int num_addr_cell, num_size_cell, maxcpus; 481 const unsigned int *ireg; 482 483 num_addr_cell = of_n_addr_cells(dn); 484 num_size_cell = of_n_size_cells(dn); 485 486 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); 487 488 if (!ireg) 489 goto out; 490 491 maxcpus = ireg[num_addr_cell + num_size_cell]; 492 493 /* Double maxcpus for processors which have SMT capability */ 494 if (cpu_has_feature(CPU_FTR_SMT)) 495 maxcpus *= nthreads; 496 497 if (maxcpus > nr_cpu_ids) { 498 printk(KERN_WARNING 499 "Partition configured for %d cpus, " 500 "operating system maximum is %d.\n", 501 maxcpus, nr_cpu_ids); 502 maxcpus = nr_cpu_ids; 503 } else 504 printk(KERN_INFO "Partition configured for %d cpus.\n", 505 maxcpus); 506 507 for (cpu = 0; cpu < maxcpus; cpu++) 508 set_cpu_possible(cpu, true); 509 out: 510 of_node_put(dn); 511 } 512 vdso_data->processorCount = num_present_cpus(); 513#endif /* CONFIG_PPC64 */ 514 515 /* Initialize CPU <=> thread mapping/ 516 * 517 * WARNING: We assume that the number of threads is the same for 518 * every CPU in the system. If that is not the case, then some code 519 * here will have to be reworked 520 */ 521 cpu_init_thread_core_maps(nthreads); 522 523 /* Now that possible cpus are set, set nr_cpu_ids for later use */ 524 setup_nr_cpu_ids(); 525 526 free_unused_pacas(); 527} 528#endif /* CONFIG_SMP */ 529 530#ifdef CONFIG_PCSPKR_PLATFORM 531static __init int add_pcspkr(void) 532{ 533 struct device_node *np; 534 struct platform_device *pd; 535 int ret; 536 537 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); 538 of_node_put(np); 539 if (!np) 540 return -ENODEV; 541 542 pd = platform_device_alloc("pcspkr", -1); 543 if (!pd) 544 return -ENOMEM; 545 546 ret = platform_device_add(pd); 547 if (ret) 548 platform_device_put(pd); 549 550 return ret; 551} 552device_initcall(add_pcspkr); 553#endif /* CONFIG_PCSPKR_PLATFORM */ 554 555void probe_machine(void) 556{ 557 extern struct machdep_calls __machine_desc_start; 558 extern struct machdep_calls __machine_desc_end; 559 560 /* 561 * Iterate all ppc_md structures until we find the proper 562 * one for the current machine type 563 */ 564 DBG("Probing machine type ...\n"); 565 566 for (machine_id = &__machine_desc_start; 567 machine_id < &__machine_desc_end; 568 machine_id++) { 569 DBG(" %s ...", machine_id->name); 570 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); 571 if (ppc_md.probe()) { 572 DBG(" match !\n"); 573 break; 574 } 575 DBG("\n"); 576 } 577 /* What can we do if we didn't find ? */ 578 if (machine_id >= &__machine_desc_end) { 579 DBG("No suitable machine found !\n"); 580 for (;;); 581 } 582 583 printk(KERN_INFO "Using %s machine description\n", ppc_md.name); 584} 585 586/* Match a class of boards, not a specific device configuration. */ 587int check_legacy_ioport(unsigned long base_port) 588{ 589 struct device_node *parent, *np = NULL; 590 int ret = -ENODEV; 591 592 switch(base_port) { 593 case I8042_DATA_REG: 594 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) 595 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); 596 if (np) { 597 parent = of_get_parent(np); 598 599 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0); 600 if (!of_i8042_kbd_irq) 601 of_i8042_kbd_irq = 1; 602 603 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1); 604 if (!of_i8042_aux_irq) 605 of_i8042_aux_irq = 12; 606 607 of_node_put(np); 608 np = parent; 609 break; 610 } 611 np = of_find_node_by_type(NULL, "8042"); 612 /* Pegasos has no device_type on its 8042 node, look for the 613 * name instead */ 614 if (!np) 615 np = of_find_node_by_name(NULL, "8042"); 616 if (np) { 617 of_i8042_kbd_irq = 1; 618 of_i8042_aux_irq = 12; 619 } 620 break; 621 case FDC_BASE: /* FDC1 */ 622 np = of_find_node_by_type(NULL, "fdc"); 623 break; 624#ifdef CONFIG_PPC_PREP 625 case _PIDXR: 626 case _PNPWRP: 627 case PNPBIOS_BASE: 628 /* implement me */ 629#endif 630 default: 631 /* ipmi is supposed to fail here */ 632 break; 633 } 634 if (!np) 635 return ret; 636 parent = of_get_parent(np); 637 if (parent) { 638 if (strcmp(parent->type, "isa") == 0) 639 ret = 0; 640 of_node_put(parent); 641 } 642 of_node_put(np); 643 return ret; 644} 645EXPORT_SYMBOL(check_legacy_ioport); 646 647static int ppc_panic_event(struct notifier_block *this, 648 unsigned long event, void *ptr) 649{ 650 /* 651 * If firmware-assisted dump has been registered then trigger 652 * firmware-assisted dump and let firmware handle everything else. 653 */ 654 crash_fadump(NULL, ptr); 655 ppc_md.panic(ptr); /* May not return */ 656 return NOTIFY_DONE; 657} 658 659static struct notifier_block ppc_panic_block = { 660 .notifier_call = ppc_panic_event, 661 .priority = INT_MIN /* may not return; must be done last */ 662}; 663 664void __init setup_panic(void) 665{ 666 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); 667} 668 669#ifdef CONFIG_CHECK_CACHE_COHERENCY 670/* 671 * For platforms that have configurable cache-coherency. This function 672 * checks that the cache coherency setting of the kernel matches the setting 673 * left by the firmware, as indicated in the device tree. Since a mismatch 674 * will eventually result in DMA failures, we print * and error and call 675 * BUG() in that case. 676 */ 677 678#ifdef CONFIG_NOT_COHERENT_CACHE 679#define KERNEL_COHERENCY 0 680#else 681#define KERNEL_COHERENCY 1 682#endif 683 684static int __init check_cache_coherency(void) 685{ 686 struct device_node *np; 687 const void *prop; 688 int devtree_coherency; 689 690 np = of_find_node_by_path("/"); 691 prop = of_get_property(np, "coherency-off", NULL); 692 of_node_put(np); 693 694 devtree_coherency = prop ? 0 : 1; 695 696 if (devtree_coherency != KERNEL_COHERENCY) { 697 printk(KERN_ERR 698 "kernel coherency:%s != device tree_coherency:%s\n", 699 KERNEL_COHERENCY ? "on" : "off", 700 devtree_coherency ? "on" : "off"); 701 BUG(); 702 } 703 704 return 0; 705} 706 707late_initcall(check_cache_coherency); 708#endif /* CONFIG_CHECK_CACHE_COHERENCY */ 709 710#ifdef CONFIG_DEBUG_FS 711struct dentry *powerpc_debugfs_root; 712EXPORT_SYMBOL(powerpc_debugfs_root); 713 714static int powerpc_debugfs_init(void) 715{ 716 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL); 717 718 return powerpc_debugfs_root == NULL; 719} 720arch_initcall(powerpc_debugfs_init); 721#endif 722 723void ppc_printk_progress(char *s, unsigned short hex) 724{ 725 pr_info("%s\n", s); 726} 727 728void arch_setup_pdev_archdata(struct platform_device *pdev) 729{ 730 pdev->archdata.dma_mask = DMA_BIT_MASK(32); 731 pdev->dev.dma_mask = &pdev->archdata.dma_mask; 732 set_dma_ops(&pdev->dev, &dma_direct_ops); 733} 734