1#ifndef _ASM_X86_MPSPEC_H
2#define _ASM_X86_MPSPEC_H
3
4#include <linux/init.h>
5
6#include <asm/mpspec_def.h>
7#include <asm/x86_init.h>
8#include <asm/apicdef.h>
9
10extern int apic_version[];
11extern int pic_mode;
12
13#ifdef CONFIG_X86_32
14
15/*
16 * Summit or generic (i.e. installer) kernels need lots of bus entries.
17 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
18 */
19#if CONFIG_BASE_SMALL == 0
20# define MAX_MP_BUSSES		260
21#else
22# define MAX_MP_BUSSES		32
23#endif
24
25#define MAX_IRQ_SOURCES		256
26
27extern unsigned int def_to_bigsmp;
28
29#ifdef CONFIG_X86_NUMAQ
30extern int mp_bus_id_to_node[MAX_MP_BUSSES];
31extern int mp_bus_id_to_local[MAX_MP_BUSSES];
32extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
33#endif
34
35#else /* CONFIG_X86_64: */
36
37#define MAX_MP_BUSSES		256
38/* Each PCI slot may be a combo card with its own bus.  4 IRQ pins per slot. */
39#define MAX_IRQ_SOURCES		(MAX_MP_BUSSES * 4)
40
41#endif /* CONFIG_X86_64 */
42
43#if defined(CONFIG_MCA) || defined(CONFIG_EISA)
44extern int mp_bus_id_to_type[MAX_MP_BUSSES];
45#endif
46
47extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
48
49extern unsigned int boot_cpu_physical_apicid;
50extern unsigned int max_physical_apicid;
51extern int mpc_default_type;
52extern unsigned long mp_lapic_addr;
53
54#ifdef CONFIG_X86_LOCAL_APIC
55extern int smp_found_config;
56#else
57# define smp_found_config 0
58#endif
59
60static inline void get_smp_config(void)
61{
62	x86_init.mpparse.get_smp_config(0);
63}
64
65static inline void early_get_smp_config(void)
66{
67	x86_init.mpparse.get_smp_config(1);
68}
69
70static inline void find_smp_config(void)
71{
72	x86_init.mpparse.find_smp_config();
73}
74
75#ifdef CONFIG_X86_MPPARSE
76extern void early_reserve_e820_mpc_new(void);
77extern int enable_update_mptable;
78extern int default_mpc_apic_id(struct mpc_cpu *m);
79extern void default_smp_read_mpc_oem(struct mpc_table *mpc);
80# ifdef CONFIG_X86_IO_APIC
81extern void default_mpc_oem_bus_info(struct mpc_bus *m, char *str);
82# else
83#  define default_mpc_oem_bus_info NULL
84# endif
85extern void default_find_smp_config(void);
86extern void default_get_smp_config(unsigned int early);
87#else
88static inline void early_reserve_e820_mpc_new(void) { }
89#define enable_update_mptable 0
90#define default_mpc_apic_id NULL
91#define default_smp_read_mpc_oem NULL
92#define default_mpc_oem_bus_info NULL
93#define default_find_smp_config x86_init_noop
94#define default_get_smp_config x86_init_uint_noop
95#endif
96
97void __cpuinit generic_processor_info(int apicid, int version);
98#ifdef CONFIG_ACPI
99extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
100extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
101				   u32 gsi);
102extern void mp_config_acpi_legacy_irqs(void);
103struct device;
104extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level,
105				 int active_high_low);
106#endif /* CONFIG_ACPI */
107
108#define PHYSID_ARRAY_SIZE	BITS_TO_LONGS(MAX_LOCAL_APIC)
109
110struct physid_mask {
111	unsigned long mask[PHYSID_ARRAY_SIZE];
112};
113
114typedef struct physid_mask physid_mask_t;
115
116#define physid_set(physid, map)			set_bit(physid, (map).mask)
117#define physid_clear(physid, map)		clear_bit(physid, (map).mask)
118#define physid_isset(physid, map)		test_bit(physid, (map).mask)
119#define physid_test_and_set(physid, map)			\
120	test_and_set_bit(physid, (map).mask)
121
122#define physids_and(dst, src1, src2)					\
123	bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
124
125#define physids_or(dst, src1, src2)					\
126	bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
127
128#define physids_clear(map)					\
129	bitmap_zero((map).mask, MAX_LOCAL_APIC)
130
131#define physids_complement(dst, src)				\
132	bitmap_complement((dst).mask, (src).mask, MAX_LOCAL_APIC)
133
134#define physids_empty(map)					\
135	bitmap_empty((map).mask, MAX_LOCAL_APIC)
136
137#define physids_equal(map1, map2)				\
138	bitmap_equal((map1).mask, (map2).mask, MAX_LOCAL_APIC)
139
140#define physids_weight(map)					\
141	bitmap_weight((map).mask, MAX_LOCAL_APIC)
142
143#define physids_shift_right(d, s, n)				\
144	bitmap_shift_right((d).mask, (s).mask, n, MAX_LOCAL_APIC)
145
146#define physids_shift_left(d, s, n)				\
147	bitmap_shift_left((d).mask, (s).mask, n, MAX_LOCAL_APIC)
148
149static inline unsigned long physids_coerce(physid_mask_t *map)
150{
151	return map->mask[0];
152}
153
154static inline void physids_promote(unsigned long physids, physid_mask_t *map)
155{
156	physids_clear(*map);
157	map->mask[0] = physids;
158}
159
160static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
161{
162	physids_clear(*map);
163	physid_set(physid, *map);
164}
165
166#define PHYSID_MASK_ALL		{ {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
167#define PHYSID_MASK_NONE	{ {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
168
169extern physid_mask_t phys_cpu_present_map;
170
171extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
172
173extern int default_acpi_madt_oem_check(char *, char *);
174
175#endif /* _ASM_X86_MPSPEC_H */
176