1/**
2 * Marvell BT-over-SDIO driver: SDIO interface related definitions
3 *
4 * Copyright (C) 2009, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License").  You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 *
15 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
17 * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
18 * this warranty disclaimer.
19 *
20 **/
21
22#define SDIO_HEADER_LEN			4
23
24/* SD block size can not bigger than 64 due to buf size limit in firmware */
25/* define SD block size for data Tx/Rx */
26#define SDIO_BLOCK_SIZE			64
27
28/* Number of blocks for firmware transfer */
29#define FIRMWARE_TRANSFER_NBLOCK	2
30
31/* This is for firmware specific length */
32#define FW_EXTRA_LEN			36
33
34#define MRVDRV_SIZE_OF_CMD_BUFFER       (2 * 1024)
35
36#define MRVDRV_BT_RX_PACKET_BUFFER_SIZE \
37	(HCI_MAX_FRAME_SIZE + FW_EXTRA_LEN)
38
39#define ALLOC_BUF_SIZE	(((max_t (int, MRVDRV_BT_RX_PACKET_BUFFER_SIZE, \
40			MRVDRV_SIZE_OF_CMD_BUFFER) + SDIO_HEADER_LEN \
41			+ SDIO_BLOCK_SIZE - 1) / SDIO_BLOCK_SIZE) \
42			* SDIO_BLOCK_SIZE)
43
44/* The number of times to try when polling for status */
45#define MAX_POLL_TRIES			100
46
47/* Max retry number of CMD53 write */
48#define MAX_WRITE_IOMEM_RETRY		2
49
50/* register bitmasks */
51#define HOST_POWER_UP				BIT(1)
52#define HOST_CMD53_FIN				BIT(2)
53
54#define HIM_DISABLE				0xff
55#define HIM_ENABLE				(BIT(0) | BIT(1))
56
57#define UP_LD_HOST_INT_STATUS			BIT(0)
58#define DN_LD_HOST_INT_STATUS			BIT(1)
59
60#define DN_LD_CARD_RDY				BIT(0)
61#define CARD_IO_READY				BIT(3)
62
63#define FIRMWARE_READY				0xfedc
64
65
66struct btmrvl_sdio_card_reg {
67	u8 cfg;
68	u8 host_int_mask;
69	u8 host_intstatus;
70	u8 card_status;
71	u8 sq_read_base_addr_a0;
72	u8 sq_read_base_addr_a1;
73	u8 card_revision;
74	u8 card_fw_status0;
75	u8 card_fw_status1;
76	u8 card_rx_len;
77	u8 card_rx_unit;
78	u8 io_port_0;
79	u8 io_port_1;
80	u8 io_port_2;
81};
82
83struct btmrvl_sdio_card {
84	struct sdio_func *func;
85	u32 ioport;
86	const char *helper;
87	const char *firmware;
88	const struct btmrvl_sdio_card_reg *reg;
89	u16 sd_blksz_fw_dl;
90	u8 rx_unit;
91	struct btmrvl_private *priv;
92};
93
94struct btmrvl_sdio_device {
95	const char *helper;
96	const char *firmware;
97	const struct btmrvl_sdio_card_reg *reg;
98	u16 sd_blksz_fw_dl;
99};
100
101
102/* Platform specific DMA alignment */
103#define BTSDIO_DMA_ALIGN		8
104
105/* Macros for Data Alignment : size */
106#define ALIGN_SZ(p, a)	\
107	(((p) + ((a) - 1)) & ~((a) - 1))
108
109/* Macros for Data Alignment : address */
110#define ALIGN_ADDR(p, a)	\
111	((((unsigned long)(p)) + (((unsigned long)(a)) - 1)) & \
112					~(((unsigned long)(a)) - 1))
113