1/*
2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 *   Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger  aritger@nvidia.com
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
31 */
32
33#include <linux/list.h>
34#include <linux/list_sort.h>
35#include <linux/export.h>
36#include "drmP.h"
37#include "drm.h"
38#include "drm_crtc.h"
39
40/**
41 * drm_mode_debug_printmodeline - debug print a mode
42 * @dev: DRM device
43 * @mode: mode to print
44 *
45 * LOCKING:
46 * None.
47 *
48 * Describe @mode using DRM_DEBUG.
49 */
50void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
51{
52	DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
53			"0x%x 0x%x\n",
54		mode->base.id, mode->name, mode->vrefresh, mode->clock,
55		mode->hdisplay, mode->hsync_start,
56		mode->hsync_end, mode->htotal,
57		mode->vdisplay, mode->vsync_start,
58		mode->vsync_end, mode->vtotal, mode->type, mode->flags);
59}
60EXPORT_SYMBOL(drm_mode_debug_printmodeline);
61
62/**
63 * drm_cvt_mode -create a modeline based on CVT algorithm
64 * @dev: DRM device
65 * @hdisplay: hdisplay size
66 * @vdisplay: vdisplay size
67 * @vrefresh  : vrefresh rate
68 * @reduced : Whether the GTF calculation is simplified
69 * @interlaced:Whether the interlace is supported
70 *
71 * LOCKING:
72 * none.
73 *
74 * return the modeline based on CVT algorithm
75 *
76 * This function is called to generate the modeline based on CVT algorithm
77 * according to the hdisplay, vdisplay, vrefresh.
78 * It is based from the VESA(TM) Coordinated Video Timing Generator by
79 * Graham Loveridge April 9, 2003 available at
80 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
81 *
82 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
83 * What I have done is to translate it by using integer calculation.
84 */
85#define HV_FACTOR			1000
86struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
87				      int vdisplay, int vrefresh,
88				      bool reduced, bool interlaced, bool margins)
89{
90	/* 1) top/bottom margin size (% of height) - default: 1.8, */
91#define	CVT_MARGIN_PERCENTAGE		18
92	/* 2) character cell horizontal granularity (pixels) - default 8 */
93#define	CVT_H_GRANULARITY		8
94	/* 3) Minimum vertical porch (lines) - default 3 */
95#define	CVT_MIN_V_PORCH			3
96	/* 4) Minimum number of vertical back porch lines - default 6 */
97#define	CVT_MIN_V_BPORCH		6
98	/* Pixel Clock step (kHz) */
99#define CVT_CLOCK_STEP			250
100	struct drm_display_mode *drm_mode;
101	unsigned int vfieldrate, hperiod;
102	int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
103	int interlace;
104
105	/* allocate the drm_display_mode structure. If failure, we will
106	 * return directly
107	 */
108	drm_mode = drm_mode_create(dev);
109	if (!drm_mode)
110		return NULL;
111
112	/* the CVT default refresh rate is 60Hz */
113	if (!vrefresh)
114		vrefresh = 60;
115
116	/* the required field fresh rate */
117	if (interlaced)
118		vfieldrate = vrefresh * 2;
119	else
120		vfieldrate = vrefresh;
121
122	/* horizontal pixels */
123	hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
124
125	/* determine the left&right borders */
126	hmargin = 0;
127	if (margins) {
128		hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
129		hmargin -= hmargin % CVT_H_GRANULARITY;
130	}
131	/* find the total active pixels */
132	drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
133
134	/* find the number of lines per field */
135	if (interlaced)
136		vdisplay_rnd = vdisplay / 2;
137	else
138		vdisplay_rnd = vdisplay;
139
140	/* find the top & bottom borders */
141	vmargin = 0;
142	if (margins)
143		vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
144
145	drm_mode->vdisplay = vdisplay + 2 * vmargin;
146
147	/* Interlaced */
148	if (interlaced)
149		interlace = 1;
150	else
151		interlace = 0;
152
153	/* Determine VSync Width from aspect ratio */
154	if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
155		vsync = 4;
156	else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
157		vsync = 5;
158	else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
159		vsync = 6;
160	else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
161		vsync = 7;
162	else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
163		vsync = 7;
164	else /* custom */
165		vsync = 10;
166
167	if (!reduced) {
168		/* simplify the GTF calculation */
169		/* 4) Minimum time of vertical sync + back porch interval (µs)
170		 * default 550.0
171		 */
172		int tmp1, tmp2;
173#define CVT_MIN_VSYNC_BP	550
174		/* 3) Nominal HSync width (% of line period) - default 8 */
175#define CVT_HSYNC_PERCENTAGE	8
176		unsigned int hblank_percentage;
177		int vsyncandback_porch, vback_porch, hblank;
178
179		/* estimated the horizontal period */
180		tmp1 = HV_FACTOR * 1000000  -
181				CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
182		tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
183				interlace;
184		hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
185
186		tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
187		/* 9. Find number of lines in sync + backporch */
188		if (tmp1 < (vsync + CVT_MIN_V_PORCH))
189			vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
190		else
191			vsyncandback_porch = tmp1;
192		/* 10. Find number of lines in back porch */
193		vback_porch = vsyncandback_porch - vsync;
194		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
195				vsyncandback_porch + CVT_MIN_V_PORCH;
196		/* 5) Definition of Horizontal blanking time limitation */
197		/* Gradient (%/kHz) - default 600 */
198#define CVT_M_FACTOR	600
199		/* Offset (%) - default 40 */
200#define CVT_C_FACTOR	40
201		/* Blanking time scaling factor - default 128 */
202#define CVT_K_FACTOR	128
203		/* Scaling factor weighting - default 20 */
204#define CVT_J_FACTOR	20
205#define CVT_M_PRIME	(CVT_M_FACTOR * CVT_K_FACTOR / 256)
206#define CVT_C_PRIME	((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
207			 CVT_J_FACTOR)
208		/* 12. Find ideal blanking duty cycle from formula */
209		hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
210					hperiod / 1000;
211		/* 13. Blanking time */
212		if (hblank_percentage < 20 * HV_FACTOR)
213			hblank_percentage = 20 * HV_FACTOR;
214		hblank = drm_mode->hdisplay * hblank_percentage /
215			 (100 * HV_FACTOR - hblank_percentage);
216		hblank -= hblank % (2 * CVT_H_GRANULARITY);
217		/* 14. find the total pixes per line */
218		drm_mode->htotal = drm_mode->hdisplay + hblank;
219		drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
220		drm_mode->hsync_start = drm_mode->hsync_end -
221			(drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
222		drm_mode->hsync_start += CVT_H_GRANULARITY -
223			drm_mode->hsync_start % CVT_H_GRANULARITY;
224		/* fill the Vsync values */
225		drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
226		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
227	} else {
228		/* Reduced blanking */
229		/* Minimum vertical blanking interval time (µs)- default 460 */
230#define CVT_RB_MIN_VBLANK	460
231		/* Fixed number of clocks for horizontal sync */
232#define CVT_RB_H_SYNC		32
233		/* Fixed number of clocks for horizontal blanking */
234#define CVT_RB_H_BLANK		160
235		/* Fixed number of lines for vertical front porch - default 3*/
236#define CVT_RB_VFPORCH		3
237		int vbilines;
238		int tmp1, tmp2;
239		/* 8. Estimate Horizontal period. */
240		tmp1 = HV_FACTOR * 1000000 -
241			CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
242		tmp2 = vdisplay_rnd + 2 * vmargin;
243		hperiod = tmp1 / (tmp2 * vfieldrate);
244		/* 9. Find number of lines in vertical blanking */
245		vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
246		/* 10. Check if vertical blanking is sufficient */
247		if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
248			vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
249		/* 11. Find total number of lines in vertical field */
250		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
251		/* 12. Find total number of pixels in a line */
252		drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
253		/* Fill in HSync values */
254		drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
255		drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
256		/* Fill in VSync values */
257		drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
258		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
259	}
260	/* 15/13. Find pixel clock frequency (kHz for xf86) */
261	drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
262	drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
263	/* 18/16. Find actual vertical frame frequency */
264	/* ignore - just set the mode flag for interlaced */
265	if (interlaced) {
266		drm_mode->vtotal *= 2;
267		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
268	}
269	/* Fill the mode line name */
270	drm_mode_set_name(drm_mode);
271	if (reduced)
272		drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
273					DRM_MODE_FLAG_NVSYNC);
274	else
275		drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
276					DRM_MODE_FLAG_NHSYNC);
277
278	return drm_mode;
279}
280EXPORT_SYMBOL(drm_cvt_mode);
281
282/**
283 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
284 *
285 * @dev		:drm device
286 * @hdisplay	:hdisplay size
287 * @vdisplay	:vdisplay size
288 * @vrefresh	:vrefresh rate.
289 * @interlaced	:whether the interlace is supported
290 * @margins	:desired margin size
291 * @GTF_[MCKJ]  :extended GTF formula parameters
292 *
293 * LOCKING.
294 * none.
295 *
296 * return the modeline based on full GTF algorithm.
297 *
298 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
299 * in here multiplied by two.  For a C of 40, pass in 80.
300 */
301struct drm_display_mode *
302drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
303		     int vrefresh, bool interlaced, int margins,
304		     int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
305{	/* 1) top/bottom margin size (% of height) - default: 1.8, */
306#define	GTF_MARGIN_PERCENTAGE		18
307	/* 2) character cell horizontal granularity (pixels) - default 8 */
308#define	GTF_CELL_GRAN			8
309	/* 3) Minimum vertical porch (lines) - default 3 */
310#define	GTF_MIN_V_PORCH			1
311	/* width of vsync in lines */
312#define V_SYNC_RQD			3
313	/* width of hsync as % of total line */
314#define H_SYNC_PERCENT			8
315	/* min time of vsync + back porch (microsec) */
316#define MIN_VSYNC_PLUS_BP		550
317	/* C' and M' are part of the Blanking Duty Cycle computation */
318#define GTF_C_PRIME	((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
319#define GTF_M_PRIME	(GTF_K * GTF_M / 256)
320	struct drm_display_mode *drm_mode;
321	unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
322	int top_margin, bottom_margin;
323	int interlace;
324	unsigned int hfreq_est;
325	int vsync_plus_bp, vback_porch;
326	unsigned int vtotal_lines, vfieldrate_est, hperiod;
327	unsigned int vfield_rate, vframe_rate;
328	int left_margin, right_margin;
329	unsigned int total_active_pixels, ideal_duty_cycle;
330	unsigned int hblank, total_pixels, pixel_freq;
331	int hsync, hfront_porch, vodd_front_porch_lines;
332	unsigned int tmp1, tmp2;
333
334	drm_mode = drm_mode_create(dev);
335	if (!drm_mode)
336		return NULL;
337
338	/* 1. In order to give correct results, the number of horizontal
339	 * pixels requested is first processed to ensure that it is divisible
340	 * by the character size, by rounding it to the nearest character
341	 * cell boundary:
342	 */
343	hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
344	hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
345
346	/* 2. If interlace is requested, the number of vertical lines assumed
347	 * by the calculation must be halved, as the computation calculates
348	 * the number of vertical lines per field.
349	 */
350	if (interlaced)
351		vdisplay_rnd = vdisplay / 2;
352	else
353		vdisplay_rnd = vdisplay;
354
355	/* 3. Find the frame rate required: */
356	if (interlaced)
357		vfieldrate_rqd = vrefresh * 2;
358	else
359		vfieldrate_rqd = vrefresh;
360
361	/* 4. Find number of lines in Top margin: */
362	top_margin = 0;
363	if (margins)
364		top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
365				1000;
366	/* 5. Find number of lines in bottom margin: */
367	bottom_margin = top_margin;
368
369	/* 6. If interlace is required, then set variable interlace: */
370	if (interlaced)
371		interlace = 1;
372	else
373		interlace = 0;
374
375	/* 7. Estimate the Horizontal frequency */
376	{
377		tmp1 = (1000000  - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
378		tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
379				2 + interlace;
380		hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
381	}
382
383	/* 8. Find the number of lines in V sync + back porch */
384	/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
385	vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
386	vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
387	/*  9. Find the number of lines in V back porch alone: */
388	vback_porch = vsync_plus_bp - V_SYNC_RQD;
389	/*  10. Find the total number of lines in Vertical field period: */
390	vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
391			vsync_plus_bp + GTF_MIN_V_PORCH;
392	/*  11. Estimate the Vertical field frequency: */
393	vfieldrate_est = hfreq_est / vtotal_lines;
394	/*  12. Find the actual horizontal period: */
395	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
396
397	/*  13. Find the actual Vertical field frequency: */
398	vfield_rate = hfreq_est / vtotal_lines;
399	/*  14. Find the Vertical frame frequency: */
400	if (interlaced)
401		vframe_rate = vfield_rate / 2;
402	else
403		vframe_rate = vfield_rate;
404	/*  15. Find number of pixels in left margin: */
405	if (margins)
406		left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
407				1000;
408	else
409		left_margin = 0;
410
411	/* 16.Find number of pixels in right margin: */
412	right_margin = left_margin;
413	/* 17.Find total number of active pixels in image and left and right */
414	total_active_pixels = hdisplay_rnd + left_margin + right_margin;
415	/* 18.Find the ideal blanking duty cycle from blanking duty cycle */
416	ideal_duty_cycle = GTF_C_PRIME * 1000 -
417				(GTF_M_PRIME * 1000000 / hfreq_est);
418	/* 19.Find the number of pixels in the blanking time to the nearest
419	 * double character cell: */
420	hblank = total_active_pixels * ideal_duty_cycle /
421			(100000 - ideal_duty_cycle);
422	hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
423	hblank = hblank * 2 * GTF_CELL_GRAN;
424	/* 20.Find total number of pixels: */
425	total_pixels = total_active_pixels + hblank;
426	/* 21.Find pixel clock frequency: */
427	pixel_freq = total_pixels * hfreq_est / 1000;
428	/* Stage 1 computations are now complete; I should really pass
429	 * the results to another function and do the Stage 2 computations,
430	 * but I only need a few more values so I'll just append the
431	 * computations here for now */
432	/* 17. Find the number of pixels in the horizontal sync period: */
433	hsync = H_SYNC_PERCENT * total_pixels / 100;
434	hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
435	hsync = hsync * GTF_CELL_GRAN;
436	/* 18. Find the number of pixels in horizontal front porch period */
437	hfront_porch = hblank / 2 - hsync;
438	/*  36. Find the number of lines in the odd front porch period: */
439	vodd_front_porch_lines = GTF_MIN_V_PORCH ;
440
441	/* finally, pack the results in the mode struct */
442	drm_mode->hdisplay = hdisplay_rnd;
443	drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
444	drm_mode->hsync_end = drm_mode->hsync_start + hsync;
445	drm_mode->htotal = total_pixels;
446	drm_mode->vdisplay = vdisplay_rnd;
447	drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
448	drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
449	drm_mode->vtotal = vtotal_lines;
450
451	drm_mode->clock = pixel_freq;
452
453	if (interlaced) {
454		drm_mode->vtotal *= 2;
455		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
456	}
457
458	drm_mode_set_name(drm_mode);
459	if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
460		drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
461	else
462		drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
463
464	return drm_mode;
465}
466EXPORT_SYMBOL(drm_gtf_mode_complex);
467
468/**
469 * drm_gtf_mode - create the modeline based on GTF algorithm
470 *
471 * @dev		:drm device
472 * @hdisplay	:hdisplay size
473 * @vdisplay	:vdisplay size
474 * @vrefresh	:vrefresh rate.
475 * @interlaced	:whether the interlace is supported
476 * @margins	:whether the margin is supported
477 *
478 * LOCKING.
479 * none.
480 *
481 * return the modeline based on GTF algorithm
482 *
483 * This function is to create the modeline based on the GTF algorithm.
484 * Generalized Timing Formula is derived from:
485 *	GTF Spreadsheet by Andy Morrish (1/5/97)
486 *	available at http://www.vesa.org
487 *
488 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
489 * What I have done is to translate it by using integer calculation.
490 * I also refer to the function of fb_get_mode in the file of
491 * drivers/video/fbmon.c
492 *
493 * Standard GTF parameters:
494 * M = 600
495 * C = 40
496 * K = 128
497 * J = 20
498 */
499struct drm_display_mode *
500drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
501	     bool lace, int margins)
502{
503	return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
504				    margins, 600, 40 * 2, 128, 20 * 2);
505}
506EXPORT_SYMBOL(drm_gtf_mode);
507
508/**
509 * drm_mode_set_name - set the name on a mode
510 * @mode: name will be set in this mode
511 *
512 * LOCKING:
513 * None.
514 *
515 * Set the name of @mode to a standard format.
516 */
517void drm_mode_set_name(struct drm_display_mode *mode)
518{
519	bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
520
521	snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
522		 mode->hdisplay, mode->vdisplay,
523		 interlaced ? "i" : "");
524}
525EXPORT_SYMBOL(drm_mode_set_name);
526
527/**
528 * drm_mode_list_concat - move modes from one list to another
529 * @head: source list
530 * @new: dst list
531 *
532 * LOCKING:
533 * Caller must ensure both lists are locked.
534 *
535 * Move all the modes from @head to @new.
536 */
537void drm_mode_list_concat(struct list_head *head, struct list_head *new)
538{
539
540	struct list_head *entry, *tmp;
541
542	list_for_each_safe(entry, tmp, head) {
543		list_move_tail(entry, new);
544	}
545}
546EXPORT_SYMBOL(drm_mode_list_concat);
547
548/**
549 * drm_mode_width - get the width of a mode
550 * @mode: mode
551 *
552 * LOCKING:
553 * None.
554 *
555 * Return @mode's width (hdisplay) value.
556 *
557 * FIXME: is this needed?
558 *
559 * RETURNS:
560 * @mode->hdisplay
561 */
562int drm_mode_width(struct drm_display_mode *mode)
563{
564	return mode->hdisplay;
565
566}
567EXPORT_SYMBOL(drm_mode_width);
568
569/**
570 * drm_mode_height - get the height of a mode
571 * @mode: mode
572 *
573 * LOCKING:
574 * None.
575 *
576 * Return @mode's height (vdisplay) value.
577 *
578 * FIXME: is this needed?
579 *
580 * RETURNS:
581 * @mode->vdisplay
582 */
583int drm_mode_height(struct drm_display_mode *mode)
584{
585	return mode->vdisplay;
586}
587EXPORT_SYMBOL(drm_mode_height);
588
589/** drm_mode_hsync - get the hsync of a mode
590 * @mode: mode
591 *
592 * LOCKING:
593 * None.
594 *
595 * Return @modes's hsync rate in kHz, rounded to the nearest int.
596 */
597int drm_mode_hsync(const struct drm_display_mode *mode)
598{
599	unsigned int calc_val;
600
601	if (mode->hsync)
602		return mode->hsync;
603
604	if (mode->htotal < 0)
605		return 0;
606
607	calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
608	calc_val += 500;				/* round to 1000Hz */
609	calc_val /= 1000;				/* truncate to kHz */
610
611	return calc_val;
612}
613EXPORT_SYMBOL(drm_mode_hsync);
614
615/**
616 * drm_mode_vrefresh - get the vrefresh of a mode
617 * @mode: mode
618 *
619 * LOCKING:
620 * None.
621 *
622 * Return @mode's vrefresh rate in Hz or calculate it if necessary.
623 *
624 * FIXME: why is this needed?  shouldn't vrefresh be set already?
625 *
626 * RETURNS:
627 * Vertical refresh rate. It will be the result of actual value plus 0.5.
628 * If it is 70.288, it will return 70Hz.
629 * If it is 59.6, it will return 60Hz.
630 */
631int drm_mode_vrefresh(const struct drm_display_mode *mode)
632{
633	int refresh = 0;
634	unsigned int calc_val;
635
636	if (mode->vrefresh > 0)
637		refresh = mode->vrefresh;
638	else if (mode->htotal > 0 && mode->vtotal > 0) {
639		int vtotal;
640		vtotal = mode->vtotal;
641		/* work out vrefresh the value will be x1000 */
642		calc_val = (mode->clock * 1000);
643		calc_val /= mode->htotal;
644		refresh = (calc_val + vtotal / 2) / vtotal;
645
646		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
647			refresh *= 2;
648		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
649			refresh /= 2;
650		if (mode->vscan > 1)
651			refresh /= mode->vscan;
652	}
653	return refresh;
654}
655EXPORT_SYMBOL(drm_mode_vrefresh);
656
657/**
658 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
659 * @p: mode
660 * @adjust_flags: unused? (FIXME)
661 *
662 * LOCKING:
663 * None.
664 *
665 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
666 */
667void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
668{
669	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
670		return;
671
672	p->crtc_hdisplay = p->hdisplay;
673	p->crtc_hsync_start = p->hsync_start;
674	p->crtc_hsync_end = p->hsync_end;
675	p->crtc_htotal = p->htotal;
676	p->crtc_hskew = p->hskew;
677	p->crtc_vdisplay = p->vdisplay;
678	p->crtc_vsync_start = p->vsync_start;
679	p->crtc_vsync_end = p->vsync_end;
680	p->crtc_vtotal = p->vtotal;
681
682	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
683		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
684			p->crtc_vdisplay /= 2;
685			p->crtc_vsync_start /= 2;
686			p->crtc_vsync_end /= 2;
687			p->crtc_vtotal /= 2;
688		}
689	}
690
691	if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
692		p->crtc_vdisplay *= 2;
693		p->crtc_vsync_start *= 2;
694		p->crtc_vsync_end *= 2;
695		p->crtc_vtotal *= 2;
696	}
697
698	if (p->vscan > 1) {
699		p->crtc_vdisplay *= p->vscan;
700		p->crtc_vsync_start *= p->vscan;
701		p->crtc_vsync_end *= p->vscan;
702		p->crtc_vtotal *= p->vscan;
703	}
704
705	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
706	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
707	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
708	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
709
710	p->crtc_hadjusted = false;
711	p->crtc_vadjusted = false;
712}
713EXPORT_SYMBOL(drm_mode_set_crtcinfo);
714
715
716/**
717 * drm_mode_copy - copy the mode
718 * @dst: mode to overwrite
719 * @src: mode to copy
720 *
721 * LOCKING:
722 * None.
723 *
724 * Copy an existing mode into another mode, preserving the object id
725 * of the destination mode.
726 */
727void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
728{
729	int id = dst->base.id;
730
731	*dst = *src;
732	dst->base.id = id;
733	INIT_LIST_HEAD(&dst->head);
734}
735EXPORT_SYMBOL(drm_mode_copy);
736
737/**
738 * drm_mode_duplicate - allocate and duplicate an existing mode
739 * @m: mode to duplicate
740 *
741 * LOCKING:
742 * None.
743 *
744 * Just allocate a new mode, copy the existing mode into it, and return
745 * a pointer to it.  Used to create new instances of established modes.
746 */
747struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
748					    const struct drm_display_mode *mode)
749{
750	struct drm_display_mode *nmode;
751
752	nmode = drm_mode_create(dev);
753	if (!nmode)
754		return NULL;
755
756	drm_mode_copy(nmode, mode);
757
758	return nmode;
759}
760EXPORT_SYMBOL(drm_mode_duplicate);
761
762/**
763 * drm_mode_equal - test modes for equality
764 * @mode1: first mode
765 * @mode2: second mode
766 *
767 * LOCKING:
768 * None.
769 *
770 * Check to see if @mode1 and @mode2 are equivalent.
771 *
772 * RETURNS:
773 * True if the modes are equal, false otherwise.
774 */
775bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2)
776{
777	/* do clock check convert to PICOS so fb modes get matched
778	 * the same */
779	if (mode1->clock && mode2->clock) {
780		if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
781			return false;
782	} else if (mode1->clock != mode2->clock)
783		return false;
784
785	if (mode1->hdisplay == mode2->hdisplay &&
786	    mode1->hsync_start == mode2->hsync_start &&
787	    mode1->hsync_end == mode2->hsync_end &&
788	    mode1->htotal == mode2->htotal &&
789	    mode1->hskew == mode2->hskew &&
790	    mode1->vdisplay == mode2->vdisplay &&
791	    mode1->vsync_start == mode2->vsync_start &&
792	    mode1->vsync_end == mode2->vsync_end &&
793	    mode1->vtotal == mode2->vtotal &&
794	    mode1->vscan == mode2->vscan &&
795	    mode1->flags == mode2->flags)
796		return true;
797
798	return false;
799}
800EXPORT_SYMBOL(drm_mode_equal);
801
802/**
803 * drm_mode_validate_size - make sure modes adhere to size constraints
804 * @dev: DRM device
805 * @mode_list: list of modes to check
806 * @maxX: maximum width
807 * @maxY: maximum height
808 * @maxPitch: max pitch
809 *
810 * LOCKING:
811 * Caller must hold a lock protecting @mode_list.
812 *
813 * The DRM device (@dev) has size and pitch limits.  Here we validate the
814 * modes we probed for @dev against those limits and set their status as
815 * necessary.
816 */
817void drm_mode_validate_size(struct drm_device *dev,
818			    struct list_head *mode_list,
819			    int maxX, int maxY, int maxPitch)
820{
821	struct drm_display_mode *mode;
822
823	list_for_each_entry(mode, mode_list, head) {
824		if (maxPitch > 0 && mode->hdisplay > maxPitch)
825			mode->status = MODE_BAD_WIDTH;
826
827		if (maxX > 0 && mode->hdisplay > maxX)
828			mode->status = MODE_VIRTUAL_X;
829
830		if (maxY > 0 && mode->vdisplay > maxY)
831			mode->status = MODE_VIRTUAL_Y;
832	}
833}
834EXPORT_SYMBOL(drm_mode_validate_size);
835
836/**
837 * drm_mode_validate_clocks - validate modes against clock limits
838 * @dev: DRM device
839 * @mode_list: list of modes to check
840 * @min: minimum clock rate array
841 * @max: maximum clock rate array
842 * @n_ranges: number of clock ranges (size of arrays)
843 *
844 * LOCKING:
845 * Caller must hold a lock protecting @mode_list.
846 *
847 * Some code may need to check a mode list against the clock limits of the
848 * device in question.  This function walks the mode list, testing to make
849 * sure each mode falls within a given range (defined by @min and @max
850 * arrays) and sets @mode->status as needed.
851 */
852void drm_mode_validate_clocks(struct drm_device *dev,
853			      struct list_head *mode_list,
854			      int *min, int *max, int n_ranges)
855{
856	struct drm_display_mode *mode;
857	int i;
858
859	list_for_each_entry(mode, mode_list, head) {
860		bool good = false;
861		for (i = 0; i < n_ranges; i++) {
862			if (mode->clock >= min[i] && mode->clock <= max[i]) {
863				good = true;
864				break;
865			}
866		}
867		if (!good)
868			mode->status = MODE_CLOCK_RANGE;
869	}
870}
871EXPORT_SYMBOL(drm_mode_validate_clocks);
872
873/**
874 * drm_mode_prune_invalid - remove invalid modes from mode list
875 * @dev: DRM device
876 * @mode_list: list of modes to check
877 * @verbose: be verbose about it
878 *
879 * LOCKING:
880 * Caller must hold a lock protecting @mode_list.
881 *
882 * Once mode list generation is complete, a caller can use this routine to
883 * remove invalid modes from a mode list.  If any of the modes have a
884 * status other than %MODE_OK, they are removed from @mode_list and freed.
885 */
886void drm_mode_prune_invalid(struct drm_device *dev,
887			    struct list_head *mode_list, bool verbose)
888{
889	struct drm_display_mode *mode, *t;
890
891	list_for_each_entry_safe(mode, t, mode_list, head) {
892		if (mode->status != MODE_OK) {
893			list_del(&mode->head);
894			if (verbose) {
895				drm_mode_debug_printmodeline(mode);
896				DRM_DEBUG_KMS("Not using %s mode %d\n",
897					mode->name, mode->status);
898			}
899			drm_mode_destroy(dev, mode);
900		}
901	}
902}
903EXPORT_SYMBOL(drm_mode_prune_invalid);
904
905/**
906 * drm_mode_compare - compare modes for favorability
907 * @priv: unused
908 * @lh_a: list_head for first mode
909 * @lh_b: list_head for second mode
910 *
911 * LOCKING:
912 * None.
913 *
914 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
915 * which is better.
916 *
917 * RETURNS:
918 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
919 * positive if @lh_b is better than @lh_a.
920 */
921static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
922{
923	struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
924	struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
925	int diff;
926
927	diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
928		((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
929	if (diff)
930		return diff;
931	diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
932	if (diff)
933		return diff;
934	diff = b->clock - a->clock;
935	return diff;
936}
937
938/**
939 * drm_mode_sort - sort mode list
940 * @mode_list: list to sort
941 *
942 * LOCKING:
943 * Caller must hold a lock protecting @mode_list.
944 *
945 * Sort @mode_list by favorability, putting good modes first.
946 */
947void drm_mode_sort(struct list_head *mode_list)
948{
949	list_sort(NULL, mode_list, drm_mode_compare);
950}
951EXPORT_SYMBOL(drm_mode_sort);
952
953/**
954 * drm_mode_connector_list_update - update the mode list for the connector
955 * @connector: the connector to update
956 *
957 * LOCKING:
958 * Caller must hold a lock protecting @mode_list.
959 *
960 * This moves the modes from the @connector probed_modes list
961 * to the actual mode list. It compares the probed mode against the current
962 * list and only adds different modes. All modes unverified after this point
963 * will be removed by the prune invalid modes.
964 */
965void drm_mode_connector_list_update(struct drm_connector *connector)
966{
967	struct drm_display_mode *mode;
968	struct drm_display_mode *pmode, *pt;
969	int found_it;
970
971	list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
972				 head) {
973		found_it = 0;
974		/* go through current modes checking for the new probed mode */
975		list_for_each_entry(mode, &connector->modes, head) {
976			if (drm_mode_equal(pmode, mode)) {
977				found_it = 1;
978				/* if equal delete the probed mode */
979				mode->status = pmode->status;
980				/* Merge type bits together */
981				mode->type |= pmode->type;
982				list_del(&pmode->head);
983				drm_mode_destroy(connector->dev, pmode);
984				break;
985			}
986		}
987
988		if (!found_it) {
989			list_move_tail(&pmode->head, &connector->modes);
990		}
991	}
992}
993EXPORT_SYMBOL(drm_mode_connector_list_update);
994
995/**
996 * drm_mode_parse_command_line_for_connector - parse command line for connector
997 * @mode_option - per connector mode option
998 * @connector - connector to parse line for
999 *
1000 * This parses the connector specific then generic command lines for
1001 * modes and options to configure the connector.
1002 *
1003 * This uses the same parameters as the fb modedb.c, except for extra
1004 *	<xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1005 *
1006 * enable/enable Digital/disable bit at the end
1007 */
1008bool drm_mode_parse_command_line_for_connector(const char *mode_option,
1009					       struct drm_connector *connector,
1010					       struct drm_cmdline_mode *mode)
1011{
1012	const char *name;
1013	unsigned int namelen;
1014	bool res_specified = false, bpp_specified = false, refresh_specified = false;
1015	unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
1016	bool yres_specified = false, cvt = false, rb = false;
1017	bool interlace = false, margins = false, was_digit = false;
1018	int i;
1019	enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1020
1021#ifdef CONFIG_FB
1022	if (!mode_option)
1023		mode_option = fb_mode_option;
1024#endif
1025
1026	if (!mode_option) {
1027		mode->specified = false;
1028		return false;
1029	}
1030
1031	name = mode_option;
1032	namelen = strlen(name);
1033	for (i = namelen-1; i >= 0; i--) {
1034		switch (name[i]) {
1035		case '@':
1036			if (!refresh_specified && !bpp_specified &&
1037			    !yres_specified && !cvt && !rb && was_digit) {
1038				refresh = simple_strtol(&name[i+1], NULL, 10);
1039				refresh_specified = true;
1040				was_digit = false;
1041			} else
1042				goto done;
1043			break;
1044		case '-':
1045			if (!bpp_specified && !yres_specified && !cvt &&
1046			    !rb && was_digit) {
1047				bpp = simple_strtol(&name[i+1], NULL, 10);
1048				bpp_specified = true;
1049				was_digit = false;
1050			} else
1051				goto done;
1052			break;
1053		case 'x':
1054			if (!yres_specified && was_digit) {
1055				yres = simple_strtol(&name[i+1], NULL, 10);
1056				yres_specified = true;
1057				was_digit = false;
1058			} else
1059				goto done;
1060		case '0' ... '9':
1061			was_digit = true;
1062			break;
1063		case 'M':
1064			if (yres_specified || cvt || was_digit)
1065				goto done;
1066			cvt = true;
1067			break;
1068		case 'R':
1069			if (yres_specified || cvt || rb || was_digit)
1070				goto done;
1071			rb = true;
1072			break;
1073		case 'm':
1074			if (cvt || yres_specified || was_digit)
1075				goto done;
1076			margins = true;
1077			break;
1078		case 'i':
1079			if (cvt || yres_specified || was_digit)
1080				goto done;
1081			interlace = true;
1082			break;
1083		case 'e':
1084			if (yres_specified || bpp_specified || refresh_specified ||
1085			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1086				goto done;
1087
1088			force = DRM_FORCE_ON;
1089			break;
1090		case 'D':
1091			if (yres_specified || bpp_specified || refresh_specified ||
1092			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1093				goto done;
1094
1095			if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1096			    (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1097				force = DRM_FORCE_ON;
1098			else
1099				force = DRM_FORCE_ON_DIGITAL;
1100			break;
1101		case 'd':
1102			if (yres_specified || bpp_specified || refresh_specified ||
1103			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1104				goto done;
1105
1106			force = DRM_FORCE_OFF;
1107			break;
1108		default:
1109			goto done;
1110		}
1111	}
1112
1113	if (i < 0 && yres_specified) {
1114		char *ch;
1115		xres = simple_strtol(name, &ch, 10);
1116		if ((ch != NULL) && (*ch == 'x'))
1117			res_specified = true;
1118		else
1119			i = ch - name;
1120	} else if (!yres_specified && was_digit) {
1121		/* catch mode that begins with digits but has no 'x' */
1122		i = 0;
1123	}
1124done:
1125	if (i >= 0) {
1126		printk(KERN_WARNING
1127			"parse error at position %i in video mode '%s'\n",
1128			i, name);
1129		mode->specified = false;
1130		return false;
1131	}
1132
1133	if (res_specified) {
1134		mode->specified = true;
1135		mode->xres = xres;
1136		mode->yres = yres;
1137	}
1138
1139	if (refresh_specified) {
1140		mode->refresh_specified = true;
1141		mode->refresh = refresh;
1142	}
1143
1144	if (bpp_specified) {
1145		mode->bpp_specified = true;
1146		mode->bpp = bpp;
1147	}
1148	mode->rb = rb;
1149	mode->cvt = cvt;
1150	mode->interlace = interlace;
1151	mode->margins = margins;
1152	mode->force = force;
1153
1154	return true;
1155}
1156EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1157
1158struct drm_display_mode *
1159drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1160				  struct drm_cmdline_mode *cmd)
1161{
1162	struct drm_display_mode *mode;
1163
1164	if (cmd->cvt)
1165		mode = drm_cvt_mode(dev,
1166				    cmd->xres, cmd->yres,
1167				    cmd->refresh_specified ? cmd->refresh : 60,
1168				    cmd->rb, cmd->interlace,
1169				    cmd->margins);
1170	else
1171		mode = drm_gtf_mode(dev,
1172				    cmd->xres, cmd->yres,
1173				    cmd->refresh_specified ? cmd->refresh : 60,
1174				    cmd->interlace,
1175				    cmd->margins);
1176	if (!mode)
1177		return NULL;
1178
1179	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1180	return mode;
1181}
1182EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
1183