1/**************************************************************************
2 * Copyright (c) 2011, Intel Corporation.
3 * All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 **************************************************************************/
19
20#include <linux/backlight.h>
21#include <drm/drmP.h>
22#include <drm/drm.h>
23#include "gma_drm.h"
24#include "psb_drv.h"
25#include "psb_reg.h"
26#include "psb_intel_reg.h"
27#include "intel_bios.h"
28
29
30static int psb_output_init(struct drm_device *dev)
31{
32	struct drm_psb_private *dev_priv = dev->dev_private;
33	psb_intel_lvds_init(dev, &dev_priv->mode_dev);
34	psb_intel_sdvo_init(dev, SDVOB);
35	return 0;
36}
37
38#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
39
40/*
41 *	Poulsbo Backlight Interfaces
42 */
43
44#define BLC_PWM_PRECISION_FACTOR 100	/* 10000000 */
45#define BLC_PWM_FREQ_CALC_CONSTANT 32
46#define MHz 1000000
47
48#define PSB_BLC_PWM_PRECISION_FACTOR    10
49#define PSB_BLC_MAX_PWM_REG_FREQ        0xFFFE
50#define PSB_BLC_MIN_PWM_REG_FREQ        0x2
51
52#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
53#define PSB_BACKLIGHT_PWM_CTL_SHIFT	(16)
54
55static int psb_brightness;
56static struct backlight_device *psb_backlight_device;
57
58static int psb_get_brightness(struct backlight_device *bd)
59{
60	/* return locally cached var instead of HW read (due to DPST etc.) */
61	/* FIXME: ideally return actual value in case firmware fiddled with
62	   it */
63	return psb_brightness;
64}
65
66
67static int psb_backlight_setup(struct drm_device *dev)
68{
69	struct drm_psb_private *dev_priv = dev->dev_private;
70	unsigned long core_clock;
71	/* u32 bl_max_freq; */
72	/* unsigned long value; */
73	u16 bl_max_freq;
74	uint32_t value;
75	uint32_t blc_pwm_precision_factor;
76
77	/* get bl_max_freq and pol from dev_priv*/
78	if (!dev_priv->lvds_bl) {
79		dev_err(dev->dev, "Has no valid LVDS backlight info\n");
80		return -ENOENT;
81	}
82	bl_max_freq = dev_priv->lvds_bl->freq;
83	blc_pwm_precision_factor = PSB_BLC_PWM_PRECISION_FACTOR;
84
85	core_clock = dev_priv->core_freq;
86
87	value = (core_clock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT;
88	value *= blc_pwm_precision_factor;
89	value /= bl_max_freq;
90	value /= blc_pwm_precision_factor;
91
92	if (value > (unsigned long long)PSB_BLC_MAX_PWM_REG_FREQ ||
93		 value < (unsigned long long)PSB_BLC_MIN_PWM_REG_FREQ)
94				return -ERANGE;
95	else {
96		value &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
97		REG_WRITE(BLC_PWM_CTL,
98			(value << PSB_BACKLIGHT_PWM_CTL_SHIFT) | (value));
99	}
100	return 0;
101}
102
103static int psb_set_brightness(struct backlight_device *bd)
104{
105	struct drm_device *dev = bl_get_data(psb_backlight_device);
106	int level = bd->props.brightness;
107
108	/* Percentage 1-100% being valid */
109	if (level < 1)
110		level = 1;
111
112	psb_intel_lvds_set_brightness(dev, level);
113	psb_brightness = level;
114	return 0;
115}
116
117static const struct backlight_ops psb_ops = {
118	.get_brightness = psb_get_brightness,
119	.update_status  = psb_set_brightness,
120};
121
122static int psb_backlight_init(struct drm_device *dev)
123{
124	struct drm_psb_private *dev_priv = dev->dev_private;
125	int ret;
126	struct backlight_properties props;
127
128	memset(&props, 0, sizeof(struct backlight_properties));
129	props.max_brightness = 100;
130	props.type = BACKLIGHT_PLATFORM;
131
132	psb_backlight_device = backlight_device_register("psb-bl",
133					NULL, (void *)dev, &psb_ops, &props);
134	if (IS_ERR(psb_backlight_device))
135		return PTR_ERR(psb_backlight_device);
136
137	ret = psb_backlight_setup(dev);
138	if (ret < 0) {
139		backlight_device_unregister(psb_backlight_device);
140		psb_backlight_device = NULL;
141		return ret;
142	}
143	psb_backlight_device->props.brightness = 100;
144	psb_backlight_device->props.max_brightness = 100;
145	backlight_update_status(psb_backlight_device);
146	dev_priv->backlight_device = psb_backlight_device;
147	return 0;
148}
149
150#endif
151
152/*
153 *	Provide the Poulsbo specific chip logic and low level methods
154 *	for power management
155 */
156
157static void psb_init_pm(struct drm_device *dev)
158{
159	struct drm_psb_private *dev_priv = dev->dev_private;
160
161	u32 gating = PSB_RSGX32(PSB_CR_CLKGATECTL);
162	gating &= ~3;	/* Disable 2D clock gating */
163	gating |= 1;
164	PSB_WSGX32(gating, PSB_CR_CLKGATECTL);
165	PSB_RSGX32(PSB_CR_CLKGATECTL);
166}
167
168/**
169 *	psb_save_display_registers	-	save registers lost on suspend
170 *	@dev: our DRM device
171 *
172 *	Save the state we need in order to be able to restore the interface
173 *	upon resume from suspend
174 */
175static int psb_save_display_registers(struct drm_device *dev)
176{
177	struct drm_psb_private *dev_priv = dev->dev_private;
178	struct drm_crtc *crtc;
179	struct drm_connector *connector;
180	struct psb_state *regs = &dev_priv->regs.psb;
181
182	/* Display arbitration control + watermarks */
183	regs->saveDSPARB = PSB_RVDC32(DSPARB);
184	regs->saveDSPFW1 = PSB_RVDC32(DSPFW1);
185	regs->saveDSPFW2 = PSB_RVDC32(DSPFW2);
186	regs->saveDSPFW3 = PSB_RVDC32(DSPFW3);
187	regs->saveDSPFW4 = PSB_RVDC32(DSPFW4);
188	regs->saveDSPFW5 = PSB_RVDC32(DSPFW5);
189	regs->saveDSPFW6 = PSB_RVDC32(DSPFW6);
190	regs->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);
191
192	/* Save crtc and output state */
193	mutex_lock(&dev->mode_config.mutex);
194	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
195		if (drm_helper_crtc_in_use(crtc))
196			crtc->funcs->save(crtc);
197	}
198
199	list_for_each_entry(connector, &dev->mode_config.connector_list, head)
200		if (connector->funcs->save)
201			connector->funcs->save(connector);
202
203	mutex_unlock(&dev->mode_config.mutex);
204	return 0;
205}
206
207/**
208 *	psb_restore_display_registers	-	restore lost register state
209 *	@dev: our DRM device
210 *
211 *	Restore register state that was lost during suspend and resume.
212 */
213static int psb_restore_display_registers(struct drm_device *dev)
214{
215	struct drm_psb_private *dev_priv = dev->dev_private;
216	struct drm_crtc *crtc;
217	struct drm_connector *connector;
218	struct psb_state *regs = &dev_priv->regs.psb;
219
220	/* Display arbitration + watermarks */
221	PSB_WVDC32(regs->saveDSPARB, DSPARB);
222	PSB_WVDC32(regs->saveDSPFW1, DSPFW1);
223	PSB_WVDC32(regs->saveDSPFW2, DSPFW2);
224	PSB_WVDC32(regs->saveDSPFW3, DSPFW3);
225	PSB_WVDC32(regs->saveDSPFW4, DSPFW4);
226	PSB_WVDC32(regs->saveDSPFW5, DSPFW5);
227	PSB_WVDC32(regs->saveDSPFW6, DSPFW6);
228	PSB_WVDC32(regs->saveCHICKENBIT, DSPCHICKENBIT);
229
230	/*make sure VGA plane is off. it initializes to on after reset!*/
231	PSB_WVDC32(0x80000000, VGACNTRL);
232
233	mutex_lock(&dev->mode_config.mutex);
234	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
235		if (drm_helper_crtc_in_use(crtc))
236			crtc->funcs->restore(crtc);
237
238	list_for_each_entry(connector, &dev->mode_config.connector_list, head)
239		if (connector->funcs->restore)
240			connector->funcs->restore(connector);
241
242	mutex_unlock(&dev->mode_config.mutex);
243	return 0;
244}
245
246static int psb_power_down(struct drm_device *dev)
247{
248	return 0;
249}
250
251static int psb_power_up(struct drm_device *dev)
252{
253	return 0;
254}
255
256static void psb_get_core_freq(struct drm_device *dev)
257{
258	uint32_t clock;
259	struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
260	struct drm_psb_private *dev_priv = dev->dev_private;
261
262	/*pci_write_config_dword(pci_root, 0xD4, 0x00C32004);*/
263	/*pci_write_config_dword(pci_root, 0xD0, 0xE0033000);*/
264
265	pci_write_config_dword(pci_root, 0xD0, 0xD0050300);
266	pci_read_config_dword(pci_root, 0xD4, &clock);
267	pci_dev_put(pci_root);
268
269	switch (clock & 0x07) {
270	case 0:
271		dev_priv->core_freq = 100;
272		break;
273	case 1:
274		dev_priv->core_freq = 133;
275		break;
276	case 2:
277		dev_priv->core_freq = 150;
278		break;
279	case 3:
280		dev_priv->core_freq = 178;
281		break;
282	case 4:
283		dev_priv->core_freq = 200;
284		break;
285	case 5:
286	case 6:
287	case 7:
288		dev_priv->core_freq = 266;
289	default:
290		dev_priv->core_freq = 0;
291	}
292}
293
294static int psb_chip_setup(struct drm_device *dev)
295{
296	psb_get_core_freq(dev);
297	gma_intel_setup_gmbus(dev);
298	gma_intel_opregion_init(dev);
299	psb_intel_init_bios(dev);
300	return 0;
301}
302
303static void psb_chip_teardown(struct drm_device *dev)
304{
305	gma_intel_teardown_gmbus(dev);
306}
307
308const struct psb_ops psb_chip_ops = {
309	.name = "Poulsbo",
310	.accel_2d = 1,
311	.pipes = 2,
312	.crtcs = 2,
313	.sgx_offset = PSB_SGX_OFFSET,
314	.chip_setup = psb_chip_setup,
315	.chip_teardown = psb_chip_teardown,
316
317	.crtc_helper = &psb_intel_helper_funcs,
318	.crtc_funcs = &psb_intel_crtc_funcs,
319
320	.output_init = psb_output_init,
321
322#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
323	.backlight_init = psb_backlight_init,
324#endif
325
326	.init_pm = psb_init_pm,
327	.save_regs = psb_save_display_registers,
328	.restore_regs = psb_restore_display_registers,
329	.power_down = psb_power_down,
330	.power_up = psb_power_up,
331};
332
333