1/*
2 * Renesas Solutions Highlander FPGA I2C/SMBus support.
3 *
4 * Supported devices: R0P7780LC0011RL, R0P7785LC0011RL
5 *
6 * Copyright (C) 2008  Paul Mundt
7 * Copyright (C) 2008  Renesas Solutions Corp.
8 * Copyright (C) 2008  Atom Create Engineering Co., Ltd.
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License version 2. See the file "COPYING" in the main directory
12 * of this archive for more details.
13 */
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/i2c.h>
18#include <linux/platform_device.h>
19#include <linux/completion.h>
20#include <linux/io.h>
21#include <linux/delay.h>
22#include <linux/slab.h>
23
24#define SMCR		0x00
25#define SMCR_START	(1 << 0)
26#define SMCR_IRIC	(1 << 1)
27#define SMCR_BBSY	(1 << 2)
28#define SMCR_ACKE	(1 << 3)
29#define SMCR_RST	(1 << 4)
30#define SMCR_IEIC	(1 << 6)
31
32#define SMSMADR		0x02
33
34#define SMMR		0x04
35#define SMMR_MODE0	(1 << 0)
36#define SMMR_MODE1	(1 << 1)
37#define SMMR_CAP	(1 << 3)
38#define SMMR_TMMD	(1 << 4)
39#define SMMR_SP		(1 << 7)
40
41#define SMSADR		0x06
42#define SMTRDR		0x46
43
44struct highlander_i2c_dev {
45	struct device		*dev;
46	void __iomem		*base;
47	struct i2c_adapter	adapter;
48	struct completion	cmd_complete;
49	unsigned long		last_read_time;
50	int			irq;
51	u8			*buf;
52	size_t			buf_len;
53};
54
55static bool iic_force_poll, iic_force_normal;
56static int iic_timeout = 1000, iic_read_delay;
57
58static inline void highlander_i2c_irq_enable(struct highlander_i2c_dev *dev)
59{
60	iowrite16(ioread16(dev->base + SMCR) | SMCR_IEIC, dev->base + SMCR);
61}
62
63static inline void highlander_i2c_irq_disable(struct highlander_i2c_dev *dev)
64{
65	iowrite16(ioread16(dev->base + SMCR) & ~SMCR_IEIC, dev->base + SMCR);
66}
67
68static inline void highlander_i2c_start(struct highlander_i2c_dev *dev)
69{
70	iowrite16(ioread16(dev->base + SMCR) | SMCR_START, dev->base + SMCR);
71}
72
73static inline void highlander_i2c_done(struct highlander_i2c_dev *dev)
74{
75	iowrite16(ioread16(dev->base + SMCR) | SMCR_IRIC, dev->base + SMCR);
76}
77
78static void highlander_i2c_setup(struct highlander_i2c_dev *dev)
79{
80	u16 smmr;
81
82	smmr = ioread16(dev->base + SMMR);
83	smmr |= SMMR_TMMD;
84
85	if (iic_force_normal)
86		smmr &= ~SMMR_SP;
87	else
88		smmr |= SMMR_SP;
89
90	iowrite16(smmr, dev->base + SMMR);
91}
92
93static void smbus_write_data(u8 *src, u16 *dst, int len)
94{
95	for (; len > 1; len -= 2) {
96		*dst++ = be16_to_cpup((__be16 *)src);
97		src += 2;
98	}
99
100	if (len)
101		*dst = *src << 8;
102}
103
104static void smbus_read_data(u16 *src, u8 *dst, int len)
105{
106	for (; len > 1; len -= 2) {
107		*(__be16 *)dst = cpu_to_be16p(src++);
108		dst += 2;
109	}
110
111	if (len)
112		*dst = *src >> 8;
113}
114
115static void highlander_i2c_command(struct highlander_i2c_dev *dev,
116				   u8 command, int len)
117{
118	unsigned int i;
119	u16 cmd = (command << 8) | command;
120
121	for (i = 0; i < len; i += 2) {
122		if (len - i == 1)
123			cmd = command << 8;
124		iowrite16(cmd, dev->base + SMSADR + i);
125		dev_dbg(dev->dev, "command data[%x] 0x%04x\n", i/2, cmd);
126	}
127}
128
129static int highlander_i2c_wait_for_bbsy(struct highlander_i2c_dev *dev)
130{
131	unsigned long timeout;
132
133	timeout = jiffies + msecs_to_jiffies(iic_timeout);
134	while (ioread16(dev->base + SMCR) & SMCR_BBSY) {
135		if (time_after(jiffies, timeout)) {
136			dev_warn(dev->dev, "timeout waiting for bus ready\n");
137			return -ETIMEDOUT;
138		}
139
140		msleep(1);
141	}
142
143	return 0;
144}
145
146static int highlander_i2c_reset(struct highlander_i2c_dev *dev)
147{
148	iowrite16(ioread16(dev->base + SMCR) | SMCR_RST, dev->base + SMCR);
149	return highlander_i2c_wait_for_bbsy(dev);
150}
151
152static int highlander_i2c_wait_for_ack(struct highlander_i2c_dev *dev)
153{
154	u16 tmp = ioread16(dev->base + SMCR);
155
156	if ((tmp & (SMCR_IRIC | SMCR_ACKE)) == SMCR_ACKE) {
157		dev_warn(dev->dev, "ack abnormality\n");
158		return highlander_i2c_reset(dev);
159	}
160
161	return 0;
162}
163
164static irqreturn_t highlander_i2c_irq(int irq, void *dev_id)
165{
166	struct highlander_i2c_dev *dev = dev_id;
167
168	highlander_i2c_done(dev);
169	complete(&dev->cmd_complete);
170
171	return IRQ_HANDLED;
172}
173
174static void highlander_i2c_poll(struct highlander_i2c_dev *dev)
175{
176	unsigned long timeout;
177	u16 smcr;
178
179	timeout = jiffies + msecs_to_jiffies(iic_timeout);
180	for (;;) {
181		smcr = ioread16(dev->base + SMCR);
182
183		/*
184		 * Don't bother checking ACKE here, this and the reset
185		 * are handled in highlander_i2c_wait_xfer_done() when
186		 * waiting for the ACK.
187		 */
188
189		if (smcr & SMCR_IRIC)
190			return;
191		if (time_after(jiffies, timeout))
192			break;
193
194		cpu_relax();
195		cond_resched();
196	}
197
198	dev_err(dev->dev, "polling timed out\n");
199}
200
201static inline int highlander_i2c_wait_xfer_done(struct highlander_i2c_dev *dev)
202{
203	if (dev->irq)
204		wait_for_completion_timeout(&dev->cmd_complete,
205					  msecs_to_jiffies(iic_timeout));
206	else
207		/* busy looping, the IRQ of champions */
208		highlander_i2c_poll(dev);
209
210	return highlander_i2c_wait_for_ack(dev);
211}
212
213static int highlander_i2c_read(struct highlander_i2c_dev *dev)
214{
215	int i, cnt;
216	u16 data[16];
217
218	if (highlander_i2c_wait_for_bbsy(dev))
219		return -EAGAIN;
220
221	highlander_i2c_start(dev);
222
223	if (highlander_i2c_wait_xfer_done(dev)) {
224		dev_err(dev->dev, "Arbitration loss\n");
225		return -EAGAIN;
226	}
227
228	/*
229	 * The R0P7780LC0011RL FPGA needs a significant delay between
230	 * data read cycles, otherwise the transceiver gets confused and
231	 * garbage is returned when the read is subsequently aborted.
232	 *
233	 * It is not sufficient to wait for BBSY.
234	 *
235	 * While this generally only applies to the older SH7780-based
236	 * Highlanders, the same issue can be observed on SH7785 ones,
237	 * albeit less frequently. SH7780-based Highlanders may need
238	 * this to be as high as 1000 ms.
239	 */
240	if (iic_read_delay && time_before(jiffies, dev->last_read_time +
241				 msecs_to_jiffies(iic_read_delay)))
242		msleep(jiffies_to_msecs((dev->last_read_time +
243				msecs_to_jiffies(iic_read_delay)) - jiffies));
244
245	cnt = (dev->buf_len + 1) >> 1;
246	for (i = 0; i < cnt; i++) {
247		data[i] = ioread16(dev->base + SMTRDR + (i * sizeof(u16)));
248		dev_dbg(dev->dev, "read data[%x] 0x%04x\n", i, data[i]);
249	}
250
251	smbus_read_data(data, dev->buf, dev->buf_len);
252
253	dev->last_read_time = jiffies;
254
255	return 0;
256}
257
258static int highlander_i2c_write(struct highlander_i2c_dev *dev)
259{
260	int i, cnt;
261	u16 data[16];
262
263	smbus_write_data(dev->buf, data, dev->buf_len);
264
265	cnt = (dev->buf_len + 1) >> 1;
266	for (i = 0; i < cnt; i++) {
267		iowrite16(data[i], dev->base + SMTRDR + (i * sizeof(u16)));
268		dev_dbg(dev->dev, "write data[%x] 0x%04x\n", i, data[i]);
269	}
270
271	if (highlander_i2c_wait_for_bbsy(dev))
272		return -EAGAIN;
273
274	highlander_i2c_start(dev);
275
276	return highlander_i2c_wait_xfer_done(dev);
277}
278
279static int highlander_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr,
280				  unsigned short flags, char read_write,
281				  u8 command, int size,
282				  union i2c_smbus_data *data)
283{
284	struct highlander_i2c_dev *dev = i2c_get_adapdata(adap);
285	u16 tmp;
286
287	init_completion(&dev->cmd_complete);
288
289	dev_dbg(dev->dev, "addr %04x, command %02x, read_write %d, size %d\n",
290		addr, command, read_write, size);
291
292	/*
293	 * Set up the buffer and transfer size
294	 */
295	switch (size) {
296	case I2C_SMBUS_BYTE_DATA:
297		dev->buf = &data->byte;
298		dev->buf_len = 1;
299		break;
300	case I2C_SMBUS_I2C_BLOCK_DATA:
301		dev->buf = &data->block[1];
302		dev->buf_len = data->block[0];
303		break;
304	default:
305		dev_err(dev->dev, "unsupported command %d\n", size);
306		return -EINVAL;
307	}
308
309	/*
310	 * Encode the mode setting
311	 */
312	tmp = ioread16(dev->base + SMMR);
313	tmp &= ~(SMMR_MODE0 | SMMR_MODE1);
314
315	switch (dev->buf_len) {
316	case 1:
317		/* default */
318		break;
319	case 8:
320		tmp |= SMMR_MODE0;
321		break;
322	case 16:
323		tmp |= SMMR_MODE1;
324		break;
325	case 32:
326		tmp |= (SMMR_MODE0 | SMMR_MODE1);
327		break;
328	default:
329		dev_err(dev->dev, "unsupported xfer size %d\n", dev->buf_len);
330		return -EINVAL;
331	}
332
333	iowrite16(tmp, dev->base + SMMR);
334
335	/* Ensure we're in a sane state */
336	highlander_i2c_done(dev);
337
338	/* Set slave address */
339	iowrite16((addr << 1) | read_write, dev->base + SMSMADR);
340
341	highlander_i2c_command(dev, command, dev->buf_len);
342
343	if (read_write == I2C_SMBUS_READ)
344		return highlander_i2c_read(dev);
345	else
346		return highlander_i2c_write(dev);
347}
348
349static u32 highlander_i2c_func(struct i2c_adapter *adapter)
350{
351	return I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK;
352}
353
354static const struct i2c_algorithm highlander_i2c_algo = {
355	.smbus_xfer	= highlander_i2c_smbus_xfer,
356	.functionality	= highlander_i2c_func,
357};
358
359static int __devinit highlander_i2c_probe(struct platform_device *pdev)
360{
361	struct highlander_i2c_dev *dev;
362	struct i2c_adapter *adap;
363	struct resource *res;
364	int ret;
365
366	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
367	if (unlikely(!res)) {
368		dev_err(&pdev->dev, "no mem resource\n");
369		return -ENODEV;
370	}
371
372	dev = kzalloc(sizeof(struct highlander_i2c_dev), GFP_KERNEL);
373	if (unlikely(!dev))
374		return -ENOMEM;
375
376	dev->base = ioremap_nocache(res->start, resource_size(res));
377	if (unlikely(!dev->base)) {
378		ret = -ENXIO;
379		goto err;
380	}
381
382	dev->dev = &pdev->dev;
383	platform_set_drvdata(pdev, dev);
384
385	dev->irq = platform_get_irq(pdev, 0);
386	if (iic_force_poll)
387		dev->irq = 0;
388
389	if (dev->irq) {
390		ret = request_irq(dev->irq, highlander_i2c_irq, 0,
391				  pdev->name, dev);
392		if (unlikely(ret))
393			goto err_unmap;
394
395		highlander_i2c_irq_enable(dev);
396	} else {
397		dev_notice(&pdev->dev, "no IRQ, using polling mode\n");
398		highlander_i2c_irq_disable(dev);
399	}
400
401	dev->last_read_time = jiffies;	/* initial read jiffies */
402
403	highlander_i2c_setup(dev);
404
405	adap = &dev->adapter;
406	i2c_set_adapdata(adap, dev);
407	adap->owner = THIS_MODULE;
408	adap->class = I2C_CLASS_HWMON;
409	strlcpy(adap->name, "HL FPGA I2C adapter", sizeof(adap->name));
410	adap->algo = &highlander_i2c_algo;
411	adap->dev.parent = &pdev->dev;
412	adap->nr = pdev->id;
413
414	/*
415	 * Reset the adapter
416	 */
417	ret = highlander_i2c_reset(dev);
418	if (unlikely(ret)) {
419		dev_err(&pdev->dev, "controller didn't come up\n");
420		goto err_free_irq;
421	}
422
423	ret = i2c_add_numbered_adapter(adap);
424	if (unlikely(ret)) {
425		dev_err(&pdev->dev, "failure adding adapter\n");
426		goto err_free_irq;
427	}
428
429	return 0;
430
431err_free_irq:
432	if (dev->irq)
433		free_irq(dev->irq, dev);
434err_unmap:
435	iounmap(dev->base);
436err:
437	kfree(dev);
438
439	platform_set_drvdata(pdev, NULL);
440
441	return ret;
442}
443
444static int __devexit highlander_i2c_remove(struct platform_device *pdev)
445{
446	struct highlander_i2c_dev *dev = platform_get_drvdata(pdev);
447
448	i2c_del_adapter(&dev->adapter);
449
450	if (dev->irq)
451		free_irq(dev->irq, dev);
452
453	iounmap(dev->base);
454	kfree(dev);
455
456	platform_set_drvdata(pdev, NULL);
457
458	return 0;
459}
460
461static struct platform_driver highlander_i2c_driver = {
462	.driver		= {
463		.name	= "i2c-highlander",
464		.owner	= THIS_MODULE,
465	},
466
467	.probe		= highlander_i2c_probe,
468	.remove		= __devexit_p(highlander_i2c_remove),
469};
470
471module_platform_driver(highlander_i2c_driver);
472
473MODULE_AUTHOR("Paul Mundt");
474MODULE_DESCRIPTION("Renesas Highlander FPGA I2C/SMBus adapter");
475MODULE_LICENSE("GPL v2");
476
477module_param(iic_force_poll, bool, 0);
478module_param(iic_force_normal, bool, 0);
479module_param(iic_timeout, int, 0);
480module_param(iic_read_delay, int, 0);
481
482MODULE_PARM_DESC(iic_force_poll, "Force polling mode");
483MODULE_PARM_DESC(iic_force_normal,
484		 "Force normal mode (100 kHz), default is fast mode (400 kHz)");
485MODULE_PARM_DESC(iic_timeout, "Set timeout value in msecs (default 1000 ms)");
486MODULE_PARM_DESC(iic_read_delay,
487		 "Delay between data read cycles (default 0 ms)");
488