1/*
2 * Driver for ITE Tech Inc. IT8712F/IT8512 CIR
3 *
4 * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
19 * USA.
20 *
21 * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the
22 * skeleton provided by the nuvoton-cir driver.
23 *
24 * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues
25 * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus
26 * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards
27 * <jimbo-lirc@edwardsclan.net>.
28 *
29 * The lirc_ite8709 driver was written by Grégory Lardière
30 * <spmf2004-lirc@yahoo.fr> in 2008.
31 */
32
33#include <linux/kernel.h>
34#include <linux/module.h>
35#include <linux/pnp.h>
36#include <linux/io.h>
37#include <linux/interrupt.h>
38#include <linux/sched.h>
39#include <linux/delay.h>
40#include <linux/slab.h>
41#include <linux/input.h>
42#include <linux/bitops.h>
43#include <media/rc-core.h>
44#include <linux/pci_ids.h>
45
46#include "ite-cir.h"
47
48/* module parameters */
49
50/* debug level */
51static int debug;
52module_param(debug, int, S_IRUGO | S_IWUSR);
53MODULE_PARM_DESC(debug, "Enable debugging output");
54
55/* low limit for RX carrier freq, Hz, 0 for no RX demodulation */
56static int rx_low_carrier_freq;
57module_param(rx_low_carrier_freq, int, S_IRUGO | S_IWUSR);
58MODULE_PARM_DESC(rx_low_carrier_freq, "Override low RX carrier frequency, Hz, "
59		 "0 for no RX demodulation");
60
61/* high limit for RX carrier freq, Hz, 0 for no RX demodulation */
62static int rx_high_carrier_freq;
63module_param(rx_high_carrier_freq, int, S_IRUGO | S_IWUSR);
64MODULE_PARM_DESC(rx_high_carrier_freq, "Override high RX carrier frequency, "
65		 "Hz, 0 for no RX demodulation");
66
67/* override tx carrier frequency */
68static int tx_carrier_freq;
69module_param(tx_carrier_freq, int, S_IRUGO | S_IWUSR);
70MODULE_PARM_DESC(tx_carrier_freq, "Override TX carrier frequency, Hz");
71
72/* override tx duty cycle */
73static int tx_duty_cycle;
74module_param(tx_duty_cycle, int, S_IRUGO | S_IWUSR);
75MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100");
76
77/* override default sample period */
78static long sample_period;
79module_param(sample_period, long, S_IRUGO | S_IWUSR);
80MODULE_PARM_DESC(sample_period, "Override carrier sample period, us");
81
82/* override detected model id */
83static int model_number = -1;
84module_param(model_number, int, S_IRUGO | S_IWUSR);
85MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect");
86
87
88/* HW-independent code functions */
89
90/* check whether carrier frequency is high frequency */
91static inline bool ite_is_high_carrier_freq(unsigned int freq)
92{
93	return freq >= ITE_HCF_MIN_CARRIER_FREQ;
94}
95
96/* get the bits required to program the carrier frequency in CFQ bits,
97 * unshifted */
98static u8 ite_get_carrier_freq_bits(unsigned int freq)
99{
100	if (ite_is_high_carrier_freq(freq)) {
101		if (freq < 425000)
102			return ITE_CFQ_400;
103
104		else if (freq < 465000)
105			return ITE_CFQ_450;
106
107		else if (freq < 490000)
108			return ITE_CFQ_480;
109
110		else
111			return ITE_CFQ_500;
112	} else {
113			/* trim to limits */
114		if (freq < ITE_LCF_MIN_CARRIER_FREQ)
115			freq = ITE_LCF_MIN_CARRIER_FREQ;
116		if (freq > ITE_LCF_MAX_CARRIER_FREQ)
117			freq = ITE_LCF_MAX_CARRIER_FREQ;
118
119		/* convert to kHz and subtract the base freq */
120		freq =
121		    DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ,
122				      1000);
123
124		return (u8) freq;
125	}
126}
127
128/* get the bits required to program the pulse with in TXMPW */
129static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle)
130{
131	unsigned long period_ns, on_ns;
132
133	/* sanitize freq into range */
134	if (freq < ITE_LCF_MIN_CARRIER_FREQ)
135		freq = ITE_LCF_MIN_CARRIER_FREQ;
136	if (freq > ITE_HCF_MAX_CARRIER_FREQ)
137		freq = ITE_HCF_MAX_CARRIER_FREQ;
138
139	period_ns = 1000000000UL / freq;
140	on_ns = period_ns * duty_cycle / 100;
141
142	if (ite_is_high_carrier_freq(freq)) {
143		if (on_ns < 750)
144			return ITE_TXMPW_A;
145
146		else if (on_ns < 850)
147			return ITE_TXMPW_B;
148
149		else if (on_ns < 950)
150			return ITE_TXMPW_C;
151
152		else if (on_ns < 1080)
153			return ITE_TXMPW_D;
154
155		else
156			return ITE_TXMPW_E;
157	} else {
158		if (on_ns < 6500)
159			return ITE_TXMPW_A;
160
161		else if (on_ns < 7850)
162			return ITE_TXMPW_B;
163
164		else if (on_ns < 9650)
165			return ITE_TXMPW_C;
166
167		else if (on_ns < 11950)
168			return ITE_TXMPW_D;
169
170		else
171			return ITE_TXMPW_E;
172	}
173}
174
175/* decode raw bytes as received by the hardware, and push them to the ir-core
176 * layer */
177static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int
178			     length)
179{
180	u32 sample_period;
181	unsigned long *ldata;
182	unsigned int next_one, next_zero, size;
183	DEFINE_IR_RAW_EVENT(ev);
184
185	if (length == 0)
186		return;
187
188	sample_period = dev->params.sample_period;
189	ldata = (unsigned long *)data;
190	size = length << 3;
191	next_one = find_next_bit_le(ldata, size, 0);
192	if (next_one > 0) {
193		ev.pulse = true;
194		ev.duration =
195		    ITE_BITS_TO_NS(next_one, sample_period);
196		ir_raw_event_store_with_filter(dev->rdev, &ev);
197	}
198
199	while (next_one < size) {
200		next_zero = find_next_zero_bit_le(ldata, size, next_one + 1);
201		ev.pulse = false;
202		ev.duration = ITE_BITS_TO_NS(next_zero - next_one, sample_period);
203		ir_raw_event_store_with_filter(dev->rdev, &ev);
204
205		if (next_zero < size) {
206			next_one =
207			    find_next_bit_le(ldata,
208						     size,
209						     next_zero + 1);
210			ev.pulse = true;
211			ev.duration =
212			    ITE_BITS_TO_NS(next_one - next_zero,
213					   sample_period);
214			ir_raw_event_store_with_filter
215			    (dev->rdev, &ev);
216		} else
217			next_one = size;
218	}
219
220	ir_raw_event_handle(dev->rdev);
221
222	ite_dbg_verbose("decoded %d bytes.", length);
223}
224
225/* set all the rx/tx carrier parameters; this must be called with the device
226 * spinlock held */
227static void ite_set_carrier_params(struct ite_dev *dev)
228{
229	unsigned int freq, low_freq, high_freq;
230	int allowance;
231	bool use_demodulator;
232	bool for_tx = dev->transmitting;
233
234	ite_dbg("%s called", __func__);
235
236	if (for_tx) {
237		/* we don't need no stinking calculations */
238		freq = dev->params.tx_carrier_freq;
239		allowance = ITE_RXDCR_DEFAULT;
240		use_demodulator = false;
241	} else {
242		low_freq = dev->params.rx_low_carrier_freq;
243		high_freq = dev->params.rx_high_carrier_freq;
244
245		if (low_freq == 0) {
246			/* don't demodulate */
247			freq =
248			ITE_DEFAULT_CARRIER_FREQ;
249			allowance = ITE_RXDCR_DEFAULT;
250			use_demodulator = false;
251		} else {
252			/* calculate the middle freq */
253			freq = (low_freq + high_freq) / 2;
254
255			/* calculate the allowance */
256			allowance =
257			    DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq),
258					      ITE_RXDCR_PER_10000_STEP
259					      * (high_freq + low_freq));
260
261			if (allowance < 1)
262				allowance = 1;
263
264			if (allowance > ITE_RXDCR_MAX)
265				allowance = ITE_RXDCR_MAX;
266		}
267	}
268
269	/* set the carrier parameters in a device-dependent way */
270	dev->params.set_carrier_params(dev, ite_is_high_carrier_freq(freq),
271		 use_demodulator, ite_get_carrier_freq_bits(freq), allowance,
272		 ite_get_pulse_width_bits(freq, dev->params.tx_duty_cycle));
273}
274
275/* interrupt service routine for incoming and outgoing CIR data */
276static irqreturn_t ite_cir_isr(int irq, void *data)
277{
278	struct ite_dev *dev = data;
279	unsigned long flags;
280	irqreturn_t ret = IRQ_RETVAL(IRQ_NONE);
281	u8 rx_buf[ITE_RX_FIFO_LEN];
282	int rx_bytes;
283	int iflags;
284
285	ite_dbg_verbose("%s firing", __func__);
286
287	/* grab the spinlock */
288	spin_lock_irqsave(&dev->lock, flags);
289
290	/* read the interrupt flags */
291	iflags = dev->params.get_irq_causes(dev);
292
293	/* check for the receive interrupt */
294	if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) {
295		/* read the FIFO bytes */
296		rx_bytes =
297			dev->params.get_rx_bytes(dev, rx_buf,
298					     ITE_RX_FIFO_LEN);
299
300		if (rx_bytes > 0) {
301			/* drop the spinlock, since the ir-core layer
302			 * may call us back again through
303			 * ite_s_idle() */
304			spin_unlock_irqrestore(&dev->
305									 lock,
306									 flags);
307
308			/* decode the data we've just received */
309			ite_decode_bytes(dev, rx_buf,
310								   rx_bytes);
311
312			/* reacquire the spinlock */
313			spin_lock_irqsave(&dev->lock,
314								    flags);
315
316			/* mark the interrupt as serviced */
317			ret = IRQ_RETVAL(IRQ_HANDLED);
318		}
319	} else if (iflags & ITE_IRQ_TX_FIFO) {
320		/* FIFO space available interrupt */
321		ite_dbg_verbose("got interrupt for TX FIFO");
322
323		/* wake any sleeping transmitter */
324		wake_up_interruptible(&dev->tx_queue);
325
326		/* mark the interrupt as serviced */
327		ret = IRQ_RETVAL(IRQ_HANDLED);
328	}
329
330	/* drop the spinlock */
331	spin_unlock_irqrestore(&dev->lock, flags);
332
333	ite_dbg_verbose("%s done returning %d", __func__, (int)ret);
334
335	return ret;
336}
337
338/* set the rx carrier freq range, guess it's in Hz... */
339static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32
340				    carrier_high)
341{
342	unsigned long flags;
343	struct ite_dev *dev = rcdev->priv;
344
345	spin_lock_irqsave(&dev->lock, flags);
346	dev->params.rx_low_carrier_freq = carrier_low;
347	dev->params.rx_high_carrier_freq = carrier_high;
348	ite_set_carrier_params(dev);
349	spin_unlock_irqrestore(&dev->lock, flags);
350
351	return 0;
352}
353
354/* set the tx carrier freq, guess it's in Hz... */
355static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier)
356{
357	unsigned long flags;
358	struct ite_dev *dev = rcdev->priv;
359
360	spin_lock_irqsave(&dev->lock, flags);
361	dev->params.tx_carrier_freq = carrier;
362	ite_set_carrier_params(dev);
363	spin_unlock_irqrestore(&dev->lock, flags);
364
365	return 0;
366}
367
368/* set the tx duty cycle by controlling the pulse width */
369static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle)
370{
371	unsigned long flags;
372	struct ite_dev *dev = rcdev->priv;
373
374	spin_lock_irqsave(&dev->lock, flags);
375	dev->params.tx_duty_cycle = duty_cycle;
376	ite_set_carrier_params(dev);
377	spin_unlock_irqrestore(&dev->lock, flags);
378
379	return 0;
380}
381
382/* transmit out IR pulses; what you get here is a batch of alternating
383 * pulse/space/pulse/space lengths that we should write out completely through
384 * the FIFO, blocking on a full FIFO */
385static int ite_tx_ir(struct rc_dev *rcdev, unsigned *txbuf, unsigned n)
386{
387	unsigned long flags;
388	struct ite_dev *dev = rcdev->priv;
389	bool is_pulse = false;
390	int remaining_us, fifo_avail, fifo_remaining, last_idx = 0;
391	int max_rle_us, next_rle_us;
392	int ret = n;
393	u8 last_sent[ITE_TX_FIFO_LEN];
394	u8 val;
395
396	ite_dbg("%s called", __func__);
397
398	/* clear the array just in case */
399	memset(last_sent, 0, ARRAY_SIZE(last_sent));
400
401	spin_lock_irqsave(&dev->lock, flags);
402
403	/* let everybody know we're now transmitting */
404	dev->transmitting = true;
405
406	/* and set the carrier values for transmission */
407	ite_set_carrier_params(dev);
408
409	/* calculate how much time we can send in one byte */
410	max_rle_us =
411	    (ITE_BAUDRATE_DIVISOR * dev->params.sample_period *
412	     ITE_TX_MAX_RLE) / 1000;
413
414	/* disable the receiver */
415	dev->params.disable_rx(dev);
416
417	/* this is where we'll begin filling in the FIFO, until it's full.
418	 * then we'll just activate the interrupt, wait for it to wake us up
419	 * again, disable it, continue filling the FIFO... until everything
420	 * has been pushed out */
421	fifo_avail =
422	    ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
423
424	while (n > 0 && dev->in_use) {
425		/* transmit the next sample */
426		is_pulse = !is_pulse;
427		remaining_us = *(txbuf++);
428		n--;
429
430		ite_dbg("%s: %ld",
431				      ((is_pulse) ? "pulse" : "space"),
432				      (long int)
433				      remaining_us);
434
435		/* repeat while the pulse is non-zero length */
436		while (remaining_us > 0 && dev->in_use) {
437			if (remaining_us > max_rle_us)
438				next_rle_us = max_rle_us;
439
440			else
441				next_rle_us = remaining_us;
442
443			remaining_us -= next_rle_us;
444
445			/* check what's the length we have to pump out */
446			val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us;
447
448			/* put it into the sent buffer */
449			last_sent[last_idx++] = val;
450			last_idx &= (ITE_TX_FIFO_LEN);
451
452			/* encode it for 7 bits */
453			val = (val - 1) & ITE_TX_RLE_MASK;
454
455			/* take into account pulse/space prefix */
456			if (is_pulse)
457				val |= ITE_TX_PULSE;
458
459			else
460				val |= ITE_TX_SPACE;
461
462			/*
463			 * if we get to 0 available, read again, just in case
464			 * some other slot got freed
465			 */
466			if (fifo_avail <= 0)
467				fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
468
469			/* if it's still full */
470			if (fifo_avail <= 0) {
471				/* enable the tx interrupt */
472				dev->params.
473				enable_tx_interrupt(dev);
474
475				/* drop the spinlock */
476				spin_unlock_irqrestore(&dev->lock, flags);
477
478				/* wait for the FIFO to empty enough */
479				wait_event_interruptible(dev->tx_queue, (fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev)) >= 8);
480
481				/* get the spinlock again */
482				spin_lock_irqsave(&dev->lock, flags);
483
484				/* disable the tx interrupt again. */
485				dev->params.
486				disable_tx_interrupt(dev);
487			}
488
489			/* now send the byte through the FIFO */
490			dev->params.put_tx_byte(dev, val);
491			fifo_avail--;
492		}
493	}
494
495	/* wait and don't return until the whole FIFO has been sent out;
496	 * otherwise we could configure the RX carrier params instead of the
497	 * TX ones while the transmission is still being performed! */
498	fifo_remaining = dev->params.get_tx_used_slots(dev);
499	remaining_us = 0;
500	while (fifo_remaining > 0) {
501		fifo_remaining--;
502		last_idx--;
503		last_idx &= (ITE_TX_FIFO_LEN - 1);
504		remaining_us += last_sent[last_idx];
505	}
506	remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE);
507
508	/* drop the spinlock while we sleep */
509	spin_unlock_irqrestore(&dev->lock, flags);
510
511	/* sleep remaining_us microseconds */
512	mdelay(DIV_ROUND_UP(remaining_us, 1000));
513
514	/* reacquire the spinlock */
515	spin_lock_irqsave(&dev->lock, flags);
516
517	/* now we're not transmitting anymore */
518	dev->transmitting = false;
519
520	/* and set the carrier values for reception */
521	ite_set_carrier_params(dev);
522
523	/* reenable the receiver */
524	if (dev->in_use)
525		dev->params.enable_rx(dev);
526
527	/* notify transmission end */
528	wake_up_interruptible(&dev->tx_ended);
529
530	spin_unlock_irqrestore(&dev->lock, flags);
531
532	return ret;
533}
534
535/* idle the receiver if needed */
536static void ite_s_idle(struct rc_dev *rcdev, bool enable)
537{
538	unsigned long flags;
539	struct ite_dev *dev = rcdev->priv;
540
541	ite_dbg("%s called", __func__);
542
543	if (enable) {
544		spin_lock_irqsave(&dev->lock, flags);
545		dev->params.idle_rx(dev);
546		spin_unlock_irqrestore(&dev->lock, flags);
547	}
548}
549
550
551/* IT8712F HW-specific functions */
552
553/* retrieve a bitmask of the current causes for a pending interrupt; this may
554 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
555 * */
556static int it87_get_irq_causes(struct ite_dev *dev)
557{
558	u8 iflags;
559	int ret = 0;
560
561	ite_dbg("%s called", __func__);
562
563	/* read the interrupt flags */
564	iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II;
565
566	switch (iflags) {
567	case IT87_II_RXDS:
568		ret = ITE_IRQ_RX_FIFO;
569		break;
570	case IT87_II_RXFO:
571		ret = ITE_IRQ_RX_FIFO_OVERRUN;
572		break;
573	case IT87_II_TXLDL:
574		ret = ITE_IRQ_TX_FIFO;
575		break;
576	}
577
578	return ret;
579}
580
581/* set the carrier parameters; to be called with the spinlock held */
582static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq,
583				    bool use_demodulator,
584				    u8 carrier_freq_bits, u8 allowance_bits,
585				    u8 pulse_width_bits)
586{
587	u8 val;
588
589	ite_dbg("%s called", __func__);
590
591	/* program the RCR register */
592	val = inb(dev->cir_addr + IT87_RCR)
593		& ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR);
594
595	if (high_freq)
596		val |= IT87_HCFS;
597
598	if (use_demodulator)
599		val |= IT87_RXEND;
600
601	val |= allowance_bits;
602
603	outb(val, dev->cir_addr + IT87_RCR);
604
605	/* program the TCR2 register */
606	outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits,
607		dev->cir_addr + IT87_TCR2);
608}
609
610/* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
611 * held */
612static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
613{
614	int fifo, read = 0;
615
616	ite_dbg("%s called", __func__);
617
618	/* read how many bytes are still in the FIFO */
619	fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC;
620
621	while (fifo > 0 && buf_size > 0) {
622		*(buf++) = inb(dev->cir_addr + IT87_DR);
623		fifo--;
624		read++;
625		buf_size--;
626	}
627
628	return read;
629}
630
631/* return how many bytes are still in the FIFO; this will be called
632 * with the device spinlock NOT HELD while waiting for the TX FIFO to get
633 * empty; let's expect this won't be a problem */
634static int it87_get_tx_used_slots(struct ite_dev *dev)
635{
636	ite_dbg("%s called", __func__);
637
638	return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC;
639}
640
641/* put a byte to the TX fifo; this should be called with the spinlock held */
642static void it87_put_tx_byte(struct ite_dev *dev, u8 value)
643{
644	outb(value, dev->cir_addr + IT87_DR);
645}
646
647/* idle the receiver so that we won't receive samples until another
648  pulse is detected; this must be called with the device spinlock held */
649static void it87_idle_rx(struct ite_dev *dev)
650{
651	ite_dbg("%s called", __func__);
652
653	/* disable streaming by clearing RXACT writing it as 1 */
654	outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT,
655		dev->cir_addr + IT87_RCR);
656
657	/* clear the FIFO */
658	outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR,
659		dev->cir_addr + IT87_TCR1);
660}
661
662/* disable the receiver; this must be called with the device spinlock held */
663static void it87_disable_rx(struct ite_dev *dev)
664{
665	ite_dbg("%s called", __func__);
666
667	/* disable the receiver interrupts */
668	outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE),
669		dev->cir_addr + IT87_IER);
670
671	/* disable the receiver */
672	outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN,
673		dev->cir_addr + IT87_RCR);
674
675	/* clear the FIFO and RXACT (actually RXACT should have been cleared
676	* in the previous outb() call) */
677	it87_idle_rx(dev);
678}
679
680/* enable the receiver; this must be called with the device spinlock held */
681static void it87_enable_rx(struct ite_dev *dev)
682{
683	ite_dbg("%s called", __func__);
684
685	/* enable the receiver by setting RXEN */
686	outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN,
687		dev->cir_addr + IT87_RCR);
688
689	/* just prepare it to idle for the next reception */
690	it87_idle_rx(dev);
691
692	/* enable the receiver interrupts and master enable flag */
693	outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC,
694		dev->cir_addr + IT87_IER);
695}
696
697/* disable the transmitter interrupt; this must be called with the device
698 * spinlock held */
699static void it87_disable_tx_interrupt(struct ite_dev *dev)
700{
701	ite_dbg("%s called", __func__);
702
703	/* disable the transmitter interrupts */
704	outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE,
705		dev->cir_addr + IT87_IER);
706}
707
708/* enable the transmitter interrupt; this must be called with the device
709 * spinlock held */
710static void it87_enable_tx_interrupt(struct ite_dev *dev)
711{
712	ite_dbg("%s called", __func__);
713
714	/* enable the transmitter interrupts and master enable flag */
715	outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC,
716		dev->cir_addr + IT87_IER);
717}
718
719/* disable the device; this must be called with the device spinlock held */
720static void it87_disable(struct ite_dev *dev)
721{
722	ite_dbg("%s called", __func__);
723
724	/* clear out all interrupt enable flags */
725	outb(inb(dev->cir_addr + IT87_IER) &
726		~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE),
727		dev->cir_addr + IT87_IER);
728
729	/* disable the receiver */
730	it87_disable_rx(dev);
731
732	/* erase the FIFO */
733	outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1),
734		dev->cir_addr + IT87_TCR1);
735}
736
737/* initialize the hardware */
738static void it87_init_hardware(struct ite_dev *dev)
739{
740	ite_dbg("%s called", __func__);
741
742	/* enable just the baud rate divisor register,
743	disabling all the interrupts at the same time */
744	outb((inb(dev->cir_addr + IT87_IER) &
745		~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR,
746		dev->cir_addr + IT87_IER);
747
748	/* write out the baud rate divisor */
749	outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR);
750	outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR);
751
752	/* disable the baud rate divisor register again */
753	outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR,
754		dev->cir_addr + IT87_IER);
755
756	/* program the RCR register defaults */
757	outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR);
758
759	/* program the TCR1 register */
760	outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE
761		| IT87_FIFOTL_DEFAULT | IT87_FIFOCLR,
762		dev->cir_addr + IT87_TCR1);
763
764	/* program the carrier parameters */
765	ite_set_carrier_params(dev);
766}
767
768/* IT8512F on ITE8708 HW-specific functions */
769
770/* retrieve a bitmask of the current causes for a pending interrupt; this may
771 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
772 * */
773static int it8708_get_irq_causes(struct ite_dev *dev)
774{
775	u8 iflags;
776	int ret = 0;
777
778	ite_dbg("%s called", __func__);
779
780	/* read the interrupt flags */
781	iflags = inb(dev->cir_addr + IT8708_C0IIR);
782
783	if (iflags & IT85_TLDLI)
784		ret |= ITE_IRQ_TX_FIFO;
785	if (iflags & IT85_RDAI)
786		ret |= ITE_IRQ_RX_FIFO;
787	if (iflags & IT85_RFOI)
788		ret |= ITE_IRQ_RX_FIFO_OVERRUN;
789
790	return ret;
791}
792
793/* set the carrier parameters; to be called with the spinlock held */
794static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq,
795				      bool use_demodulator,
796				      u8 carrier_freq_bits, u8 allowance_bits,
797				      u8 pulse_width_bits)
798{
799	u8 val;
800
801	ite_dbg("%s called", __func__);
802
803	/* program the C0CFR register, with HRAE=1 */
804	outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
805		dev->cir_addr + IT8708_BANKSEL);
806
807	val = (inb(dev->cir_addr + IT8708_C0CFR)
808		& ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits;
809
810	if (high_freq)
811		val |= IT85_HCFS;
812
813	outb(val, dev->cir_addr + IT8708_C0CFR);
814
815	outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
816		   dev->cir_addr + IT8708_BANKSEL);
817
818	/* program the C0RCR register */
819	val = inb(dev->cir_addr + IT8708_C0RCR)
820		& ~(IT85_RXEND | IT85_RXDCR);
821
822	if (use_demodulator)
823		val |= IT85_RXEND;
824
825	val |= allowance_bits;
826
827	outb(val, dev->cir_addr + IT8708_C0RCR);
828
829	/* program the C0TCR register */
830	val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW;
831	val |= pulse_width_bits;
832	outb(val, dev->cir_addr + IT8708_C0TCR);
833}
834
835/* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
836 * held */
837static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
838{
839	int fifo, read = 0;
840
841	ite_dbg("%s called", __func__);
842
843	/* read how many bytes are still in the FIFO */
844	fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC;
845
846	while (fifo > 0 && buf_size > 0) {
847		*(buf++) = inb(dev->cir_addr + IT8708_C0DR);
848		fifo--;
849		read++;
850		buf_size--;
851	}
852
853	return read;
854}
855
856/* return how many bytes are still in the FIFO; this will be called
857 * with the device spinlock NOT HELD while waiting for the TX FIFO to get
858 * empty; let's expect this won't be a problem */
859static int it8708_get_tx_used_slots(struct ite_dev *dev)
860{
861	ite_dbg("%s called", __func__);
862
863	return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC;
864}
865
866/* put a byte to the TX fifo; this should be called with the spinlock held */
867static void it8708_put_tx_byte(struct ite_dev *dev, u8 value)
868{
869	outb(value, dev->cir_addr + IT8708_C0DR);
870}
871
872/* idle the receiver so that we won't receive samples until another
873  pulse is detected; this must be called with the device spinlock held */
874static void it8708_idle_rx(struct ite_dev *dev)
875{
876	ite_dbg("%s called", __func__);
877
878	/* disable streaming by clearing RXACT writing it as 1 */
879	outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT,
880		dev->cir_addr + IT8708_C0RCR);
881
882	/* clear the FIFO */
883	outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR,
884		dev->cir_addr + IT8708_C0MSTCR);
885}
886
887/* disable the receiver; this must be called with the device spinlock held */
888static void it8708_disable_rx(struct ite_dev *dev)
889{
890	ite_dbg("%s called", __func__);
891
892	/* disable the receiver interrupts */
893	outb(inb(dev->cir_addr + IT8708_C0IER) &
894		~(IT85_RDAIE | IT85_RFOIE),
895		dev->cir_addr + IT8708_C0IER);
896
897	/* disable the receiver */
898	outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN,
899		dev->cir_addr + IT8708_C0RCR);
900
901	/* clear the FIFO and RXACT (actually RXACT should have been cleared
902	 * in the previous outb() call) */
903	it8708_idle_rx(dev);
904}
905
906/* enable the receiver; this must be called with the device spinlock held */
907static void it8708_enable_rx(struct ite_dev *dev)
908{
909	ite_dbg("%s called", __func__);
910
911	/* enable the receiver by setting RXEN */
912	outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN,
913		dev->cir_addr + IT8708_C0RCR);
914
915	/* just prepare it to idle for the next reception */
916	it8708_idle_rx(dev);
917
918	/* enable the receiver interrupts and master enable flag */
919	outb(inb(dev->cir_addr + IT8708_C0IER)
920		|IT85_RDAIE | IT85_RFOIE | IT85_IEC,
921		dev->cir_addr + IT8708_C0IER);
922}
923
924/* disable the transmitter interrupt; this must be called with the device
925 * spinlock held */
926static void it8708_disable_tx_interrupt(struct ite_dev *dev)
927{
928	ite_dbg("%s called", __func__);
929
930	/* disable the transmitter interrupts */
931	outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE,
932		dev->cir_addr + IT8708_C0IER);
933}
934
935/* enable the transmitter interrupt; this must be called with the device
936 * spinlock held */
937static void it8708_enable_tx_interrupt(struct ite_dev *dev)
938{
939	ite_dbg("%s called", __func__);
940
941	/* enable the transmitter interrupts and master enable flag */
942	outb(inb(dev->cir_addr + IT8708_C0IER)
943		|IT85_TLDLIE | IT85_IEC,
944		dev->cir_addr + IT8708_C0IER);
945}
946
947/* disable the device; this must be called with the device spinlock held */
948static void it8708_disable(struct ite_dev *dev)
949{
950	ite_dbg("%s called", __func__);
951
952	/* clear out all interrupt enable flags */
953	outb(inb(dev->cir_addr + IT8708_C0IER) &
954		~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
955		dev->cir_addr + IT8708_C0IER);
956
957	/* disable the receiver */
958	it8708_disable_rx(dev);
959
960	/* erase the FIFO */
961	outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR),
962		dev->cir_addr + IT8708_C0MSTCR);
963}
964
965/* initialize the hardware */
966static void it8708_init_hardware(struct ite_dev *dev)
967{
968	ite_dbg("%s called", __func__);
969
970	/* disable all the interrupts */
971	outb(inb(dev->cir_addr + IT8708_C0IER) &
972		~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
973		dev->cir_addr + IT8708_C0IER);
974
975	/* program the baud rate divisor */
976	outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
977		dev->cir_addr + IT8708_BANKSEL);
978
979	outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR);
980	outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
981		   dev->cir_addr + IT8708_C0BDHR);
982
983	outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
984		   dev->cir_addr + IT8708_BANKSEL);
985
986	/* program the C0MSTCR register defaults */
987	outb((inb(dev->cir_addr + IT8708_C0MSTCR) &
988			~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL |
989			  IT85_FIFOCLR | IT85_RESET)) |
990		       IT85_FIFOTL_DEFAULT,
991		       dev->cir_addr + IT8708_C0MSTCR);
992
993	/* program the C0RCR register defaults */
994	outb((inb(dev->cir_addr + IT8708_C0RCR) &
995			~(IT85_RXEN | IT85_RDWOS | IT85_RXEND |
996			  IT85_RXACT | IT85_RXDCR)) |
997		       ITE_RXDCR_DEFAULT,
998		       dev->cir_addr + IT8708_C0RCR);
999
1000	/* program the C0TCR register defaults */
1001	outb((inb(dev->cir_addr + IT8708_C0TCR) &
1002			~(IT85_TXMPM | IT85_TXMPW))
1003		       |IT85_TXRLE | IT85_TXENDF |
1004		       IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT,
1005		       dev->cir_addr + IT8708_C0TCR);
1006
1007	/* program the carrier parameters */
1008	ite_set_carrier_params(dev);
1009}
1010
1011/* IT8512F on ITE8709 HW-specific functions */
1012
1013/* read a byte from the SRAM module */
1014static inline u8 it8709_rm(struct ite_dev *dev, int index)
1015{
1016	outb(index, dev->cir_addr + IT8709_RAM_IDX);
1017	return inb(dev->cir_addr + IT8709_RAM_VAL);
1018}
1019
1020/* write a byte to the SRAM module */
1021static inline void it8709_wm(struct ite_dev *dev, u8 val, int index)
1022{
1023	outb(index, dev->cir_addr + IT8709_RAM_IDX);
1024	outb(val, dev->cir_addr + IT8709_RAM_VAL);
1025}
1026
1027static void it8709_wait(struct ite_dev *dev)
1028{
1029	int i = 0;
1030	/*
1031	 * loop until device tells it's ready to continue
1032	 * iterations count is usually ~750 but can sometimes achieve 13000
1033	 */
1034	for (i = 0; i < 15000; i++) {
1035		udelay(2);
1036		if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE)
1037			break;
1038	}
1039}
1040
1041/* read the value of a CIR register */
1042static u8 it8709_rr(struct ite_dev *dev, int index)
1043{
1044	/* just wait in case the previous access was a write */
1045	it8709_wait(dev);
1046	it8709_wm(dev, index, IT8709_REG_IDX);
1047	it8709_wm(dev, IT8709_READ, IT8709_MODE);
1048
1049	/* wait for the read data to be available */
1050	it8709_wait(dev);
1051
1052	/* return the read value */
1053	return it8709_rm(dev, IT8709_REG_VAL);
1054}
1055
1056/* write the value of a CIR register */
1057static void it8709_wr(struct ite_dev *dev, u8 val, int index)
1058{
1059	/* we wait before writing, and not afterwards, since this allows us to
1060	 * pipeline the host CPU with the microcontroller */
1061	it8709_wait(dev);
1062	it8709_wm(dev, val, IT8709_REG_VAL);
1063	it8709_wm(dev, index, IT8709_REG_IDX);
1064	it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
1065}
1066
1067/* retrieve a bitmask of the current causes for a pending interrupt; this may
1068 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
1069 * */
1070static int it8709_get_irq_causes(struct ite_dev *dev)
1071{
1072	u8 iflags;
1073	int ret = 0;
1074
1075	ite_dbg("%s called", __func__);
1076
1077	/* read the interrupt flags */
1078	iflags = it8709_rm(dev, IT8709_IIR);
1079
1080	if (iflags & IT85_TLDLI)
1081		ret |= ITE_IRQ_TX_FIFO;
1082	if (iflags & IT85_RDAI)
1083		ret |= ITE_IRQ_RX_FIFO;
1084	if (iflags & IT85_RFOI)
1085		ret |= ITE_IRQ_RX_FIFO_OVERRUN;
1086
1087	return ret;
1088}
1089
1090/* set the carrier parameters; to be called with the spinlock held */
1091static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq,
1092				      bool use_demodulator,
1093				      u8 carrier_freq_bits, u8 allowance_bits,
1094				      u8 pulse_width_bits)
1095{
1096	u8 val;
1097
1098	ite_dbg("%s called", __func__);
1099
1100	val = (it8709_rr(dev, IT85_C0CFR)
1101		     &~(IT85_HCFS | IT85_CFQ)) |
1102	    carrier_freq_bits;
1103
1104	if (high_freq)
1105		val |= IT85_HCFS;
1106
1107	it8709_wr(dev, val, IT85_C0CFR);
1108
1109	/* program the C0RCR register */
1110	val = it8709_rr(dev, IT85_C0RCR)
1111		& ~(IT85_RXEND | IT85_RXDCR);
1112
1113	if (use_demodulator)
1114		val |= IT85_RXEND;
1115
1116	val |= allowance_bits;
1117
1118	it8709_wr(dev, val, IT85_C0RCR);
1119
1120	/* program the C0TCR register */
1121	val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW;
1122	val |= pulse_width_bits;
1123	it8709_wr(dev, val, IT85_C0TCR);
1124}
1125
1126/* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
1127 * held */
1128static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
1129{
1130	int fifo, read = 0;
1131
1132	ite_dbg("%s called", __func__);
1133
1134	/* read how many bytes are still in the FIFO */
1135	fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC;
1136
1137	while (fifo > 0 && buf_size > 0) {
1138		*(buf++) = it8709_rm(dev, IT8709_FIFO + read);
1139		fifo--;
1140		read++;
1141		buf_size--;
1142	}
1143
1144	/* 'clear' the FIFO by setting the writing index to 0; this is
1145	 * completely bound to be racy, but we can't help it, since it's a
1146	 * limitation of the protocol */
1147	it8709_wm(dev, 0, IT8709_RFSR);
1148
1149	return read;
1150}
1151
1152/* return how many bytes are still in the FIFO; this will be called
1153 * with the device spinlock NOT HELD while waiting for the TX FIFO to get
1154 * empty; let's expect this won't be a problem */
1155static int it8709_get_tx_used_slots(struct ite_dev *dev)
1156{
1157	ite_dbg("%s called", __func__);
1158
1159	return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC;
1160}
1161
1162/* put a byte to the TX fifo; this should be called with the spinlock held */
1163static void it8709_put_tx_byte(struct ite_dev *dev, u8 value)
1164{
1165	it8709_wr(dev, value, IT85_C0DR);
1166}
1167
1168/* idle the receiver so that we won't receive samples until another
1169  pulse is detected; this must be called with the device spinlock held */
1170static void it8709_idle_rx(struct ite_dev *dev)
1171{
1172	ite_dbg("%s called", __func__);
1173
1174	/* disable streaming by clearing RXACT writing it as 1 */
1175	it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT,
1176			    IT85_C0RCR);
1177
1178	/* clear the FIFO */
1179	it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR,
1180			    IT85_C0MSTCR);
1181}
1182
1183/* disable the receiver; this must be called with the device spinlock held */
1184static void it8709_disable_rx(struct ite_dev *dev)
1185{
1186	ite_dbg("%s called", __func__);
1187
1188	/* disable the receiver interrupts */
1189	it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1190			    ~(IT85_RDAIE | IT85_RFOIE),
1191			    IT85_C0IER);
1192
1193	/* disable the receiver */
1194	it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN,
1195			    IT85_C0RCR);
1196
1197	/* clear the FIFO and RXACT (actually RXACT should have been cleared
1198	 * in the previous it8709_wr(dev, ) call) */
1199	it8709_idle_rx(dev);
1200}
1201
1202/* enable the receiver; this must be called with the device spinlock held */
1203static void it8709_enable_rx(struct ite_dev *dev)
1204{
1205	ite_dbg("%s called", __func__);
1206
1207	/* enable the receiver by setting RXEN */
1208	it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN,
1209			    IT85_C0RCR);
1210
1211	/* just prepare it to idle for the next reception */
1212	it8709_idle_rx(dev);
1213
1214	/* enable the receiver interrupts and master enable flag */
1215	it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
1216			    |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
1217			    IT85_C0IER);
1218}
1219
1220/* disable the transmitter interrupt; this must be called with the device
1221 * spinlock held */
1222static void it8709_disable_tx_interrupt(struct ite_dev *dev)
1223{
1224	ite_dbg("%s called", __func__);
1225
1226	/* disable the transmitter interrupts */
1227	it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE,
1228			    IT85_C0IER);
1229}
1230
1231/* enable the transmitter interrupt; this must be called with the device
1232 * spinlock held */
1233static void it8709_enable_tx_interrupt(struct ite_dev *dev)
1234{
1235	ite_dbg("%s called", __func__);
1236
1237	/* enable the transmitter interrupts and master enable flag */
1238	it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
1239			    |IT85_TLDLIE | IT85_IEC,
1240			    IT85_C0IER);
1241}
1242
1243/* disable the device; this must be called with the device spinlock held */
1244static void it8709_disable(struct ite_dev *dev)
1245{
1246	ite_dbg("%s called", __func__);
1247
1248	/* clear out all interrupt enable flags */
1249	it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1250			~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
1251		  IT85_C0IER);
1252
1253	/* disable the receiver */
1254	it8709_disable_rx(dev);
1255
1256	/* erase the FIFO */
1257	it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR),
1258			    IT85_C0MSTCR);
1259}
1260
1261/* initialize the hardware */
1262static void it8709_init_hardware(struct ite_dev *dev)
1263{
1264	ite_dbg("%s called", __func__);
1265
1266	/* disable all the interrupts */
1267	it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1268			~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
1269		  IT85_C0IER);
1270
1271	/* program the baud rate divisor */
1272	it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR);
1273	it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
1274			IT85_C0BDHR);
1275
1276	/* program the C0MSTCR register defaults */
1277	it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) &
1278			~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL
1279			  | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT,
1280		  IT85_C0MSTCR);
1281
1282	/* program the C0RCR register defaults */
1283	it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) &
1284			~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT
1285			  | IT85_RXDCR)) | ITE_RXDCR_DEFAULT,
1286		  IT85_C0RCR);
1287
1288	/* program the C0TCR register defaults */
1289	it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW))
1290			| IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT
1291			| IT85_TXMPW_DEFAULT,
1292		  IT85_C0TCR);
1293
1294	/* program the carrier parameters */
1295	ite_set_carrier_params(dev);
1296}
1297
1298
1299/* generic hardware setup/teardown code */
1300
1301/* activate the device for use */
1302static int ite_open(struct rc_dev *rcdev)
1303{
1304	struct ite_dev *dev = rcdev->priv;
1305	unsigned long flags;
1306
1307	ite_dbg("%s called", __func__);
1308
1309	spin_lock_irqsave(&dev->lock, flags);
1310	dev->in_use = true;
1311
1312	/* enable the receiver */
1313	dev->params.enable_rx(dev);
1314
1315	spin_unlock_irqrestore(&dev->lock, flags);
1316
1317	return 0;
1318}
1319
1320/* deactivate the device for use */
1321static void ite_close(struct rc_dev *rcdev)
1322{
1323	struct ite_dev *dev = rcdev->priv;
1324	unsigned long flags;
1325
1326	ite_dbg("%s called", __func__);
1327
1328	spin_lock_irqsave(&dev->lock, flags);
1329	dev->in_use = false;
1330
1331	/* wait for any transmission to end */
1332	spin_unlock_irqrestore(&dev->lock, flags);
1333	wait_event_interruptible(dev->tx_ended, !dev->transmitting);
1334	spin_lock_irqsave(&dev->lock, flags);
1335
1336	dev->params.disable(dev);
1337
1338	spin_unlock_irqrestore(&dev->lock, flags);
1339}
1340
1341/* supported models and their parameters */
1342static const struct ite_dev_params ite_dev_descs[] = {
1343	{	/* 0: ITE8704 */
1344	       .model = "ITE8704 CIR transceiver",
1345	       .io_region_size = IT87_IOREG_LENGTH,
1346	       .io_rsrc_no = 0,
1347	       .hw_tx_capable = true,
1348	       .sample_period = (u32) (1000000000ULL / 115200),
1349	       .tx_carrier_freq = 38000,
1350	       .tx_duty_cycle = 33,
1351	       .rx_low_carrier_freq = 0,
1352	       .rx_high_carrier_freq = 0,
1353
1354		/* operations */
1355	       .get_irq_causes = it87_get_irq_causes,
1356	       .enable_rx = it87_enable_rx,
1357	       .idle_rx = it87_idle_rx,
1358	       .disable_rx = it87_idle_rx,
1359	       .get_rx_bytes = it87_get_rx_bytes,
1360	       .enable_tx_interrupt = it87_enable_tx_interrupt,
1361	       .disable_tx_interrupt = it87_disable_tx_interrupt,
1362	       .get_tx_used_slots = it87_get_tx_used_slots,
1363	       .put_tx_byte = it87_put_tx_byte,
1364	       .disable = it87_disable,
1365	       .init_hardware = it87_init_hardware,
1366	       .set_carrier_params = it87_set_carrier_params,
1367	       },
1368	{	/* 1: ITE8713 */
1369	       .model = "ITE8713 CIR transceiver",
1370	       .io_region_size = IT87_IOREG_LENGTH,
1371	       .io_rsrc_no = 0,
1372	       .hw_tx_capable = true,
1373	       .sample_period = (u32) (1000000000ULL / 115200),
1374	       .tx_carrier_freq = 38000,
1375	       .tx_duty_cycle = 33,
1376	       .rx_low_carrier_freq = 0,
1377	       .rx_high_carrier_freq = 0,
1378
1379		/* operations */
1380	       .get_irq_causes = it87_get_irq_causes,
1381	       .enable_rx = it87_enable_rx,
1382	       .idle_rx = it87_idle_rx,
1383	       .disable_rx = it87_idle_rx,
1384	       .get_rx_bytes = it87_get_rx_bytes,
1385	       .enable_tx_interrupt = it87_enable_tx_interrupt,
1386	       .disable_tx_interrupt = it87_disable_tx_interrupt,
1387	       .get_tx_used_slots = it87_get_tx_used_slots,
1388	       .put_tx_byte = it87_put_tx_byte,
1389	       .disable = it87_disable,
1390	       .init_hardware = it87_init_hardware,
1391	       .set_carrier_params = it87_set_carrier_params,
1392	       },
1393	{	/* 2: ITE8708 */
1394	       .model = "ITE8708 CIR transceiver",
1395	       .io_region_size = IT8708_IOREG_LENGTH,
1396	       .io_rsrc_no = 0,
1397	       .hw_tx_capable = true,
1398	       .sample_period = (u32) (1000000000ULL / 115200),
1399	       .tx_carrier_freq = 38000,
1400	       .tx_duty_cycle = 33,
1401	       .rx_low_carrier_freq = 0,
1402	       .rx_high_carrier_freq = 0,
1403
1404		/* operations */
1405	       .get_irq_causes = it8708_get_irq_causes,
1406	       .enable_rx = it8708_enable_rx,
1407	       .idle_rx = it8708_idle_rx,
1408	       .disable_rx = it8708_idle_rx,
1409	       .get_rx_bytes = it8708_get_rx_bytes,
1410	       .enable_tx_interrupt = it8708_enable_tx_interrupt,
1411	       .disable_tx_interrupt =
1412	       it8708_disable_tx_interrupt,
1413	       .get_tx_used_slots = it8708_get_tx_used_slots,
1414	       .put_tx_byte = it8708_put_tx_byte,
1415	       .disable = it8708_disable,
1416	       .init_hardware = it8708_init_hardware,
1417	       .set_carrier_params = it8708_set_carrier_params,
1418	       },
1419	{	/* 3: ITE8709 */
1420	       .model = "ITE8709 CIR transceiver",
1421	       .io_region_size = IT8709_IOREG_LENGTH,
1422	       .io_rsrc_no = 2,
1423	       .hw_tx_capable = true,
1424	       .sample_period = (u32) (1000000000ULL / 115200),
1425	       .tx_carrier_freq = 38000,
1426	       .tx_duty_cycle = 33,
1427	       .rx_low_carrier_freq = 0,
1428	       .rx_high_carrier_freq = 0,
1429
1430		/* operations */
1431	       .get_irq_causes = it8709_get_irq_causes,
1432	       .enable_rx = it8709_enable_rx,
1433	       .idle_rx = it8709_idle_rx,
1434	       .disable_rx = it8709_idle_rx,
1435	       .get_rx_bytes = it8709_get_rx_bytes,
1436	       .enable_tx_interrupt = it8709_enable_tx_interrupt,
1437	       .disable_tx_interrupt =
1438	       it8709_disable_tx_interrupt,
1439	       .get_tx_used_slots = it8709_get_tx_used_slots,
1440	       .put_tx_byte = it8709_put_tx_byte,
1441	       .disable = it8709_disable,
1442	       .init_hardware = it8709_init_hardware,
1443	       .set_carrier_params = it8709_set_carrier_params,
1444	       },
1445};
1446
1447static const struct pnp_device_id ite_ids[] = {
1448	{"ITE8704", 0},		/* Default model */
1449	{"ITE8713", 1},		/* CIR found in EEEBox 1501U */
1450	{"ITE8708", 2},		/* Bridged IT8512 */
1451	{"ITE8709", 3},		/* SRAM-Bridged IT8512 */
1452	{"", 0},
1453};
1454
1455/* allocate memory, probe hardware, and initialize everything */
1456static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
1457		     *dev_id)
1458{
1459	const struct ite_dev_params *dev_desc = NULL;
1460	struct ite_dev *itdev = NULL;
1461	struct rc_dev *rdev = NULL;
1462	int ret = -ENOMEM;
1463	int model_no;
1464	int io_rsrc_no;
1465
1466	ite_dbg("%s called", __func__);
1467
1468	itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL);
1469	if (!itdev)
1470		return ret;
1471
1472	/* input device for IR remote (and tx) */
1473	rdev = rc_allocate_device();
1474	if (!rdev)
1475		goto failure;
1476
1477	ret = -ENODEV;
1478
1479	/* get the model number */
1480	model_no = (int)dev_id->driver_data;
1481	ite_pr(KERN_NOTICE, "Auto-detected model: %s\n",
1482		ite_dev_descs[model_no].model);
1483
1484	if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) {
1485		model_no = model_number;
1486		ite_pr(KERN_NOTICE, "The model has been fixed by a module "
1487			"parameter.");
1488	}
1489
1490	ite_pr(KERN_NOTICE, "Using model: %s\n", ite_dev_descs[model_no].model);
1491
1492	/* get the description for the device */
1493	dev_desc = &ite_dev_descs[model_no];
1494	io_rsrc_no = dev_desc->io_rsrc_no;
1495
1496	/* validate pnp resources */
1497	if (!pnp_port_valid(pdev, io_rsrc_no) ||
1498	    pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) {
1499		dev_err(&pdev->dev, "IR PNP Port not valid!\n");
1500		goto failure;
1501	}
1502
1503	if (!pnp_irq_valid(pdev, 0)) {
1504		dev_err(&pdev->dev, "PNP IRQ not valid!\n");
1505		goto failure;
1506	}
1507
1508	/* store resource values */
1509	itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no);
1510	itdev->cir_irq = pnp_irq(pdev, 0);
1511
1512	/* initialize spinlocks */
1513	spin_lock_init(&itdev->lock);
1514
1515	/* initialize raw event */
1516	init_ir_raw_event(&itdev->rawir);
1517
1518	/* set driver data into the pnp device */
1519	pnp_set_drvdata(pdev, itdev);
1520	itdev->pdev = pdev;
1521
1522	/* initialize waitqueues for transmission */
1523	init_waitqueue_head(&itdev->tx_queue);
1524	init_waitqueue_head(&itdev->tx_ended);
1525
1526	/* copy model-specific parameters */
1527	itdev->params = *dev_desc;
1528
1529	/* apply any overrides */
1530	if (sample_period > 0)
1531		itdev->params.sample_period = sample_period;
1532
1533	if (tx_carrier_freq > 0)
1534		itdev->params.tx_carrier_freq = tx_carrier_freq;
1535
1536	if (tx_duty_cycle > 0 && tx_duty_cycle <= 100)
1537		itdev->params.tx_duty_cycle = tx_duty_cycle;
1538
1539	if (rx_low_carrier_freq > 0)
1540		itdev->params.rx_low_carrier_freq = rx_low_carrier_freq;
1541
1542	if (rx_high_carrier_freq > 0)
1543		itdev->params.rx_high_carrier_freq = rx_high_carrier_freq;
1544
1545	/* print out parameters */
1546	ite_pr(KERN_NOTICE, "TX-capable: %d\n", (int)
1547			 itdev->params.hw_tx_capable);
1548	ite_pr(KERN_NOTICE, "Sample period (ns): %ld\n", (long)
1549		     itdev->params.sample_period);
1550	ite_pr(KERN_NOTICE, "TX carrier frequency (Hz): %d\n", (int)
1551		     itdev->params.tx_carrier_freq);
1552	ite_pr(KERN_NOTICE, "TX duty cycle (%%): %d\n", (int)
1553		     itdev->params.tx_duty_cycle);
1554	ite_pr(KERN_NOTICE, "RX low carrier frequency (Hz): %d\n", (int)
1555		     itdev->params.rx_low_carrier_freq);
1556	ite_pr(KERN_NOTICE, "RX high carrier frequency (Hz): %d\n", (int)
1557		     itdev->params.rx_high_carrier_freq);
1558
1559	/* set up hardware initial state */
1560	itdev->params.init_hardware(itdev);
1561
1562	/* set up ir-core props */
1563	rdev->priv = itdev;
1564	rdev->driver_type = RC_DRIVER_IR_RAW;
1565	rdev->allowed_protos = RC_TYPE_ALL;
1566	rdev->open = ite_open;
1567	rdev->close = ite_close;
1568	rdev->s_idle = ite_s_idle;
1569	rdev->s_rx_carrier_range = ite_set_rx_carrier_range;
1570	rdev->min_timeout = ITE_MIN_IDLE_TIMEOUT;
1571	rdev->max_timeout = ITE_MAX_IDLE_TIMEOUT;
1572	rdev->timeout = ITE_IDLE_TIMEOUT;
1573	rdev->rx_resolution = ITE_BAUDRATE_DIVISOR *
1574				itdev->params.sample_period;
1575	rdev->tx_resolution = ITE_BAUDRATE_DIVISOR *
1576				itdev->params.sample_period;
1577
1578	/* set up transmitter related values if needed */
1579	if (itdev->params.hw_tx_capable) {
1580		rdev->tx_ir = ite_tx_ir;
1581		rdev->s_tx_carrier = ite_set_tx_carrier;
1582		rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle;
1583	}
1584
1585	rdev->input_name = dev_desc->model;
1586	rdev->input_id.bustype = BUS_HOST;
1587	rdev->input_id.vendor = PCI_VENDOR_ID_ITE;
1588	rdev->input_id.product = 0;
1589	rdev->input_id.version = 0;
1590	rdev->driver_name = ITE_DRIVER_NAME;
1591	rdev->map_name = RC_MAP_RC6_MCE;
1592
1593	ret = -EBUSY;
1594	/* now claim resources */
1595	if (!request_region(itdev->cir_addr,
1596				dev_desc->io_region_size, ITE_DRIVER_NAME))
1597		goto failure;
1598
1599	if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED,
1600			ITE_DRIVER_NAME, (void *)itdev))
1601		goto failure;
1602
1603	ret = rc_register_device(rdev);
1604	if (ret)
1605		goto failure;
1606
1607	itdev->rdev = rdev;
1608	ite_pr(KERN_NOTICE, "driver has been successfully loaded\n");
1609
1610	return 0;
1611
1612failure:
1613	if (itdev->cir_irq)
1614		free_irq(itdev->cir_irq, itdev);
1615
1616	if (itdev->cir_addr)
1617		release_region(itdev->cir_addr, itdev->params.io_region_size);
1618
1619	rc_free_device(rdev);
1620	kfree(itdev);
1621
1622	return ret;
1623}
1624
1625static void __devexit ite_remove(struct pnp_dev *pdev)
1626{
1627	struct ite_dev *dev = pnp_get_drvdata(pdev);
1628	unsigned long flags;
1629
1630	ite_dbg("%s called", __func__);
1631
1632	spin_lock_irqsave(&dev->lock, flags);
1633
1634	/* disable hardware */
1635	dev->params.disable(dev);
1636
1637	spin_unlock_irqrestore(&dev->lock, flags);
1638
1639	/* free resources */
1640	free_irq(dev->cir_irq, dev);
1641	release_region(dev->cir_addr, dev->params.io_region_size);
1642
1643	rc_unregister_device(dev->rdev);
1644
1645	kfree(dev);
1646}
1647
1648static int ite_suspend(struct pnp_dev *pdev, pm_message_t state)
1649{
1650	struct ite_dev *dev = pnp_get_drvdata(pdev);
1651	unsigned long flags;
1652
1653	ite_dbg("%s called", __func__);
1654
1655	/* wait for any transmission to end */
1656	wait_event_interruptible(dev->tx_ended, !dev->transmitting);
1657
1658	spin_lock_irqsave(&dev->lock, flags);
1659
1660	/* disable all interrupts */
1661	dev->params.disable(dev);
1662
1663	spin_unlock_irqrestore(&dev->lock, flags);
1664
1665	return 0;
1666}
1667
1668static int ite_resume(struct pnp_dev *pdev)
1669{
1670	int ret = 0;
1671	struct ite_dev *dev = pnp_get_drvdata(pdev);
1672	unsigned long flags;
1673
1674	ite_dbg("%s called", __func__);
1675
1676	spin_lock_irqsave(&dev->lock, flags);
1677
1678	/* reinitialize hardware config registers */
1679	dev->params.init_hardware(dev);
1680	/* enable the receiver */
1681	dev->params.enable_rx(dev);
1682
1683	spin_unlock_irqrestore(&dev->lock, flags);
1684
1685	return ret;
1686}
1687
1688static void ite_shutdown(struct pnp_dev *pdev)
1689{
1690	struct ite_dev *dev = pnp_get_drvdata(pdev);
1691	unsigned long flags;
1692
1693	ite_dbg("%s called", __func__);
1694
1695	spin_lock_irqsave(&dev->lock, flags);
1696
1697	/* disable all interrupts */
1698	dev->params.disable(dev);
1699
1700	spin_unlock_irqrestore(&dev->lock, flags);
1701}
1702
1703static struct pnp_driver ite_driver = {
1704	.name		= ITE_DRIVER_NAME,
1705	.id_table	= ite_ids,
1706	.probe		= ite_probe,
1707	.remove		= __devexit_p(ite_remove),
1708	.suspend	= ite_suspend,
1709	.resume		= ite_resume,
1710	.shutdown	= ite_shutdown,
1711};
1712
1713int ite_init(void)
1714{
1715	return pnp_register_driver(&ite_driver);
1716}
1717
1718void ite_exit(void)
1719{
1720	pnp_unregister_driver(&ite_driver);
1721}
1722
1723MODULE_DEVICE_TABLE(pnp, ite_ids);
1724MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver");
1725
1726MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>");
1727MODULE_LICENSE("GPL");
1728
1729module_init(ite_init);
1730module_exit(ite_exit);
1731