1/* 2 * The Marvell camera core. This device appears in a number of settings, 3 * so it needs platform-specific support outside of the core. 4 * 5 * Copyright 2011 Jonathan Corbet corbet@lwn.net 6 */ 7#include <linux/kernel.h> 8#include <linux/module.h> 9#include <linux/fs.h> 10#include <linux/mm.h> 11#include <linux/i2c.h> 12#include <linux/interrupt.h> 13#include <linux/spinlock.h> 14#include <linux/slab.h> 15#include <linux/device.h> 16#include <linux/wait.h> 17#include <linux/list.h> 18#include <linux/dma-mapping.h> 19#include <linux/delay.h> 20#include <linux/vmalloc.h> 21#include <linux/io.h> 22#include <linux/videodev2.h> 23#include <media/v4l2-device.h> 24#include <media/v4l2-ioctl.h> 25#include <media/v4l2-chip-ident.h> 26#include <media/ov7670.h> 27#include <media/videobuf2-vmalloc.h> 28#include <media/videobuf2-dma-contig.h> 29#include <media/videobuf2-dma-sg.h> 30 31#include "mcam-core.h" 32 33/* 34 * Basic frame stats - to be deleted shortly 35 */ 36static int frames; 37static int singles; 38static int delivered; 39 40#ifdef MCAM_MODE_VMALLOC 41/* 42 * Internal DMA buffer management. Since the controller cannot do S/G I/O, 43 * we must have physically contiguous buffers to bring frames into. 44 * These parameters control how many buffers we use, whether we 45 * allocate them at load time (better chance of success, but nails down 46 * memory) or when somebody tries to use the camera (riskier), and, 47 * for load-time allocation, how big they should be. 48 * 49 * The controller can cycle through three buffers. We could use 50 * more by flipping pointers around, but it probably makes little 51 * sense. 52 */ 53 54static bool alloc_bufs_at_read; 55module_param(alloc_bufs_at_read, bool, 0444); 56MODULE_PARM_DESC(alloc_bufs_at_read, 57 "Non-zero value causes DMA buffers to be allocated when the " 58 "video capture device is read, rather than at module load " 59 "time. This saves memory, but decreases the chances of " 60 "successfully getting those buffers. This parameter is " 61 "only used in the vmalloc buffer mode"); 62 63static int n_dma_bufs = 3; 64module_param(n_dma_bufs, uint, 0644); 65MODULE_PARM_DESC(n_dma_bufs, 66 "The number of DMA buffers to allocate. Can be either two " 67 "(saves memory, makes timing tighter) or three."); 68 69static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */ 70module_param(dma_buf_size, uint, 0444); 71MODULE_PARM_DESC(dma_buf_size, 72 "The size of the allocated DMA buffers. If actual operating " 73 "parameters require larger buffers, an attempt to reallocate " 74 "will be made."); 75#else /* MCAM_MODE_VMALLOC */ 76static const bool alloc_bufs_at_read = 0; 77static const int n_dma_bufs = 3; /* Used by S/G_PARM */ 78#endif /* MCAM_MODE_VMALLOC */ 79 80static bool flip; 81module_param(flip, bool, 0444); 82MODULE_PARM_DESC(flip, 83 "If set, the sensor will be instructed to flip the image " 84 "vertically."); 85 86static int buffer_mode = -1; 87module_param(buffer_mode, int, 0444); 88MODULE_PARM_DESC(buffer_mode, 89 "Set the buffer mode to be used; default is to go with what " 90 "the platform driver asks for. Set to 0 for vmalloc, 1 for " 91 "DMA contiguous."); 92 93/* 94 * Status flags. Always manipulated with bit operations. 95 */ 96#define CF_BUF0_VALID 0 /* Buffers valid - first three */ 97#define CF_BUF1_VALID 1 98#define CF_BUF2_VALID 2 99#define CF_DMA_ACTIVE 3 /* A frame is incoming */ 100#define CF_CONFIG_NEEDED 4 /* Must configure hardware */ 101#define CF_SINGLE_BUFFER 5 /* Running with a single buffer */ 102#define CF_SG_RESTART 6 /* SG restart needed */ 103 104#define sensor_call(cam, o, f, args...) \ 105 v4l2_subdev_call(cam->sensor, o, f, ##args) 106 107static struct mcam_format_struct { 108 __u8 *desc; 109 __u32 pixelformat; 110 int bpp; /* Bytes per pixel */ 111 enum v4l2_mbus_pixelcode mbus_code; 112} mcam_formats[] = { 113 { 114 .desc = "YUYV 4:2:2", 115 .pixelformat = V4L2_PIX_FMT_YUYV, 116 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 117 .bpp = 2, 118 }, 119 { 120 .desc = "RGB 444", 121 .pixelformat = V4L2_PIX_FMT_RGB444, 122 .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE, 123 .bpp = 2, 124 }, 125 { 126 .desc = "RGB 565", 127 .pixelformat = V4L2_PIX_FMT_RGB565, 128 .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE, 129 .bpp = 2, 130 }, 131 { 132 .desc = "Raw RGB Bayer", 133 .pixelformat = V4L2_PIX_FMT_SBGGR8, 134 .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8, 135 .bpp = 1 136 }, 137}; 138#define N_MCAM_FMTS ARRAY_SIZE(mcam_formats) 139 140static struct mcam_format_struct *mcam_find_format(u32 pixelformat) 141{ 142 unsigned i; 143 144 for (i = 0; i < N_MCAM_FMTS; i++) 145 if (mcam_formats[i].pixelformat == pixelformat) 146 return mcam_formats + i; 147 /* Not found? Then return the first format. */ 148 return mcam_formats; 149} 150 151/* 152 * The default format we use until somebody says otherwise. 153 */ 154static const struct v4l2_pix_format mcam_def_pix_format = { 155 .width = VGA_WIDTH, 156 .height = VGA_HEIGHT, 157 .pixelformat = V4L2_PIX_FMT_YUYV, 158 .field = V4L2_FIELD_NONE, 159 .bytesperline = VGA_WIDTH*2, 160 .sizeimage = VGA_WIDTH*VGA_HEIGHT*2, 161}; 162 163static const enum v4l2_mbus_pixelcode mcam_def_mbus_code = 164 V4L2_MBUS_FMT_YUYV8_2X8; 165 166 167/* 168 * The two-word DMA descriptor format used by the Armada 610 and like. There 169 * Is a three-word format as well (set C1_DESC_3WORD) where the third 170 * word is a pointer to the next descriptor, but we don't use it. Two-word 171 * descriptors have to be contiguous in memory. 172 */ 173struct mcam_dma_desc { 174 u32 dma_addr; 175 u32 segment_len; 176}; 177 178/* 179 * Our buffer type for working with videobuf2. Note that the vb2 180 * developers have decreed that struct vb2_buffer must be at the 181 * beginning of this structure. 182 */ 183struct mcam_vb_buffer { 184 struct vb2_buffer vb_buf; 185 struct list_head queue; 186 struct mcam_dma_desc *dma_desc; /* Descriptor virtual address */ 187 dma_addr_t dma_desc_pa; /* Descriptor physical address */ 188 int dma_desc_nent; /* Number of mapped descriptors */ 189}; 190 191static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb) 192{ 193 return container_of(vb, struct mcam_vb_buffer, vb_buf); 194} 195 196/* 197 * Hand a completed buffer back to user space. 198 */ 199static void mcam_buffer_done(struct mcam_camera *cam, int frame, 200 struct vb2_buffer *vbuf) 201{ 202 vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage; 203 vbuf->v4l2_buf.sequence = cam->buf_seq[frame]; 204 vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage); 205 vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE); 206} 207 208 209 210/* 211 * Debugging and related. 212 */ 213#define cam_err(cam, fmt, arg...) \ 214 dev_err((cam)->dev, fmt, ##arg); 215#define cam_warn(cam, fmt, arg...) \ 216 dev_warn((cam)->dev, fmt, ##arg); 217#define cam_dbg(cam, fmt, arg...) \ 218 dev_dbg((cam)->dev, fmt, ##arg); 219 220 221/* 222 * Flag manipulation helpers 223 */ 224static void mcam_reset_buffers(struct mcam_camera *cam) 225{ 226 int i; 227 228 cam->next_buf = -1; 229 for (i = 0; i < cam->nbufs; i++) 230 clear_bit(i, &cam->flags); 231} 232 233static inline int mcam_needs_config(struct mcam_camera *cam) 234{ 235 return test_bit(CF_CONFIG_NEEDED, &cam->flags); 236} 237 238static void mcam_set_config_needed(struct mcam_camera *cam, int needed) 239{ 240 if (needed) 241 set_bit(CF_CONFIG_NEEDED, &cam->flags); 242 else 243 clear_bit(CF_CONFIG_NEEDED, &cam->flags); 244} 245 246/* ------------------------------------------------------------------- */ 247/* 248 * Make the controller start grabbing images. Everything must 249 * be set up before doing this. 250 */ 251static void mcam_ctlr_start(struct mcam_camera *cam) 252{ 253 /* set_bit performs a read, so no other barrier should be 254 needed here */ 255 mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE); 256} 257 258static void mcam_ctlr_stop(struct mcam_camera *cam) 259{ 260 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); 261} 262 263/* ------------------------------------------------------------------- */ 264 265#ifdef MCAM_MODE_VMALLOC 266/* 267 * Code specific to the vmalloc buffer mode. 268 */ 269 270/* 271 * Allocate in-kernel DMA buffers for vmalloc mode. 272 */ 273static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime) 274{ 275 int i; 276 277 mcam_set_config_needed(cam, 1); 278 if (loadtime) 279 cam->dma_buf_size = dma_buf_size; 280 else 281 cam->dma_buf_size = cam->pix_format.sizeimage; 282 if (n_dma_bufs > 3) 283 n_dma_bufs = 3; 284 285 cam->nbufs = 0; 286 for (i = 0; i < n_dma_bufs; i++) { 287 cam->dma_bufs[i] = dma_alloc_coherent(cam->dev, 288 cam->dma_buf_size, cam->dma_handles + i, 289 GFP_KERNEL); 290 if (cam->dma_bufs[i] == NULL) { 291 cam_warn(cam, "Failed to allocate DMA buffer\n"); 292 break; 293 } 294 (cam->nbufs)++; 295 } 296 297 switch (cam->nbufs) { 298 case 1: 299 dma_free_coherent(cam->dev, cam->dma_buf_size, 300 cam->dma_bufs[0], cam->dma_handles[0]); 301 cam->nbufs = 0; 302 case 0: 303 cam_err(cam, "Insufficient DMA buffers, cannot operate\n"); 304 return -ENOMEM; 305 306 case 2: 307 if (n_dma_bufs > 2) 308 cam_warn(cam, "Will limp along with only 2 buffers\n"); 309 break; 310 } 311 return 0; 312} 313 314static void mcam_free_dma_bufs(struct mcam_camera *cam) 315{ 316 int i; 317 318 for (i = 0; i < cam->nbufs; i++) { 319 dma_free_coherent(cam->dev, cam->dma_buf_size, 320 cam->dma_bufs[i], cam->dma_handles[i]); 321 cam->dma_bufs[i] = NULL; 322 } 323 cam->nbufs = 0; 324} 325 326 327/* 328 * Set up DMA buffers when operating in vmalloc mode 329 */ 330static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam) 331{ 332 /* 333 * Store the first two Y buffers (we aren't supporting 334 * planar formats for now, so no UV bufs). Then either 335 * set the third if it exists, or tell the controller 336 * to just use two. 337 */ 338 mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]); 339 mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]); 340 if (cam->nbufs > 2) { 341 mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]); 342 mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS); 343 } else 344 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); 345 if (cam->chip_id == V4L2_IDENT_CAFE) 346 mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */ 347} 348 349/* 350 * Copy data out to user space in the vmalloc case 351 */ 352static void mcam_frame_tasklet(unsigned long data) 353{ 354 struct mcam_camera *cam = (struct mcam_camera *) data; 355 int i; 356 unsigned long flags; 357 struct mcam_vb_buffer *buf; 358 359 spin_lock_irqsave(&cam->dev_lock, flags); 360 for (i = 0; i < cam->nbufs; i++) { 361 int bufno = cam->next_buf; 362 363 if (cam->state != S_STREAMING || bufno < 0) 364 break; /* I/O got stopped */ 365 if (++(cam->next_buf) >= cam->nbufs) 366 cam->next_buf = 0; 367 if (!test_bit(bufno, &cam->flags)) 368 continue; 369 if (list_empty(&cam->buffers)) { 370 singles++; 371 break; /* Leave it valid, hope for better later */ 372 } 373 delivered++; 374 clear_bit(bufno, &cam->flags); 375 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, 376 queue); 377 list_del_init(&buf->queue); 378 /* 379 * Drop the lock during the big copy. This *should* be safe... 380 */ 381 spin_unlock_irqrestore(&cam->dev_lock, flags); 382 memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno], 383 cam->pix_format.sizeimage); 384 mcam_buffer_done(cam, bufno, &buf->vb_buf); 385 spin_lock_irqsave(&cam->dev_lock, flags); 386 } 387 spin_unlock_irqrestore(&cam->dev_lock, flags); 388} 389 390 391/* 392 * Make sure our allocated buffers are up to the task. 393 */ 394static int mcam_check_dma_buffers(struct mcam_camera *cam) 395{ 396 if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage) 397 mcam_free_dma_bufs(cam); 398 if (cam->nbufs == 0) 399 return mcam_alloc_dma_bufs(cam, 0); 400 return 0; 401} 402 403static void mcam_vmalloc_done(struct mcam_camera *cam, int frame) 404{ 405 tasklet_schedule(&cam->s_tasklet); 406} 407 408#else /* MCAM_MODE_VMALLOC */ 409 410static inline int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime) 411{ 412 return 0; 413} 414 415static inline void mcam_free_dma_bufs(struct mcam_camera *cam) 416{ 417 return; 418} 419 420static inline int mcam_check_dma_buffers(struct mcam_camera *cam) 421{ 422 return 0; 423} 424 425 426 427#endif /* MCAM_MODE_VMALLOC */ 428 429 430#ifdef MCAM_MODE_DMA_CONTIG 431/* ---------------------------------------------------------------------- */ 432/* 433 * DMA-contiguous code. 434 */ 435/* 436 * Set up a contiguous buffer for the given frame. Here also is where 437 * the underrun strategy is set: if there is no buffer available, reuse 438 * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to 439 * keep the interrupt handler from giving that buffer back to user 440 * space. In this way, we always have a buffer to DMA to and don't 441 * have to try to play games stopping and restarting the controller. 442 */ 443static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame) 444{ 445 struct mcam_vb_buffer *buf; 446 /* 447 * If there are no available buffers, go into single mode 448 */ 449 if (list_empty(&cam->buffers)) { 450 buf = cam->vb_bufs[frame ^ 0x1]; 451 cam->vb_bufs[frame] = buf; 452 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR, 453 vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0)); 454 set_bit(CF_SINGLE_BUFFER, &cam->flags); 455 singles++; 456 return; 457 } 458 /* 459 * OK, we have a buffer we can use. 460 */ 461 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue); 462 list_del_init(&buf->queue); 463 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR, 464 vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0)); 465 cam->vb_bufs[frame] = buf; 466 clear_bit(CF_SINGLE_BUFFER, &cam->flags); 467} 468 469/* 470 * Initial B_DMA_contig setup. 471 */ 472static void mcam_ctlr_dma_contig(struct mcam_camera *cam) 473{ 474 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); 475 cam->nbufs = 2; 476 mcam_set_contig_buffer(cam, 0); 477 mcam_set_contig_buffer(cam, 1); 478} 479 480/* 481 * Frame completion handling. 482 */ 483static void mcam_dma_contig_done(struct mcam_camera *cam, int frame) 484{ 485 struct mcam_vb_buffer *buf = cam->vb_bufs[frame]; 486 487 if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) { 488 delivered++; 489 mcam_buffer_done(cam, frame, &buf->vb_buf); 490 } 491 mcam_set_contig_buffer(cam, frame); 492} 493 494#endif /* MCAM_MODE_DMA_CONTIG */ 495 496#ifdef MCAM_MODE_DMA_SG 497/* ---------------------------------------------------------------------- */ 498/* 499 * Scatter/gather-specific code. 500 */ 501 502/* 503 * Set up the next buffer for S/G I/O; caller should be sure that 504 * the controller is stopped and a buffer is available. 505 */ 506static void mcam_sg_next_buffer(struct mcam_camera *cam) 507{ 508 struct mcam_vb_buffer *buf; 509 510 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue); 511 list_del_init(&buf->queue); 512 /* 513 * Very Bad Not Good Things happen if you don't clear 514 * C1_DESC_ENA before making any descriptor changes. 515 */ 516 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA); 517 mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa); 518 mcam_reg_write(cam, REG_DESC_LEN_Y, 519 buf->dma_desc_nent*sizeof(struct mcam_dma_desc)); 520 mcam_reg_write(cam, REG_DESC_LEN_U, 0); 521 mcam_reg_write(cam, REG_DESC_LEN_V, 0); 522 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA); 523 cam->vb_bufs[0] = buf; 524} 525 526/* 527 * Initial B_DMA_sg setup 528 */ 529static void mcam_ctlr_dma_sg(struct mcam_camera *cam) 530{ 531 /* 532 * The list-empty condition can hit us at resume time 533 * if the buffer list was empty when the system was suspended. 534 */ 535 if (list_empty(&cam->buffers)) { 536 set_bit(CF_SG_RESTART, &cam->flags); 537 return; 538 } 539 540 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD); 541 mcam_sg_next_buffer(cam); 542 cam->nbufs = 3; 543} 544 545 546/* 547 * Frame completion with S/G is trickier. We can't muck with 548 * a descriptor chain on the fly, since the controller buffers it 549 * internally. So we have to actually stop and restart; Marvell 550 * says this is the way to do it. 551 * 552 * Of course, stopping is easier said than done; experience shows 553 * that the controller can start a frame *after* C0_ENABLE has been 554 * cleared. So when running in S/G mode, the controller is "stopped" 555 * on receipt of the start-of-frame interrupt. That means we can 556 * safely change the DMA descriptor array here and restart things 557 * (assuming there's another buffer waiting to go). 558 */ 559static void mcam_dma_sg_done(struct mcam_camera *cam, int frame) 560{ 561 struct mcam_vb_buffer *buf = cam->vb_bufs[0]; 562 563 /* 564 * If we're no longer supposed to be streaming, don't do anything. 565 */ 566 if (cam->state != S_STREAMING) 567 return; 568 /* 569 * If we have another buffer available, put it in and 570 * restart the engine. 571 */ 572 if (!list_empty(&cam->buffers)) { 573 mcam_sg_next_buffer(cam); 574 mcam_ctlr_start(cam); 575 /* 576 * Otherwise set CF_SG_RESTART and the controller will 577 * be restarted once another buffer shows up. 578 */ 579 } else { 580 set_bit(CF_SG_RESTART, &cam->flags); 581 singles++; 582 cam->vb_bufs[0] = NULL; 583 } 584 /* 585 * Now we can give the completed frame back to user space. 586 */ 587 delivered++; 588 mcam_buffer_done(cam, frame, &buf->vb_buf); 589} 590 591 592/* 593 * Scatter/gather mode requires stopping the controller between 594 * frames so we can put in a new DMA descriptor array. If no new 595 * buffer exists at frame completion, the controller is left stopped; 596 * this function is charged with gettig things going again. 597 */ 598static void mcam_sg_restart(struct mcam_camera *cam) 599{ 600 mcam_ctlr_dma_sg(cam); 601 mcam_ctlr_start(cam); 602 clear_bit(CF_SG_RESTART, &cam->flags); 603} 604 605#else /* MCAM_MODE_DMA_SG */ 606 607static inline void mcam_sg_restart(struct mcam_camera *cam) 608{ 609 return; 610} 611 612#endif /* MCAM_MODE_DMA_SG */ 613 614/* ---------------------------------------------------------------------- */ 615/* 616 * Buffer-mode-independent controller code. 617 */ 618 619/* 620 * Image format setup 621 */ 622static void mcam_ctlr_image(struct mcam_camera *cam) 623{ 624 int imgsz; 625 struct v4l2_pix_format *fmt = &cam->pix_format; 626 627 imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) | 628 (fmt->bytesperline & IMGSZ_H_MASK); 629 mcam_reg_write(cam, REG_IMGSIZE, imgsz); 630 mcam_reg_write(cam, REG_IMGOFFSET, 0); 631 /* YPITCH just drops the last two bits */ 632 mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline, 633 IMGP_YP_MASK); 634 /* 635 * Tell the controller about the image format we are using. 636 */ 637 switch (cam->pix_format.pixelformat) { 638 case V4L2_PIX_FMT_YUYV: 639 mcam_reg_write_mask(cam, REG_CTRL0, 640 C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV, 641 C0_DF_MASK); 642 break; 643 644 case V4L2_PIX_FMT_RGB444: 645 mcam_reg_write_mask(cam, REG_CTRL0, 646 C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB, 647 C0_DF_MASK); 648 /* Alpha value? */ 649 break; 650 651 case V4L2_PIX_FMT_RGB565: 652 mcam_reg_write_mask(cam, REG_CTRL0, 653 C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR, 654 C0_DF_MASK); 655 break; 656 657 default: 658 cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat); 659 break; 660 } 661 /* 662 * Make sure it knows we want to use hsync/vsync. 663 */ 664 mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, 665 C0_SIFM_MASK); 666} 667 668 669/* 670 * Configure the controller for operation; caller holds the 671 * device mutex. 672 */ 673static int mcam_ctlr_configure(struct mcam_camera *cam) 674{ 675 unsigned long flags; 676 677 spin_lock_irqsave(&cam->dev_lock, flags); 678 clear_bit(CF_SG_RESTART, &cam->flags); 679 cam->dma_setup(cam); 680 mcam_ctlr_image(cam); 681 mcam_set_config_needed(cam, 0); 682 spin_unlock_irqrestore(&cam->dev_lock, flags); 683 return 0; 684} 685 686static void mcam_ctlr_irq_enable(struct mcam_camera *cam) 687{ 688 /* 689 * Clear any pending interrupts, since we do not 690 * expect to have I/O active prior to enabling. 691 */ 692 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); 693 mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS); 694} 695 696static void mcam_ctlr_irq_disable(struct mcam_camera *cam) 697{ 698 mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS); 699} 700 701 702 703static void mcam_ctlr_init(struct mcam_camera *cam) 704{ 705 unsigned long flags; 706 707 spin_lock_irqsave(&cam->dev_lock, flags); 708 /* 709 * Make sure it's not powered down. 710 */ 711 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); 712 /* 713 * Turn off the enable bit. It sure should be off anyway, 714 * but it's good to be sure. 715 */ 716 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); 717 /* 718 * Clock the sensor appropriately. Controller clock should 719 * be 48MHz, sensor "typical" value is half that. 720 */ 721 mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK); 722 spin_unlock_irqrestore(&cam->dev_lock, flags); 723} 724 725 726/* 727 * Stop the controller, and don't return until we're really sure that no 728 * further DMA is going on. 729 */ 730static void mcam_ctlr_stop_dma(struct mcam_camera *cam) 731{ 732 unsigned long flags; 733 734 /* 735 * Theory: stop the camera controller (whether it is operating 736 * or not). Delay briefly just in case we race with the SOF 737 * interrupt, then wait until no DMA is active. 738 */ 739 spin_lock_irqsave(&cam->dev_lock, flags); 740 clear_bit(CF_SG_RESTART, &cam->flags); 741 mcam_ctlr_stop(cam); 742 cam->state = S_IDLE; 743 spin_unlock_irqrestore(&cam->dev_lock, flags); 744 /* 745 * This is a brutally long sleep, but experience shows that 746 * it can take the controller a while to get the message that 747 * it needs to stop grabbing frames. In particular, we can 748 * sometimes (on mmp) get a frame at the end WITHOUT the 749 * start-of-frame indication. 750 */ 751 msleep(150); 752 if (test_bit(CF_DMA_ACTIVE, &cam->flags)) 753 cam_err(cam, "Timeout waiting for DMA to end\n"); 754 /* This would be bad news - what now? */ 755 spin_lock_irqsave(&cam->dev_lock, flags); 756 mcam_ctlr_irq_disable(cam); 757 spin_unlock_irqrestore(&cam->dev_lock, flags); 758} 759 760/* 761 * Power up and down. 762 */ 763static void mcam_ctlr_power_up(struct mcam_camera *cam) 764{ 765 unsigned long flags; 766 767 spin_lock_irqsave(&cam->dev_lock, flags); 768 cam->plat_power_up(cam); 769 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); 770 spin_unlock_irqrestore(&cam->dev_lock, flags); 771 msleep(5); /* Just to be sure */ 772} 773 774static void mcam_ctlr_power_down(struct mcam_camera *cam) 775{ 776 unsigned long flags; 777 778 spin_lock_irqsave(&cam->dev_lock, flags); 779 /* 780 * School of hard knocks department: be sure we do any register 781 * twiddling on the controller *before* calling the platform 782 * power down routine. 783 */ 784 mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN); 785 cam->plat_power_down(cam); 786 spin_unlock_irqrestore(&cam->dev_lock, flags); 787} 788 789/* -------------------------------------------------------------------- */ 790/* 791 * Communications with the sensor. 792 */ 793 794static int __mcam_cam_reset(struct mcam_camera *cam) 795{ 796 return sensor_call(cam, core, reset, 0); 797} 798 799/* 800 * We have found the sensor on the i2c. Let's try to have a 801 * conversation. 802 */ 803static int mcam_cam_init(struct mcam_camera *cam) 804{ 805 struct v4l2_dbg_chip_ident chip; 806 int ret; 807 808 mutex_lock(&cam->s_mutex); 809 if (cam->state != S_NOTREADY) 810 cam_warn(cam, "Cam init with device in funky state %d", 811 cam->state); 812 ret = __mcam_cam_reset(cam); 813 if (ret) 814 goto out; 815 chip.ident = V4L2_IDENT_NONE; 816 chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR; 817 chip.match.addr = cam->sensor_addr; 818 ret = sensor_call(cam, core, g_chip_ident, &chip); 819 if (ret) 820 goto out; 821 cam->sensor_type = chip.ident; 822 if (cam->sensor_type != V4L2_IDENT_OV7670) { 823 cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type); 824 ret = -EINVAL; 825 goto out; 826 } 827/* Get/set parameters? */ 828 ret = 0; 829 cam->state = S_IDLE; 830out: 831 mcam_ctlr_power_down(cam); 832 mutex_unlock(&cam->s_mutex); 833 return ret; 834} 835 836/* 837 * Configure the sensor to match the parameters we have. Caller should 838 * hold s_mutex 839 */ 840static int mcam_cam_set_flip(struct mcam_camera *cam) 841{ 842 struct v4l2_control ctrl; 843 844 memset(&ctrl, 0, sizeof(ctrl)); 845 ctrl.id = V4L2_CID_VFLIP; 846 ctrl.value = flip; 847 return sensor_call(cam, core, s_ctrl, &ctrl); 848} 849 850 851static int mcam_cam_configure(struct mcam_camera *cam) 852{ 853 struct v4l2_mbus_framefmt mbus_fmt; 854 int ret; 855 856 v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code); 857 ret = sensor_call(cam, core, init, 0); 858 if (ret == 0) 859 ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt); 860 /* 861 * OV7670 does weird things if flip is set *before* format... 862 */ 863 ret += mcam_cam_set_flip(cam); 864 return ret; 865} 866 867/* 868 * Get everything ready, and start grabbing frames. 869 */ 870static int mcam_read_setup(struct mcam_camera *cam) 871{ 872 int ret; 873 unsigned long flags; 874 875 /* 876 * Configuration. If we still don't have DMA buffers, 877 * make one last, desperate attempt. 878 */ 879 if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 && 880 mcam_alloc_dma_bufs(cam, 0)) 881 return -ENOMEM; 882 883 if (mcam_needs_config(cam)) { 884 mcam_cam_configure(cam); 885 ret = mcam_ctlr_configure(cam); 886 if (ret) 887 return ret; 888 } 889 890 /* 891 * Turn it loose. 892 */ 893 spin_lock_irqsave(&cam->dev_lock, flags); 894 clear_bit(CF_DMA_ACTIVE, &cam->flags); 895 mcam_reset_buffers(cam); 896 mcam_ctlr_irq_enable(cam); 897 cam->state = S_STREAMING; 898 if (!test_bit(CF_SG_RESTART, &cam->flags)) 899 mcam_ctlr_start(cam); 900 spin_unlock_irqrestore(&cam->dev_lock, flags); 901 return 0; 902} 903 904/* ----------------------------------------------------------------------- */ 905/* 906 * Videobuf2 interface code. 907 */ 908 909static int mcam_vb_queue_setup(struct vb2_queue *vq, 910 const struct v4l2_format *fmt, unsigned int *nbufs, 911 unsigned int *num_planes, unsigned int sizes[], 912 void *alloc_ctxs[]) 913{ 914 struct mcam_camera *cam = vb2_get_drv_priv(vq); 915 int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2; 916 917 sizes[0] = cam->pix_format.sizeimage; 918 *num_planes = 1; /* Someday we have to support planar formats... */ 919 if (*nbufs < minbufs) 920 *nbufs = minbufs; 921 if (cam->buffer_mode == B_DMA_contig) 922 alloc_ctxs[0] = cam->vb_alloc_ctx; 923 return 0; 924} 925 926 927static void mcam_vb_buf_queue(struct vb2_buffer *vb) 928{ 929 struct mcam_vb_buffer *mvb = vb_to_mvb(vb); 930 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); 931 unsigned long flags; 932 int start; 933 934 spin_lock_irqsave(&cam->dev_lock, flags); 935 start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers); 936 list_add(&mvb->queue, &cam->buffers); 937 if (cam->state == S_STREAMING && test_bit(CF_SG_RESTART, &cam->flags)) 938 mcam_sg_restart(cam); 939 spin_unlock_irqrestore(&cam->dev_lock, flags); 940 if (start) 941 mcam_read_setup(cam); 942} 943 944 945/* 946 * vb2 uses these to release the mutex when waiting in dqbuf. I'm 947 * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs 948 * to be called with the mutex held), but better safe than sorry. 949 */ 950static void mcam_vb_wait_prepare(struct vb2_queue *vq) 951{ 952 struct mcam_camera *cam = vb2_get_drv_priv(vq); 953 954 mutex_unlock(&cam->s_mutex); 955} 956 957static void mcam_vb_wait_finish(struct vb2_queue *vq) 958{ 959 struct mcam_camera *cam = vb2_get_drv_priv(vq); 960 961 mutex_lock(&cam->s_mutex); 962} 963 964/* 965 * These need to be called with the mutex held from vb2 966 */ 967static int mcam_vb_start_streaming(struct vb2_queue *vq, unsigned int count) 968{ 969 struct mcam_camera *cam = vb2_get_drv_priv(vq); 970 971 if (cam->state != S_IDLE) { 972 INIT_LIST_HEAD(&cam->buffers); 973 return -EINVAL; 974 } 975 cam->sequence = 0; 976 /* 977 * Videobuf2 sneakily hoards all the buffers and won't 978 * give them to us until *after* streaming starts. But 979 * we can't actually start streaming until we have a 980 * destination. So go into a wait state and hope they 981 * give us buffers soon. 982 */ 983 if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) { 984 cam->state = S_BUFWAIT; 985 return 0; 986 } 987 return mcam_read_setup(cam); 988} 989 990static int mcam_vb_stop_streaming(struct vb2_queue *vq) 991{ 992 struct mcam_camera *cam = vb2_get_drv_priv(vq); 993 unsigned long flags; 994 995 if (cam->state == S_BUFWAIT) { 996 /* They never gave us buffers */ 997 cam->state = S_IDLE; 998 return 0; 999 } 1000 if (cam->state != S_STREAMING) 1001 return -EINVAL; 1002 mcam_ctlr_stop_dma(cam); 1003 /* 1004 * VB2 reclaims the buffers, so we need to forget 1005 * about them. 1006 */ 1007 spin_lock_irqsave(&cam->dev_lock, flags); 1008 INIT_LIST_HEAD(&cam->buffers); 1009 spin_unlock_irqrestore(&cam->dev_lock, flags); 1010 return 0; 1011} 1012 1013 1014static const struct vb2_ops mcam_vb2_ops = { 1015 .queue_setup = mcam_vb_queue_setup, 1016 .buf_queue = mcam_vb_buf_queue, 1017 .start_streaming = mcam_vb_start_streaming, 1018 .stop_streaming = mcam_vb_stop_streaming, 1019 .wait_prepare = mcam_vb_wait_prepare, 1020 .wait_finish = mcam_vb_wait_finish, 1021}; 1022 1023 1024#ifdef MCAM_MODE_DMA_SG 1025/* 1026 * Scatter/gather mode uses all of the above functions plus a 1027 * few extras to deal with DMA mapping. 1028 */ 1029static int mcam_vb_sg_buf_init(struct vb2_buffer *vb) 1030{ 1031 struct mcam_vb_buffer *mvb = vb_to_mvb(vb); 1032 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); 1033 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1; 1034 1035 mvb->dma_desc = dma_alloc_coherent(cam->dev, 1036 ndesc * sizeof(struct mcam_dma_desc), 1037 &mvb->dma_desc_pa, GFP_KERNEL); 1038 if (mvb->dma_desc == NULL) { 1039 cam_err(cam, "Unable to get DMA descriptor array\n"); 1040 return -ENOMEM; 1041 } 1042 return 0; 1043} 1044 1045static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb) 1046{ 1047 struct mcam_vb_buffer *mvb = vb_to_mvb(vb); 1048 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); 1049 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0); 1050 struct mcam_dma_desc *desc = mvb->dma_desc; 1051 struct scatterlist *sg; 1052 int i; 1053 1054 mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages, 1055 DMA_FROM_DEVICE); 1056 if (mvb->dma_desc_nent <= 0) 1057 return -EIO; /* Not sure what's right here */ 1058 for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) { 1059 desc->dma_addr = sg_dma_address(sg); 1060 desc->segment_len = sg_dma_len(sg); 1061 desc++; 1062 } 1063 return 0; 1064} 1065 1066static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb) 1067{ 1068 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); 1069 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0); 1070 1071 dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE); 1072 return 0; 1073} 1074 1075static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb) 1076{ 1077 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); 1078 struct mcam_vb_buffer *mvb = vb_to_mvb(vb); 1079 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1; 1080 1081 dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc), 1082 mvb->dma_desc, mvb->dma_desc_pa); 1083} 1084 1085 1086static const struct vb2_ops mcam_vb2_sg_ops = { 1087 .queue_setup = mcam_vb_queue_setup, 1088 .buf_init = mcam_vb_sg_buf_init, 1089 .buf_prepare = mcam_vb_sg_buf_prepare, 1090 .buf_queue = mcam_vb_buf_queue, 1091 .buf_finish = mcam_vb_sg_buf_finish, 1092 .buf_cleanup = mcam_vb_sg_buf_cleanup, 1093 .start_streaming = mcam_vb_start_streaming, 1094 .stop_streaming = mcam_vb_stop_streaming, 1095 .wait_prepare = mcam_vb_wait_prepare, 1096 .wait_finish = mcam_vb_wait_finish, 1097}; 1098 1099#endif /* MCAM_MODE_DMA_SG */ 1100 1101static int mcam_setup_vb2(struct mcam_camera *cam) 1102{ 1103 struct vb2_queue *vq = &cam->vb_queue; 1104 1105 memset(vq, 0, sizeof(*vq)); 1106 vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1107 vq->drv_priv = cam; 1108 INIT_LIST_HEAD(&cam->buffers); 1109 switch (cam->buffer_mode) { 1110 case B_DMA_contig: 1111#ifdef MCAM_MODE_DMA_CONTIG 1112 vq->ops = &mcam_vb2_ops; 1113 vq->mem_ops = &vb2_dma_contig_memops; 1114 cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev); 1115 vq->io_modes = VB2_MMAP | VB2_USERPTR; 1116 cam->dma_setup = mcam_ctlr_dma_contig; 1117 cam->frame_complete = mcam_dma_contig_done; 1118#endif 1119 break; 1120 case B_DMA_sg: 1121#ifdef MCAM_MODE_DMA_SG 1122 vq->ops = &mcam_vb2_sg_ops; 1123 vq->mem_ops = &vb2_dma_sg_memops; 1124 vq->io_modes = VB2_MMAP | VB2_USERPTR; 1125 cam->dma_setup = mcam_ctlr_dma_sg; 1126 cam->frame_complete = mcam_dma_sg_done; 1127#endif 1128 break; 1129 case B_vmalloc: 1130#ifdef MCAM_MODE_VMALLOC 1131 tasklet_init(&cam->s_tasklet, mcam_frame_tasklet, 1132 (unsigned long) cam); 1133 vq->ops = &mcam_vb2_ops; 1134 vq->mem_ops = &vb2_vmalloc_memops; 1135 vq->buf_struct_size = sizeof(struct mcam_vb_buffer); 1136 vq->io_modes = VB2_MMAP; 1137 cam->dma_setup = mcam_ctlr_dma_vmalloc; 1138 cam->frame_complete = mcam_vmalloc_done; 1139#endif 1140 break; 1141 } 1142 return vb2_queue_init(vq); 1143} 1144 1145static void mcam_cleanup_vb2(struct mcam_camera *cam) 1146{ 1147 vb2_queue_release(&cam->vb_queue); 1148#ifdef MCAM_MODE_DMA_CONTIG 1149 if (cam->buffer_mode == B_DMA_contig) 1150 vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx); 1151#endif 1152} 1153 1154 1155/* ---------------------------------------------------------------------- */ 1156/* 1157 * The long list of V4L2 ioctl() operations. 1158 */ 1159 1160static int mcam_vidioc_streamon(struct file *filp, void *priv, 1161 enum v4l2_buf_type type) 1162{ 1163 struct mcam_camera *cam = filp->private_data; 1164 int ret; 1165 1166 mutex_lock(&cam->s_mutex); 1167 ret = vb2_streamon(&cam->vb_queue, type); 1168 mutex_unlock(&cam->s_mutex); 1169 return ret; 1170} 1171 1172 1173static int mcam_vidioc_streamoff(struct file *filp, void *priv, 1174 enum v4l2_buf_type type) 1175{ 1176 struct mcam_camera *cam = filp->private_data; 1177 int ret; 1178 1179 mutex_lock(&cam->s_mutex); 1180 ret = vb2_streamoff(&cam->vb_queue, type); 1181 mutex_unlock(&cam->s_mutex); 1182 return ret; 1183} 1184 1185 1186static int mcam_vidioc_reqbufs(struct file *filp, void *priv, 1187 struct v4l2_requestbuffers *req) 1188{ 1189 struct mcam_camera *cam = filp->private_data; 1190 int ret; 1191 1192 mutex_lock(&cam->s_mutex); 1193 ret = vb2_reqbufs(&cam->vb_queue, req); 1194 mutex_unlock(&cam->s_mutex); 1195 return ret; 1196} 1197 1198 1199static int mcam_vidioc_querybuf(struct file *filp, void *priv, 1200 struct v4l2_buffer *buf) 1201{ 1202 struct mcam_camera *cam = filp->private_data; 1203 int ret; 1204 1205 mutex_lock(&cam->s_mutex); 1206 ret = vb2_querybuf(&cam->vb_queue, buf); 1207 mutex_unlock(&cam->s_mutex); 1208 return ret; 1209} 1210 1211static int mcam_vidioc_qbuf(struct file *filp, void *priv, 1212 struct v4l2_buffer *buf) 1213{ 1214 struct mcam_camera *cam = filp->private_data; 1215 int ret; 1216 1217 mutex_lock(&cam->s_mutex); 1218 ret = vb2_qbuf(&cam->vb_queue, buf); 1219 mutex_unlock(&cam->s_mutex); 1220 return ret; 1221} 1222 1223static int mcam_vidioc_dqbuf(struct file *filp, void *priv, 1224 struct v4l2_buffer *buf) 1225{ 1226 struct mcam_camera *cam = filp->private_data; 1227 int ret; 1228 1229 mutex_lock(&cam->s_mutex); 1230 ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK); 1231 mutex_unlock(&cam->s_mutex); 1232 return ret; 1233} 1234 1235 1236 1237static int mcam_vidioc_queryctrl(struct file *filp, void *priv, 1238 struct v4l2_queryctrl *qc) 1239{ 1240 struct mcam_camera *cam = priv; 1241 int ret; 1242 1243 mutex_lock(&cam->s_mutex); 1244 ret = sensor_call(cam, core, queryctrl, qc); 1245 mutex_unlock(&cam->s_mutex); 1246 return ret; 1247} 1248 1249 1250static int mcam_vidioc_g_ctrl(struct file *filp, void *priv, 1251 struct v4l2_control *ctrl) 1252{ 1253 struct mcam_camera *cam = priv; 1254 int ret; 1255 1256 mutex_lock(&cam->s_mutex); 1257 ret = sensor_call(cam, core, g_ctrl, ctrl); 1258 mutex_unlock(&cam->s_mutex); 1259 return ret; 1260} 1261 1262 1263static int mcam_vidioc_s_ctrl(struct file *filp, void *priv, 1264 struct v4l2_control *ctrl) 1265{ 1266 struct mcam_camera *cam = priv; 1267 int ret; 1268 1269 mutex_lock(&cam->s_mutex); 1270 ret = sensor_call(cam, core, s_ctrl, ctrl); 1271 mutex_unlock(&cam->s_mutex); 1272 return ret; 1273} 1274 1275 1276static int mcam_vidioc_querycap(struct file *file, void *priv, 1277 struct v4l2_capability *cap) 1278{ 1279 strcpy(cap->driver, "marvell_ccic"); 1280 strcpy(cap->card, "marvell_ccic"); 1281 cap->version = 1; 1282 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | 1283 V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; 1284 return 0; 1285} 1286 1287 1288static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp, 1289 void *priv, struct v4l2_fmtdesc *fmt) 1290{ 1291 if (fmt->index >= N_MCAM_FMTS) 1292 return -EINVAL; 1293 strlcpy(fmt->description, mcam_formats[fmt->index].desc, 1294 sizeof(fmt->description)); 1295 fmt->pixelformat = mcam_formats[fmt->index].pixelformat; 1296 return 0; 1297} 1298 1299static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv, 1300 struct v4l2_format *fmt) 1301{ 1302 struct mcam_camera *cam = priv; 1303 struct mcam_format_struct *f; 1304 struct v4l2_pix_format *pix = &fmt->fmt.pix; 1305 struct v4l2_mbus_framefmt mbus_fmt; 1306 int ret; 1307 1308 f = mcam_find_format(pix->pixelformat); 1309 pix->pixelformat = f->pixelformat; 1310 v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code); 1311 mutex_lock(&cam->s_mutex); 1312 ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt); 1313 mutex_unlock(&cam->s_mutex); 1314 v4l2_fill_pix_format(pix, &mbus_fmt); 1315 pix->bytesperline = pix->width * f->bpp; 1316 pix->sizeimage = pix->height * pix->bytesperline; 1317 return ret; 1318} 1319 1320static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv, 1321 struct v4l2_format *fmt) 1322{ 1323 struct mcam_camera *cam = priv; 1324 struct mcam_format_struct *f; 1325 int ret; 1326 1327 /* 1328 * Can't do anything if the device is not idle 1329 * Also can't if there are streaming buffers in place. 1330 */ 1331 if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0) 1332 return -EBUSY; 1333 1334 f = mcam_find_format(fmt->fmt.pix.pixelformat); 1335 1336 /* 1337 * See if the formatting works in principle. 1338 */ 1339 ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt); 1340 if (ret) 1341 return ret; 1342 /* 1343 * Now we start to change things for real, so let's do it 1344 * under lock. 1345 */ 1346 mutex_lock(&cam->s_mutex); 1347 cam->pix_format = fmt->fmt.pix; 1348 cam->mbus_code = f->mbus_code; 1349 1350 /* 1351 * Make sure we have appropriate DMA buffers. 1352 */ 1353 if (cam->buffer_mode == B_vmalloc) { 1354 ret = mcam_check_dma_buffers(cam); 1355 if (ret) 1356 goto out; 1357 } 1358 mcam_set_config_needed(cam, 1); 1359 ret = 0; 1360out: 1361 mutex_unlock(&cam->s_mutex); 1362 return ret; 1363} 1364 1365/* 1366 * Return our stored notion of how the camera is/should be configured. 1367 * The V4l2 spec wants us to be smarter, and actually get this from 1368 * the camera (and not mess with it at open time). Someday. 1369 */ 1370static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv, 1371 struct v4l2_format *f) 1372{ 1373 struct mcam_camera *cam = priv; 1374 1375 f->fmt.pix = cam->pix_format; 1376 return 0; 1377} 1378 1379/* 1380 * We only have one input - the sensor - so minimize the nonsense here. 1381 */ 1382static int mcam_vidioc_enum_input(struct file *filp, void *priv, 1383 struct v4l2_input *input) 1384{ 1385 if (input->index != 0) 1386 return -EINVAL; 1387 1388 input->type = V4L2_INPUT_TYPE_CAMERA; 1389 input->std = V4L2_STD_ALL; /* Not sure what should go here */ 1390 strcpy(input->name, "Camera"); 1391 return 0; 1392} 1393 1394static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i) 1395{ 1396 *i = 0; 1397 return 0; 1398} 1399 1400static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i) 1401{ 1402 if (i != 0) 1403 return -EINVAL; 1404 return 0; 1405} 1406 1407/* from vivi.c */ 1408static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a) 1409{ 1410 return 0; 1411} 1412 1413/* 1414 * G/S_PARM. Most of this is done by the sensor, but we are 1415 * the level which controls the number of read buffers. 1416 */ 1417static int mcam_vidioc_g_parm(struct file *filp, void *priv, 1418 struct v4l2_streamparm *parms) 1419{ 1420 struct mcam_camera *cam = priv; 1421 int ret; 1422 1423 mutex_lock(&cam->s_mutex); 1424 ret = sensor_call(cam, video, g_parm, parms); 1425 mutex_unlock(&cam->s_mutex); 1426 parms->parm.capture.readbuffers = n_dma_bufs; 1427 return ret; 1428} 1429 1430static int mcam_vidioc_s_parm(struct file *filp, void *priv, 1431 struct v4l2_streamparm *parms) 1432{ 1433 struct mcam_camera *cam = priv; 1434 int ret; 1435 1436 mutex_lock(&cam->s_mutex); 1437 ret = sensor_call(cam, video, s_parm, parms); 1438 mutex_unlock(&cam->s_mutex); 1439 parms->parm.capture.readbuffers = n_dma_bufs; 1440 return ret; 1441} 1442 1443static int mcam_vidioc_g_chip_ident(struct file *file, void *priv, 1444 struct v4l2_dbg_chip_ident *chip) 1445{ 1446 struct mcam_camera *cam = priv; 1447 1448 chip->ident = V4L2_IDENT_NONE; 1449 chip->revision = 0; 1450 if (v4l2_chip_match_host(&chip->match)) { 1451 chip->ident = cam->chip_id; 1452 return 0; 1453 } 1454 return sensor_call(cam, core, g_chip_ident, chip); 1455} 1456 1457static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv, 1458 struct v4l2_frmsizeenum *sizes) 1459{ 1460 struct mcam_camera *cam = priv; 1461 int ret; 1462 1463 mutex_lock(&cam->s_mutex); 1464 ret = sensor_call(cam, video, enum_framesizes, sizes); 1465 mutex_unlock(&cam->s_mutex); 1466 return ret; 1467} 1468 1469static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv, 1470 struct v4l2_frmivalenum *interval) 1471{ 1472 struct mcam_camera *cam = priv; 1473 int ret; 1474 1475 mutex_lock(&cam->s_mutex); 1476 ret = sensor_call(cam, video, enum_frameintervals, interval); 1477 mutex_unlock(&cam->s_mutex); 1478 return ret; 1479} 1480 1481#ifdef CONFIG_VIDEO_ADV_DEBUG 1482static int mcam_vidioc_g_register(struct file *file, void *priv, 1483 struct v4l2_dbg_register *reg) 1484{ 1485 struct mcam_camera *cam = priv; 1486 1487 if (v4l2_chip_match_host(®->match)) { 1488 reg->val = mcam_reg_read(cam, reg->reg); 1489 reg->size = 4; 1490 return 0; 1491 } 1492 return sensor_call(cam, core, g_register, reg); 1493} 1494 1495static int mcam_vidioc_s_register(struct file *file, void *priv, 1496 struct v4l2_dbg_register *reg) 1497{ 1498 struct mcam_camera *cam = priv; 1499 1500 if (v4l2_chip_match_host(®->match)) { 1501 mcam_reg_write(cam, reg->reg, reg->val); 1502 return 0; 1503 } 1504 return sensor_call(cam, core, s_register, reg); 1505} 1506#endif 1507 1508static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = { 1509 .vidioc_querycap = mcam_vidioc_querycap, 1510 .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap, 1511 .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap, 1512 .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap, 1513 .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap, 1514 .vidioc_enum_input = mcam_vidioc_enum_input, 1515 .vidioc_g_input = mcam_vidioc_g_input, 1516 .vidioc_s_input = mcam_vidioc_s_input, 1517 .vidioc_s_std = mcam_vidioc_s_std, 1518 .vidioc_reqbufs = mcam_vidioc_reqbufs, 1519 .vidioc_querybuf = mcam_vidioc_querybuf, 1520 .vidioc_qbuf = mcam_vidioc_qbuf, 1521 .vidioc_dqbuf = mcam_vidioc_dqbuf, 1522 .vidioc_streamon = mcam_vidioc_streamon, 1523 .vidioc_streamoff = mcam_vidioc_streamoff, 1524 .vidioc_queryctrl = mcam_vidioc_queryctrl, 1525 .vidioc_g_ctrl = mcam_vidioc_g_ctrl, 1526 .vidioc_s_ctrl = mcam_vidioc_s_ctrl, 1527 .vidioc_g_parm = mcam_vidioc_g_parm, 1528 .vidioc_s_parm = mcam_vidioc_s_parm, 1529 .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes, 1530 .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals, 1531 .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident, 1532#ifdef CONFIG_VIDEO_ADV_DEBUG 1533 .vidioc_g_register = mcam_vidioc_g_register, 1534 .vidioc_s_register = mcam_vidioc_s_register, 1535#endif 1536}; 1537 1538/* ---------------------------------------------------------------------- */ 1539/* 1540 * Our various file operations. 1541 */ 1542static int mcam_v4l_open(struct file *filp) 1543{ 1544 struct mcam_camera *cam = video_drvdata(filp); 1545 int ret = 0; 1546 1547 filp->private_data = cam; 1548 1549 frames = singles = delivered = 0; 1550 mutex_lock(&cam->s_mutex); 1551 if (cam->users == 0) { 1552 ret = mcam_setup_vb2(cam); 1553 if (ret) 1554 goto out; 1555 mcam_ctlr_power_up(cam); 1556 __mcam_cam_reset(cam); 1557 mcam_set_config_needed(cam, 1); 1558 } 1559 (cam->users)++; 1560out: 1561 mutex_unlock(&cam->s_mutex); 1562 return ret; 1563} 1564 1565 1566static int mcam_v4l_release(struct file *filp) 1567{ 1568 struct mcam_camera *cam = filp->private_data; 1569 1570 cam_dbg(cam, "Release, %d frames, %d singles, %d delivered\n", frames, 1571 singles, delivered); 1572 mutex_lock(&cam->s_mutex); 1573 (cam->users)--; 1574 if (cam->users == 0) { 1575 mcam_ctlr_stop_dma(cam); 1576 mcam_cleanup_vb2(cam); 1577 mcam_ctlr_power_down(cam); 1578 if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read) 1579 mcam_free_dma_bufs(cam); 1580 } 1581 mutex_unlock(&cam->s_mutex); 1582 return 0; 1583} 1584 1585static ssize_t mcam_v4l_read(struct file *filp, 1586 char __user *buffer, size_t len, loff_t *pos) 1587{ 1588 struct mcam_camera *cam = filp->private_data; 1589 int ret; 1590 1591 mutex_lock(&cam->s_mutex); 1592 ret = vb2_read(&cam->vb_queue, buffer, len, pos, 1593 filp->f_flags & O_NONBLOCK); 1594 mutex_unlock(&cam->s_mutex); 1595 return ret; 1596} 1597 1598 1599 1600static unsigned int mcam_v4l_poll(struct file *filp, 1601 struct poll_table_struct *pt) 1602{ 1603 struct mcam_camera *cam = filp->private_data; 1604 int ret; 1605 1606 mutex_lock(&cam->s_mutex); 1607 ret = vb2_poll(&cam->vb_queue, filp, pt); 1608 mutex_unlock(&cam->s_mutex); 1609 return ret; 1610} 1611 1612 1613static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma) 1614{ 1615 struct mcam_camera *cam = filp->private_data; 1616 int ret; 1617 1618 mutex_lock(&cam->s_mutex); 1619 ret = vb2_mmap(&cam->vb_queue, vma); 1620 mutex_unlock(&cam->s_mutex); 1621 return ret; 1622} 1623 1624 1625 1626static const struct v4l2_file_operations mcam_v4l_fops = { 1627 .owner = THIS_MODULE, 1628 .open = mcam_v4l_open, 1629 .release = mcam_v4l_release, 1630 .read = mcam_v4l_read, 1631 .poll = mcam_v4l_poll, 1632 .mmap = mcam_v4l_mmap, 1633 .unlocked_ioctl = video_ioctl2, 1634}; 1635 1636 1637/* 1638 * This template device holds all of those v4l2 methods; we 1639 * clone it for specific real devices. 1640 */ 1641static struct video_device mcam_v4l_template = { 1642 .name = "mcam", 1643 .tvnorms = V4L2_STD_NTSC_M, 1644 .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */ 1645 1646 .fops = &mcam_v4l_fops, 1647 .ioctl_ops = &mcam_v4l_ioctl_ops, 1648 .release = video_device_release_empty, 1649}; 1650 1651/* ---------------------------------------------------------------------- */ 1652/* 1653 * Interrupt handler stuff 1654 */ 1655static void mcam_frame_complete(struct mcam_camera *cam, int frame) 1656{ 1657 /* 1658 * Basic frame housekeeping. 1659 */ 1660 set_bit(frame, &cam->flags); 1661 clear_bit(CF_DMA_ACTIVE, &cam->flags); 1662 cam->next_buf = frame; 1663 cam->buf_seq[frame] = ++(cam->sequence); 1664 frames++; 1665 /* 1666 * "This should never happen" 1667 */ 1668 if (cam->state != S_STREAMING) 1669 return; 1670 /* 1671 * Process the frame and set up the next one. 1672 */ 1673 cam->frame_complete(cam, frame); 1674} 1675 1676 1677/* 1678 * The interrupt handler; this needs to be called from the 1679 * platform irq handler with the lock held. 1680 */ 1681int mccic_irq(struct mcam_camera *cam, unsigned int irqs) 1682{ 1683 unsigned int frame, handled = 0; 1684 1685 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */ 1686 /* 1687 * Handle any frame completions. There really should 1688 * not be more than one of these, or we have fallen 1689 * far behind. 1690 * 1691 * When running in S/G mode, the frame number lacks any 1692 * real meaning - there's only one descriptor array - but 1693 * the controller still picks a different one to signal 1694 * each time. 1695 */ 1696 for (frame = 0; frame < cam->nbufs; frame++) 1697 if (irqs & (IRQ_EOF0 << frame)) { 1698 mcam_frame_complete(cam, frame); 1699 handled = 1; 1700 if (cam->buffer_mode == B_DMA_sg) 1701 break; 1702 } 1703 /* 1704 * If a frame starts, note that we have DMA active. This 1705 * code assumes that we won't get multiple frame interrupts 1706 * at once; may want to rethink that. 1707 */ 1708 if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) { 1709 set_bit(CF_DMA_ACTIVE, &cam->flags); 1710 handled = 1; 1711 if (cam->buffer_mode == B_DMA_sg) 1712 mcam_ctlr_stop(cam); 1713 } 1714 return handled; 1715} 1716 1717/* ---------------------------------------------------------------------- */ 1718/* 1719 * Registration and such. 1720 */ 1721static struct ov7670_config sensor_cfg = { 1722 /* 1723 * Exclude QCIF mode, because it only captures a tiny portion 1724 * of the sensor FOV 1725 */ 1726 .min_width = 320, 1727 .min_height = 240, 1728}; 1729 1730 1731int mccic_register(struct mcam_camera *cam) 1732{ 1733 struct i2c_board_info ov7670_info = { 1734 .type = "ov7670", 1735 .addr = 0x42 >> 1, 1736 .platform_data = &sensor_cfg, 1737 }; 1738 int ret; 1739 1740 /* 1741 * Validate the requested buffer mode. 1742 */ 1743 if (buffer_mode >= 0) 1744 cam->buffer_mode = buffer_mode; 1745 if (cam->buffer_mode == B_DMA_sg && 1746 cam->chip_id == V4L2_IDENT_CAFE) { 1747 printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O, " 1748 "attempting vmalloc mode instead\n"); 1749 cam->buffer_mode = B_vmalloc; 1750 } 1751 if (!mcam_buffer_mode_supported(cam->buffer_mode)) { 1752 printk(KERN_ERR "marvell-cam: buffer mode %d unsupported\n", 1753 cam->buffer_mode); 1754 return -EINVAL; 1755 } 1756 /* 1757 * Register with V4L 1758 */ 1759 ret = v4l2_device_register(cam->dev, &cam->v4l2_dev); 1760 if (ret) 1761 return ret; 1762 1763 mutex_init(&cam->s_mutex); 1764 cam->state = S_NOTREADY; 1765 mcam_set_config_needed(cam, 1); 1766 cam->pix_format = mcam_def_pix_format; 1767 cam->mbus_code = mcam_def_mbus_code; 1768 INIT_LIST_HEAD(&cam->buffers); 1769 mcam_ctlr_init(cam); 1770 1771 /* 1772 * Try to find the sensor. 1773 */ 1774 sensor_cfg.clock_speed = cam->clock_speed; 1775 sensor_cfg.use_smbus = cam->use_smbus; 1776 cam->sensor_addr = ov7670_info.addr; 1777 cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev, 1778 cam->i2c_adapter, &ov7670_info, NULL); 1779 if (cam->sensor == NULL) { 1780 ret = -ENODEV; 1781 goto out_unregister; 1782 } 1783 1784 ret = mcam_cam_init(cam); 1785 if (ret) 1786 goto out_unregister; 1787 /* 1788 * Get the v4l2 setup done. 1789 */ 1790 mutex_lock(&cam->s_mutex); 1791 cam->vdev = mcam_v4l_template; 1792 cam->vdev.debug = 0; 1793 cam->vdev.v4l2_dev = &cam->v4l2_dev; 1794 ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1); 1795 if (ret) 1796 goto out; 1797 video_set_drvdata(&cam->vdev, cam); 1798 1799 /* 1800 * If so requested, try to get our DMA buffers now. 1801 */ 1802 if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) { 1803 if (mcam_alloc_dma_bufs(cam, 1)) 1804 cam_warn(cam, "Unable to alloc DMA buffers at load" 1805 " will try again later."); 1806 } 1807 1808out: 1809 mutex_unlock(&cam->s_mutex); 1810 return ret; 1811out_unregister: 1812 v4l2_device_unregister(&cam->v4l2_dev); 1813 return ret; 1814} 1815 1816 1817void mccic_shutdown(struct mcam_camera *cam) 1818{ 1819 /* 1820 * If we have no users (and we really, really should have no 1821 * users) the device will already be powered down. Trying to 1822 * take it down again will wedge the machine, which is frowned 1823 * upon. 1824 */ 1825 if (cam->users > 0) { 1826 cam_warn(cam, "Removing a device with users!\n"); 1827 mcam_ctlr_power_down(cam); 1828 } 1829 vb2_queue_release(&cam->vb_queue); 1830 if (cam->buffer_mode == B_vmalloc) 1831 mcam_free_dma_bufs(cam); 1832 video_unregister_device(&cam->vdev); 1833 v4l2_device_unregister(&cam->v4l2_dev); 1834} 1835 1836/* 1837 * Power management 1838 */ 1839#ifdef CONFIG_PM 1840 1841void mccic_suspend(struct mcam_camera *cam) 1842{ 1843 mutex_lock(&cam->s_mutex); 1844 if (cam->users > 0) { 1845 enum mcam_state cstate = cam->state; 1846 1847 mcam_ctlr_stop_dma(cam); 1848 mcam_ctlr_power_down(cam); 1849 cam->state = cstate; 1850 } 1851 mutex_unlock(&cam->s_mutex); 1852} 1853 1854int mccic_resume(struct mcam_camera *cam) 1855{ 1856 int ret = 0; 1857 1858 mutex_lock(&cam->s_mutex); 1859 if (cam->users > 0) { 1860 mcam_ctlr_power_up(cam); 1861 __mcam_cam_reset(cam); 1862 } else { 1863 mcam_ctlr_power_down(cam); 1864 } 1865 mutex_unlock(&cam->s_mutex); 1866 1867 set_bit(CF_CONFIG_NEEDED, &cam->flags); 1868 if (cam->state == S_STREAMING) { 1869 /* 1870 * If there was a buffer in the DMA engine at suspend 1871 * time, put it back on the queue or we'll forget about it. 1872 */ 1873 if (cam->buffer_mode == B_DMA_sg && cam->vb_bufs[0]) 1874 list_add(&cam->vb_bufs[0]->queue, &cam->buffers); 1875 ret = mcam_read_setup(cam); 1876 } 1877 return ret; 1878} 1879#endif /* CONFIG_PM */ 1880