1/* 2 * Driver for SiliconFile NOON010PC30 CIF (1/11") Image Sensor with ISP 3 * 4 * Copyright (C) 2010 - 2011 Samsung Electronics Co., Ltd. 5 * Contact: Sylwester Nawrocki, <s.nawrocki@samsung.com> 6 * 7 * Initial register configuration based on a driver authored by 8 * HeungJun Kim <riverful.kim@samsung.com>. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 */ 15 16#include <linux/delay.h> 17#include <linux/gpio.h> 18#include <linux/i2c.h> 19#include <linux/slab.h> 20#include <linux/regulator/consumer.h> 21#include <media/noon010pc30.h> 22#include <media/v4l2-chip-ident.h> 23#include <linux/videodev2.h> 24#include <linux/module.h> 25#include <media/v4l2-ctrls.h> 26#include <media/v4l2-device.h> 27#include <media/v4l2-mediabus.h> 28#include <media/v4l2-subdev.h> 29 30static int debug; 31module_param(debug, int, 0644); 32MODULE_PARM_DESC(debug, "Enable module debug trace. Set to 1 to enable."); 33 34#define MODULE_NAME "NOON010PC30" 35 36/* 37 * Register offsets within a page 38 * b15..b8 - page id, b7..b0 - register address 39 */ 40#define POWER_CTRL_REG 0x0001 41#define PAGEMODE_REG 0x03 42#define DEVICE_ID_REG 0x0004 43#define NOON010PC30_ID 0x86 44#define VDO_CTL_REG(n) (0x0010 + (n)) 45#define SYNC_CTL_REG 0x0012 46/* Window size and position */ 47#define WIN_ROWH_REG 0x0013 48#define WIN_ROWL_REG 0x0014 49#define WIN_COLH_REG 0x0015 50#define WIN_COLL_REG 0x0016 51#define WIN_HEIGHTH_REG 0x0017 52#define WIN_HEIGHTL_REG 0x0018 53#define WIN_WIDTHH_REG 0x0019 54#define WIN_WIDTHL_REG 0x001A 55#define HBLANKH_REG 0x001B 56#define HBLANKL_REG 0x001C 57#define VSYNCH_REG 0x001D 58#define VSYNCL_REG 0x001E 59/* VSYNC control */ 60#define VS_CTL_REG(n) (0x00A1 + (n)) 61/* page 1 */ 62#define ISP_CTL_REG(n) (0x0110 + (n)) 63#define YOFS_REG 0x0119 64#define DARK_YOFS_REG 0x011A 65#define SAT_CTL_REG 0x0120 66#define BSAT_REG 0x0121 67#define RSAT_REG 0x0122 68/* Color correction */ 69#define CMC_CTL_REG 0x0130 70#define CMC_OFSGH_REG 0x0133 71#define CMC_OFSGL_REG 0x0135 72#define CMC_SIGN_REG 0x0136 73#define CMC_GOFS_REG 0x0137 74#define CMC_COEF_REG(n) (0x0138 + (n)) 75#define CMC_OFS_REG(n) (0x0141 + (n)) 76/* Gamma correction */ 77#define GMA_CTL_REG 0x0160 78#define GMA_COEF_REG(n) (0x0161 + (n)) 79/* Lens Shading */ 80#define LENS_CTRL_REG 0x01D0 81#define LENS_XCEN_REG 0x01D1 82#define LENS_YCEN_REG 0x01D2 83#define LENS_RC_REG 0x01D3 84#define LENS_GC_REG 0x01D4 85#define LENS_BC_REG 0x01D5 86#define L_AGON_REG 0x01D6 87#define L_AGOFF_REG 0x01D7 88/* Page 3 - Auto Exposure */ 89#define AE_CTL_REG(n) (0x0310 + (n)) 90#define AE_CTL9_REG 0x032C 91#define AE_CTL10_REG 0x032D 92#define AE_YLVL_REG 0x031C 93#define AE_YTH_REG(n) (0x031D + (n)) 94#define AE_WGT_REG 0x0326 95#define EXP_TIMEH_REG 0x0333 96#define EXP_TIMEM_REG 0x0334 97#define EXP_TIMEL_REG 0x0335 98#define EXP_MMINH_REG 0x0336 99#define EXP_MMINL_REG 0x0337 100#define EXP_MMAXH_REG 0x0338 101#define EXP_MMAXM_REG 0x0339 102#define EXP_MMAXL_REG 0x033A 103/* Page 4 - Auto White Balance */ 104#define AWB_CTL_REG(n) (0x0410 + (n)) 105#define AWB_ENABE 0x80 106#define AWB_WGHT_REG 0x0419 107#define BGAIN_PAR_REG(n) (0x044F + (n)) 108/* Manual white balance, when AWB_CTL2[0]=1 */ 109#define MWB_RGAIN_REG 0x0466 110#define MWB_BGAIN_REG 0x0467 111 112/* The token to mark an array end */ 113#define REG_TERM 0xFFFF 114 115struct noon010_format { 116 enum v4l2_mbus_pixelcode code; 117 enum v4l2_colorspace colorspace; 118 u16 ispctl1_reg; 119}; 120 121struct noon010_frmsize { 122 u16 width; 123 u16 height; 124 int vid_ctl1; 125}; 126 127static const char * const noon010_supply_name[] = { 128 "vdd_core", "vddio", "vdda" 129}; 130 131#define NOON010_NUM_SUPPLIES ARRAY_SIZE(noon010_supply_name) 132 133struct noon010_info { 134 struct v4l2_subdev sd; 135 struct media_pad pad; 136 struct v4l2_ctrl_handler hdl; 137 struct regulator_bulk_data supply[NOON010_NUM_SUPPLIES]; 138 u32 gpio_nreset; 139 u32 gpio_nstby; 140 141 /* Protects the struct members below */ 142 struct mutex lock; 143 144 const struct noon010_format *curr_fmt; 145 const struct noon010_frmsize *curr_win; 146 unsigned int apply_new_cfg:1; 147 unsigned int streaming:1; 148 unsigned int hflip:1; 149 unsigned int vflip:1; 150 unsigned int power:1; 151 u8 i2c_reg_page; 152}; 153 154struct i2c_regval { 155 u16 addr; 156 u16 val; 157}; 158 159/* Supported resolutions. */ 160static const struct noon010_frmsize noon010_sizes[] = { 161 { 162 .width = 352, 163 .height = 288, 164 .vid_ctl1 = 0, 165 }, { 166 .width = 176, 167 .height = 144, 168 .vid_ctl1 = 0x10, 169 }, { 170 .width = 88, 171 .height = 72, 172 .vid_ctl1 = 0x20, 173 }, 174}; 175 176/* Supported pixel formats. */ 177static const struct noon010_format noon010_formats[] = { 178 { 179 .code = V4L2_MBUS_FMT_YUYV8_2X8, 180 .colorspace = V4L2_COLORSPACE_JPEG, 181 .ispctl1_reg = 0x03, 182 }, { 183 .code = V4L2_MBUS_FMT_YVYU8_2X8, 184 .colorspace = V4L2_COLORSPACE_JPEG, 185 .ispctl1_reg = 0x02, 186 }, { 187 .code = V4L2_MBUS_FMT_VYUY8_2X8, 188 .colorspace = V4L2_COLORSPACE_JPEG, 189 .ispctl1_reg = 0, 190 }, { 191 .code = V4L2_MBUS_FMT_UYVY8_2X8, 192 .colorspace = V4L2_COLORSPACE_JPEG, 193 .ispctl1_reg = 0x01, 194 }, { 195 .code = V4L2_MBUS_FMT_RGB565_2X8_BE, 196 .colorspace = V4L2_COLORSPACE_JPEG, 197 .ispctl1_reg = 0x40, 198 }, 199}; 200 201static const struct i2c_regval noon010_base_regs[] = { 202 { WIN_COLL_REG, 0x06 }, { HBLANKL_REG, 0x7C }, 203 /* Color corection and saturation */ 204 { ISP_CTL_REG(0), 0x30 }, { ISP_CTL_REG(2), 0x30 }, 205 { YOFS_REG, 0x80 }, { DARK_YOFS_REG, 0x04 }, 206 { SAT_CTL_REG, 0x1F }, { BSAT_REG, 0x90 }, 207 { CMC_CTL_REG, 0x0F }, { CMC_OFSGH_REG, 0x3C }, 208 { CMC_OFSGL_REG, 0x2C }, { CMC_SIGN_REG, 0x3F }, 209 { CMC_COEF_REG(0), 0x79 }, { CMC_OFS_REG(0), 0x00 }, 210 { CMC_COEF_REG(1), 0x39 }, { CMC_OFS_REG(1), 0x00 }, 211 { CMC_COEF_REG(2), 0x00 }, { CMC_OFS_REG(2), 0x00 }, 212 { CMC_COEF_REG(3), 0x11 }, { CMC_OFS_REG(3), 0x8B }, 213 { CMC_COEF_REG(4), 0x65 }, { CMC_OFS_REG(4), 0x07 }, 214 { CMC_COEF_REG(5), 0x14 }, { CMC_OFS_REG(5), 0x04 }, 215 { CMC_COEF_REG(6), 0x01 }, { CMC_OFS_REG(6), 0x9C }, 216 { CMC_COEF_REG(7), 0x33 }, { CMC_OFS_REG(7), 0x89 }, 217 { CMC_COEF_REG(8), 0x74 }, { CMC_OFS_REG(8), 0x25 }, 218 /* Automatic white balance */ 219 { AWB_CTL_REG(0), 0x78 }, { AWB_CTL_REG(1), 0x2E }, 220 { AWB_CTL_REG(2), 0x20 }, { AWB_CTL_REG(3), 0x85 }, 221 /* Auto exposure */ 222 { AE_CTL_REG(0), 0xDC }, { AE_CTL_REG(1), 0x81 }, 223 { AE_CTL_REG(2), 0x30 }, { AE_CTL_REG(3), 0xA5 }, 224 { AE_CTL_REG(4), 0x40 }, { AE_CTL_REG(5), 0x51 }, 225 { AE_CTL_REG(6), 0x33 }, { AE_CTL_REG(7), 0x7E }, 226 { AE_CTL9_REG, 0x00 }, { AE_CTL10_REG, 0x02 }, 227 { AE_YLVL_REG, 0x44 }, { AE_YTH_REG(0), 0x34 }, 228 { AE_YTH_REG(1), 0x30 }, { AE_WGT_REG, 0xD5 }, 229 /* Lens shading compensation */ 230 { LENS_CTRL_REG, 0x01 }, { LENS_XCEN_REG, 0x80 }, 231 { LENS_YCEN_REG, 0x70 }, { LENS_RC_REG, 0x53 }, 232 { LENS_GC_REG, 0x40 }, { LENS_BC_REG, 0x3E }, 233 { REG_TERM, 0 }, 234}; 235 236static inline struct noon010_info *to_noon010(struct v4l2_subdev *sd) 237{ 238 return container_of(sd, struct noon010_info, sd); 239} 240 241static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) 242{ 243 return &container_of(ctrl->handler, struct noon010_info, hdl)->sd; 244} 245 246static inline int set_i2c_page(struct noon010_info *info, 247 struct i2c_client *client, unsigned int reg) 248{ 249 u32 page = reg >> 8 & 0xFF; 250 int ret = 0; 251 252 if (info->i2c_reg_page != page && (reg & 0xFF) != 0x03) { 253 ret = i2c_smbus_write_byte_data(client, PAGEMODE_REG, page); 254 if (!ret) 255 info->i2c_reg_page = page; 256 } 257 return ret; 258} 259 260static int cam_i2c_read(struct v4l2_subdev *sd, u32 reg_addr) 261{ 262 struct i2c_client *client = v4l2_get_subdevdata(sd); 263 struct noon010_info *info = to_noon010(sd); 264 int ret = set_i2c_page(info, client, reg_addr); 265 266 if (ret) 267 return ret; 268 return i2c_smbus_read_byte_data(client, reg_addr & 0xFF); 269} 270 271static int cam_i2c_write(struct v4l2_subdev *sd, u32 reg_addr, u32 val) 272{ 273 struct i2c_client *client = v4l2_get_subdevdata(sd); 274 struct noon010_info *info = to_noon010(sd); 275 int ret = set_i2c_page(info, client, reg_addr); 276 277 if (ret) 278 return ret; 279 return i2c_smbus_write_byte_data(client, reg_addr & 0xFF, val); 280} 281 282static inline int noon010_bulk_write_reg(struct v4l2_subdev *sd, 283 const struct i2c_regval *msg) 284{ 285 while (msg->addr != REG_TERM) { 286 int ret = cam_i2c_write(sd, msg->addr, msg->val); 287 288 if (ret) 289 return ret; 290 msg++; 291 } 292 return 0; 293} 294 295/* Device reset and sleep mode control */ 296static int noon010_power_ctrl(struct v4l2_subdev *sd, bool reset, bool sleep) 297{ 298 struct noon010_info *info = to_noon010(sd); 299 u8 reg = sleep ? 0xF1 : 0xF0; 300 int ret = 0; 301 302 if (reset) { 303 ret = cam_i2c_write(sd, POWER_CTRL_REG, reg | 0x02); 304 udelay(20); 305 } 306 if (!ret) { 307 ret = cam_i2c_write(sd, POWER_CTRL_REG, reg); 308 if (reset && !ret) 309 info->i2c_reg_page = -1; 310 } 311 return ret; 312} 313 314/* Automatic white balance control */ 315static int noon010_enable_autowhitebalance(struct v4l2_subdev *sd, int on) 316{ 317 int ret; 318 319 ret = cam_i2c_write(sd, AWB_CTL_REG(1), on ? 0x2E : 0x2F); 320 if (!ret) 321 ret = cam_i2c_write(sd, AWB_CTL_REG(0), on ? 0xFB : 0x7B); 322 return ret; 323} 324 325/* Called with struct noon010_info.lock mutex held */ 326static int noon010_set_flip(struct v4l2_subdev *sd, int hflip, int vflip) 327{ 328 struct noon010_info *info = to_noon010(sd); 329 int reg, ret; 330 331 reg = cam_i2c_read(sd, VDO_CTL_REG(1)); 332 if (reg < 0) 333 return reg; 334 335 reg &= 0x7C; 336 if (hflip) 337 reg |= 0x01; 338 if (vflip) 339 reg |= 0x02; 340 341 ret = cam_i2c_write(sd, VDO_CTL_REG(1), reg | 0x80); 342 if (!ret) { 343 info->hflip = hflip; 344 info->vflip = vflip; 345 } 346 return ret; 347} 348 349/* Configure resolution and color format */ 350static int noon010_set_params(struct v4l2_subdev *sd) 351{ 352 struct noon010_info *info = to_noon010(sd); 353 354 int ret = cam_i2c_write(sd, VDO_CTL_REG(0), 355 info->curr_win->vid_ctl1); 356 if (ret) 357 return ret; 358 return cam_i2c_write(sd, ISP_CTL_REG(0), 359 info->curr_fmt->ispctl1_reg); 360} 361 362/* Find nearest matching image pixel size. */ 363static int noon010_try_frame_size(struct v4l2_mbus_framefmt *mf, 364 const struct noon010_frmsize **size) 365{ 366 unsigned int min_err = ~0; 367 int i = ARRAY_SIZE(noon010_sizes); 368 const struct noon010_frmsize *fsize = &noon010_sizes[0], 369 *match = NULL; 370 371 while (i--) { 372 int err = abs(fsize->width - mf->width) 373 + abs(fsize->height - mf->height); 374 375 if (err < min_err) { 376 min_err = err; 377 match = fsize; 378 } 379 fsize++; 380 } 381 if (match) { 382 mf->width = match->width; 383 mf->height = match->height; 384 if (size) 385 *size = match; 386 return 0; 387 } 388 return -EINVAL; 389} 390 391/* Called with info.lock mutex held */ 392static int power_enable(struct noon010_info *info) 393{ 394 int ret; 395 396 if (info->power) { 397 v4l2_info(&info->sd, "%s: sensor is already on\n", __func__); 398 return 0; 399 } 400 401 if (gpio_is_valid(info->gpio_nstby)) 402 gpio_set_value(info->gpio_nstby, 0); 403 404 if (gpio_is_valid(info->gpio_nreset)) 405 gpio_set_value(info->gpio_nreset, 0); 406 407 ret = regulator_bulk_enable(NOON010_NUM_SUPPLIES, info->supply); 408 if (ret) 409 return ret; 410 411 if (gpio_is_valid(info->gpio_nreset)) { 412 msleep(50); 413 gpio_set_value(info->gpio_nreset, 1); 414 } 415 if (gpio_is_valid(info->gpio_nstby)) { 416 udelay(1000); 417 gpio_set_value(info->gpio_nstby, 1); 418 } 419 if (gpio_is_valid(info->gpio_nreset)) { 420 udelay(1000); 421 gpio_set_value(info->gpio_nreset, 0); 422 msleep(100); 423 gpio_set_value(info->gpio_nreset, 1); 424 msleep(20); 425 } 426 info->power = 1; 427 428 v4l2_dbg(1, debug, &info->sd, "%s: sensor is on\n", __func__); 429 return 0; 430} 431 432/* Called with info.lock mutex held */ 433static int power_disable(struct noon010_info *info) 434{ 435 int ret; 436 437 if (!info->power) { 438 v4l2_info(&info->sd, "%s: sensor is already off\n", __func__); 439 return 0; 440 } 441 442 ret = regulator_bulk_disable(NOON010_NUM_SUPPLIES, info->supply); 443 if (ret) 444 return ret; 445 446 if (gpio_is_valid(info->gpio_nstby)) 447 gpio_set_value(info->gpio_nstby, 0); 448 449 if (gpio_is_valid(info->gpio_nreset)) 450 gpio_set_value(info->gpio_nreset, 0); 451 452 info->power = 0; 453 454 v4l2_dbg(1, debug, &info->sd, "%s: sensor is off\n", __func__); 455 456 return 0; 457} 458 459static int noon010_s_ctrl(struct v4l2_ctrl *ctrl) 460{ 461 struct v4l2_subdev *sd = to_sd(ctrl); 462 struct noon010_info *info = to_noon010(sd); 463 int ret = 0; 464 465 v4l2_dbg(1, debug, sd, "%s: ctrl_id: %d, value: %d\n", 466 __func__, ctrl->id, ctrl->val); 467 468 mutex_lock(&info->lock); 469 /* 470 * If the device is not powered up by the host driver do 471 * not apply any controls to H/W at this time. Instead 472 * the controls will be restored right after power-up. 473 */ 474 if (!info->power) 475 goto unlock; 476 477 switch (ctrl->id) { 478 case V4L2_CID_AUTO_WHITE_BALANCE: 479 ret = noon010_enable_autowhitebalance(sd, ctrl->val); 480 break; 481 case V4L2_CID_BLUE_BALANCE: 482 ret = cam_i2c_write(sd, MWB_BGAIN_REG, ctrl->val); 483 break; 484 case V4L2_CID_RED_BALANCE: 485 ret = cam_i2c_write(sd, MWB_RGAIN_REG, ctrl->val); 486 break; 487 default: 488 ret = -EINVAL; 489 } 490unlock: 491 mutex_unlock(&info->lock); 492 return ret; 493} 494 495static int noon010_enum_mbus_code(struct v4l2_subdev *sd, 496 struct v4l2_subdev_fh *fh, 497 struct v4l2_subdev_mbus_code_enum *code) 498{ 499 if (code->index >= ARRAY_SIZE(noon010_formats)) 500 return -EINVAL; 501 502 code->code = noon010_formats[code->index].code; 503 return 0; 504} 505 506static int noon010_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, 507 struct v4l2_subdev_format *fmt) 508{ 509 struct noon010_info *info = to_noon010(sd); 510 struct v4l2_mbus_framefmt *mf; 511 512 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 513 if (fh) { 514 mf = v4l2_subdev_get_try_format(fh, 0); 515 fmt->format = *mf; 516 } 517 return 0; 518 } 519 mf = &fmt->format; 520 521 mutex_lock(&info->lock); 522 mf->width = info->curr_win->width; 523 mf->height = info->curr_win->height; 524 mf->code = info->curr_fmt->code; 525 mf->colorspace = info->curr_fmt->colorspace; 526 mf->field = V4L2_FIELD_NONE; 527 528 mutex_unlock(&info->lock); 529 return 0; 530} 531 532/* Return nearest media bus frame format. */ 533static const struct noon010_format *noon010_try_fmt(struct v4l2_subdev *sd, 534 struct v4l2_mbus_framefmt *mf) 535{ 536 int i = ARRAY_SIZE(noon010_formats); 537 538 while (--i) 539 if (mf->code == noon010_formats[i].code) 540 break; 541 mf->code = noon010_formats[i].code; 542 543 return &noon010_formats[i]; 544} 545 546static int noon010_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, 547 struct v4l2_subdev_format *fmt) 548{ 549 struct noon010_info *info = to_noon010(sd); 550 const struct noon010_frmsize *size = NULL; 551 const struct noon010_format *nf; 552 struct v4l2_mbus_framefmt *mf; 553 int ret = 0; 554 555 nf = noon010_try_fmt(sd, &fmt->format); 556 noon010_try_frame_size(&fmt->format, &size); 557 fmt->format.colorspace = V4L2_COLORSPACE_JPEG; 558 559 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 560 if (fh) { 561 mf = v4l2_subdev_get_try_format(fh, 0); 562 *mf = fmt->format; 563 } 564 return 0; 565 } 566 mutex_lock(&info->lock); 567 if (!info->streaming) { 568 info->apply_new_cfg = 1; 569 info->curr_fmt = nf; 570 info->curr_win = size; 571 } else { 572 ret = -EBUSY; 573 } 574 mutex_unlock(&info->lock); 575 return ret; 576} 577 578/* Called with struct noon010_info.lock mutex held */ 579static int noon010_base_config(struct v4l2_subdev *sd) 580{ 581 int ret = noon010_bulk_write_reg(sd, noon010_base_regs); 582 if (!ret) 583 ret = noon010_set_params(sd); 584 if (!ret) 585 ret = noon010_set_flip(sd, 1, 0); 586 587 return ret; 588} 589 590static int noon010_s_power(struct v4l2_subdev *sd, int on) 591{ 592 struct noon010_info *info = to_noon010(sd); 593 int ret; 594 595 mutex_lock(&info->lock); 596 if (on) { 597 ret = power_enable(info); 598 if (!ret) 599 ret = noon010_base_config(sd); 600 } else { 601 noon010_power_ctrl(sd, false, true); 602 ret = power_disable(info); 603 } 604 mutex_unlock(&info->lock); 605 606 /* Restore the controls state */ 607 if (!ret && on) 608 ret = v4l2_ctrl_handler_setup(&info->hdl); 609 610 return ret; 611} 612 613static int noon010_s_stream(struct v4l2_subdev *sd, int on) 614{ 615 struct noon010_info *info = to_noon010(sd); 616 int ret = 0; 617 618 mutex_lock(&info->lock); 619 if (!info->streaming != !on) { 620 ret = noon010_power_ctrl(sd, false, !on); 621 if (!ret) 622 info->streaming = on; 623 } 624 if (!ret && on && info->apply_new_cfg) { 625 ret = noon010_set_params(sd); 626 if (!ret) 627 info->apply_new_cfg = 0; 628 } 629 mutex_unlock(&info->lock); 630 return ret; 631} 632 633static int noon010_log_status(struct v4l2_subdev *sd) 634{ 635 struct noon010_info *info = to_noon010(sd); 636 637 v4l2_ctrl_handler_log_status(&info->hdl, sd->name); 638 return 0; 639} 640 641static int noon010_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 642{ 643 struct v4l2_mbus_framefmt *mf = v4l2_subdev_get_try_format(fh, 0); 644 645 mf->width = noon010_sizes[0].width; 646 mf->height = noon010_sizes[0].height; 647 mf->code = noon010_formats[0].code; 648 mf->colorspace = V4L2_COLORSPACE_JPEG; 649 mf->field = V4L2_FIELD_NONE; 650 return 0; 651} 652 653static const struct v4l2_subdev_internal_ops noon010_subdev_internal_ops = { 654 .open = noon010_open, 655}; 656 657static const struct v4l2_ctrl_ops noon010_ctrl_ops = { 658 .s_ctrl = noon010_s_ctrl, 659}; 660 661static const struct v4l2_subdev_core_ops noon010_core_ops = { 662 .s_power = noon010_s_power, 663 .g_ctrl = v4l2_subdev_g_ctrl, 664 .s_ctrl = v4l2_subdev_s_ctrl, 665 .queryctrl = v4l2_subdev_queryctrl, 666 .querymenu = v4l2_subdev_querymenu, 667 .g_ext_ctrls = v4l2_subdev_g_ext_ctrls, 668 .try_ext_ctrls = v4l2_subdev_try_ext_ctrls, 669 .s_ext_ctrls = v4l2_subdev_s_ext_ctrls, 670 .log_status = noon010_log_status, 671}; 672 673static struct v4l2_subdev_pad_ops noon010_pad_ops = { 674 .enum_mbus_code = noon010_enum_mbus_code, 675 .get_fmt = noon010_get_fmt, 676 .set_fmt = noon010_set_fmt, 677}; 678 679static struct v4l2_subdev_video_ops noon010_video_ops = { 680 .s_stream = noon010_s_stream, 681}; 682 683static const struct v4l2_subdev_ops noon010_ops = { 684 .core = &noon010_core_ops, 685 .pad = &noon010_pad_ops, 686 .video = &noon010_video_ops, 687}; 688 689/* Return 0 if NOON010PC30L sensor type was detected or -ENODEV otherwise. */ 690static int noon010_detect(struct i2c_client *client, struct noon010_info *info) 691{ 692 int ret; 693 694 ret = power_enable(info); 695 if (ret) 696 return ret; 697 698 ret = i2c_smbus_read_byte_data(client, DEVICE_ID_REG); 699 if (ret < 0) 700 dev_err(&client->dev, "I2C read failed: 0x%X\n", ret); 701 702 power_disable(info); 703 704 return ret == NOON010PC30_ID ? 0 : -ENODEV; 705} 706 707static int noon010_probe(struct i2c_client *client, 708 const struct i2c_device_id *id) 709{ 710 struct noon010_info *info; 711 struct v4l2_subdev *sd; 712 const struct noon010pc30_platform_data *pdata 713 = client->dev.platform_data; 714 int ret; 715 int i; 716 717 if (!pdata) { 718 dev_err(&client->dev, "No platform data!\n"); 719 return -EIO; 720 } 721 722 info = kzalloc(sizeof(*info), GFP_KERNEL); 723 if (!info) 724 return -ENOMEM; 725 726 mutex_init(&info->lock); 727 sd = &info->sd; 728 v4l2_i2c_subdev_init(sd, client, &noon010_ops); 729 strlcpy(sd->name, MODULE_NAME, sizeof(sd->name)); 730 731 sd->internal_ops = &noon010_subdev_internal_ops; 732 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 733 734 v4l2_ctrl_handler_init(&info->hdl, 3); 735 736 v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops, 737 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); 738 v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops, 739 V4L2_CID_RED_BALANCE, 0, 127, 1, 64); 740 v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops, 741 V4L2_CID_BLUE_BALANCE, 0, 127, 1, 64); 742 743 sd->ctrl_handler = &info->hdl; 744 745 ret = info->hdl.error; 746 if (ret) 747 goto np_err; 748 749 info->i2c_reg_page = -1; 750 info->gpio_nreset = -EINVAL; 751 info->gpio_nstby = -EINVAL; 752 info->curr_fmt = &noon010_formats[0]; 753 info->curr_win = &noon010_sizes[0]; 754 755 if (gpio_is_valid(pdata->gpio_nreset)) { 756 ret = gpio_request(pdata->gpio_nreset, "NOON010PC30 NRST"); 757 if (ret) { 758 dev_err(&client->dev, "GPIO request error: %d\n", ret); 759 goto np_err; 760 } 761 info->gpio_nreset = pdata->gpio_nreset; 762 gpio_direction_output(info->gpio_nreset, 0); 763 gpio_export(info->gpio_nreset, 0); 764 } 765 766 if (gpio_is_valid(pdata->gpio_nstby)) { 767 ret = gpio_request(pdata->gpio_nstby, "NOON010PC30 NSTBY"); 768 if (ret) { 769 dev_err(&client->dev, "GPIO request error: %d\n", ret); 770 goto np_gpio_err; 771 } 772 info->gpio_nstby = pdata->gpio_nstby; 773 gpio_direction_output(info->gpio_nstby, 0); 774 gpio_export(info->gpio_nstby, 0); 775 } 776 777 for (i = 0; i < NOON010_NUM_SUPPLIES; i++) 778 info->supply[i].supply = noon010_supply_name[i]; 779 780 ret = regulator_bulk_get(&client->dev, NOON010_NUM_SUPPLIES, 781 info->supply); 782 if (ret) 783 goto np_reg_err; 784 785 info->pad.flags = MEDIA_PAD_FL_SOURCE; 786 sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR; 787 ret = media_entity_init(&sd->entity, 1, &info->pad, 0); 788 if (ret < 0) 789 goto np_me_err; 790 791 ret = noon010_detect(client, info); 792 if (!ret) 793 return 0; 794 795np_me_err: 796 regulator_bulk_free(NOON010_NUM_SUPPLIES, info->supply); 797np_reg_err: 798 if (gpio_is_valid(info->gpio_nstby)) 799 gpio_free(info->gpio_nstby); 800np_gpio_err: 801 if (gpio_is_valid(info->gpio_nreset)) 802 gpio_free(info->gpio_nreset); 803np_err: 804 v4l2_ctrl_handler_free(&info->hdl); 805 v4l2_device_unregister_subdev(sd); 806 kfree(info); 807 return ret; 808} 809 810static int noon010_remove(struct i2c_client *client) 811{ 812 struct v4l2_subdev *sd = i2c_get_clientdata(client); 813 struct noon010_info *info = to_noon010(sd); 814 815 v4l2_device_unregister_subdev(sd); 816 v4l2_ctrl_handler_free(&info->hdl); 817 818 regulator_bulk_free(NOON010_NUM_SUPPLIES, info->supply); 819 820 if (gpio_is_valid(info->gpio_nreset)) 821 gpio_free(info->gpio_nreset); 822 823 if (gpio_is_valid(info->gpio_nstby)) 824 gpio_free(info->gpio_nstby); 825 826 media_entity_cleanup(&sd->entity); 827 kfree(info); 828 return 0; 829} 830 831static const struct i2c_device_id noon010_id[] = { 832 { MODULE_NAME, 0 }, 833 { }, 834}; 835MODULE_DEVICE_TABLE(i2c, noon010_id); 836 837 838static struct i2c_driver noon010_i2c_driver = { 839 .driver = { 840 .name = MODULE_NAME 841 }, 842 .probe = noon010_probe, 843 .remove = noon010_remove, 844 .id_table = noon010_id, 845}; 846 847module_i2c_driver(noon010_i2c_driver); 848 849MODULE_DESCRIPTION("Siliconfile NOON010PC30 camera driver"); 850MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>"); 851MODULE_LICENSE("GPL"); 852