1/*
2 * amd76xrom.c
3 *
4 * Normal mappings of chips in physical memory
5 */
6
7#include <linux/module.h>
8#include <linux/types.h>
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/slab.h>
12#include <asm/io.h>
13#include <linux/mtd/mtd.h>
14#include <linux/mtd/map.h>
15#include <linux/mtd/cfi.h>
16#include <linux/mtd/flashchip.h>
17#include <linux/pci.h>
18#include <linux/pci_ids.h>
19#include <linux/list.h>
20
21
22#define xstr(s) str(s)
23#define str(s) #s
24#define MOD_NAME xstr(KBUILD_BASENAME)
25
26#define ADDRESS_NAME_LEN 18
27
28#define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
29
30struct amd76xrom_window {
31	void __iomem *virt;
32	unsigned long phys;
33	unsigned long size;
34	struct list_head maps;
35	struct resource rsrc;
36	struct pci_dev *pdev;
37};
38
39struct amd76xrom_map_info {
40	struct list_head list;
41	struct map_info map;
42	struct mtd_info *mtd;
43	struct resource rsrc;
44	char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];
45};
46
47/* The 2 bits controlling the window size are often set to allow reading
48 * the BIOS, but too small to allow writing, since the lock registers are
49 * 4MiB lower in the address space than the data.
50 *
51 * This is intended to prevent flashing the bios, perhaps accidentally.
52 *
53 * This parameter allows the normal driver to over-ride the BIOS settings.
54 *
55 * The bits are 6 and 7.  If both bits are set, it is a 5MiB window.
56 * If only the 7 Bit is set, it is a 4MiB window.  Otherwise, a
57 * 64KiB window.
58 *
59 */
60static uint win_size_bits;
61module_param(win_size_bits, uint, 0);
62MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x43 byte, normally set by BIOS.");
63
64static struct amd76xrom_window amd76xrom_window = {
65	.maps = LIST_HEAD_INIT(amd76xrom_window.maps),
66};
67
68static void amd76xrom_cleanup(struct amd76xrom_window *window)
69{
70	struct amd76xrom_map_info *map, *scratch;
71	u8 byte;
72
73	if (window->pdev) {
74		/* Disable writes through the rom window */
75		pci_read_config_byte(window->pdev, 0x40, &byte);
76		pci_write_config_byte(window->pdev, 0x40, byte & ~1);
77		pci_dev_put(window->pdev);
78	}
79
80	/* Free all of the mtd devices */
81	list_for_each_entry_safe(map, scratch, &window->maps, list) {
82		if (map->rsrc.parent) {
83			release_resource(&map->rsrc);
84		}
85		mtd_device_unregister(map->mtd);
86		map_destroy(map->mtd);
87		list_del(&map->list);
88		kfree(map);
89	}
90	if (window->rsrc.parent)
91		release_resource(&window->rsrc);
92
93	if (window->virt) {
94		iounmap(window->virt);
95		window->virt = NULL;
96		window->phys = 0;
97		window->size = 0;
98		window->pdev = NULL;
99	}
100}
101
102
103static int __devinit amd76xrom_init_one (struct pci_dev *pdev,
104	const struct pci_device_id *ent)
105{
106	static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
107	u8 byte;
108	struct amd76xrom_window *window = &amd76xrom_window;
109	struct amd76xrom_map_info *map = NULL;
110	unsigned long map_top;
111
112	/* Remember the pci dev I find the window in - already have a ref */
113	window->pdev = pdev;
114
115	/* Enable the selected rom window.  This is often incorrectly
116	 * set up by the BIOS, and the 4MiB offset for the lock registers
117	 * requires the full 5MiB of window space.
118	 *
119	 * This 'write, then read' approach leaves the bits for
120	 * other uses of the hardware info.
121	 */
122	pci_read_config_byte(pdev, 0x43, &byte);
123	pci_write_config_byte(pdev, 0x43, byte | win_size_bits );
124
125	/* Assume the rom window is properly setup, and find it's size */
126	pci_read_config_byte(pdev, 0x43, &byte);
127	if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6))) {
128		window->phys = 0xffb00000; /* 5MiB */
129	}
130	else if ((byte & (1<<7)) == (1<<7)) {
131		window->phys = 0xffc00000; /* 4MiB */
132	}
133	else {
134		window->phys = 0xffff0000; /* 64KiB */
135	}
136	window->size = 0xffffffffUL - window->phys + 1UL;
137
138	/*
139	 * Try to reserve the window mem region.  If this fails then
140	 * it is likely due to a fragment of the window being
141	 * "reseved" by the BIOS.  In the case that the
142	 * request_mem_region() fails then once the rom size is
143	 * discovered we will try to reserve the unreserved fragment.
144	 */
145	window->rsrc.name = MOD_NAME;
146	window->rsrc.start = window->phys;
147	window->rsrc.end   = window->phys + window->size - 1;
148	window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
149	if (request_resource(&iomem_resource, &window->rsrc)) {
150		window->rsrc.parent = NULL;
151		printk(KERN_ERR MOD_NAME
152		       " %s(): Unable to register resource %pR - kernel bug?\n",
153		       __func__, &window->rsrc);
154		return -EBUSY;
155	}
156
157
158	/* Enable writes through the rom window */
159	pci_read_config_byte(pdev, 0x40, &byte);
160	pci_write_config_byte(pdev, 0x40, byte | 1);
161
162	/* FIXME handle registers 0x80 - 0x8C the bios region locks */
163
164	/* For write accesses caches are useless */
165	window->virt = ioremap_nocache(window->phys, window->size);
166	if (!window->virt) {
167		printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",
168			window->phys, window->size);
169		goto out;
170	}
171
172	/* Get the first address to look for an rom chip at */
173	map_top = window->phys;
174#if 1
175	/* The probe sequence run over the firmware hub lock
176	 * registers sets them to 0x7 (no access).
177	 * Probe at most the last 4M of the address space.
178	 */
179	if (map_top < 0xffc00000) {
180		map_top = 0xffc00000;
181	}
182#endif
183	/* Loop  through and look for rom chips */
184	while((map_top - 1) < 0xffffffffUL) {
185		struct cfi_private *cfi;
186		unsigned long offset;
187		int i;
188
189		if (!map) {
190			map = kmalloc(sizeof(*map), GFP_KERNEL);
191		}
192		if (!map) {
193			printk(KERN_ERR MOD_NAME ": kmalloc failed");
194			goto out;
195		}
196		memset(map, 0, sizeof(*map));
197		INIT_LIST_HEAD(&map->list);
198		map->map.name = map->map_name;
199		map->map.phys = map_top;
200		offset = map_top - window->phys;
201		map->map.virt = (void __iomem *)
202			(((unsigned long)(window->virt)) + offset);
203		map->map.size = 0xffffffffUL - map_top + 1UL;
204		/* Set the name of the map to the address I am trying */
205		sprintf(map->map_name, "%s @%08Lx",
206			MOD_NAME, (unsigned long long)map->map.phys);
207
208		/* There is no generic VPP support */
209		for(map->map.bankwidth = 32; map->map.bankwidth;
210			map->map.bankwidth >>= 1)
211		{
212			char **probe_type;
213			/* Skip bankwidths that are not supported */
214			if (!map_bankwidth_supported(map->map.bankwidth))
215				continue;
216
217			/* Setup the map methods */
218			simple_map_init(&map->map);
219
220			/* Try all of the probe methods */
221			probe_type = rom_probe_types;
222			for(; *probe_type; probe_type++) {
223				map->mtd = do_map_probe(*probe_type, &map->map);
224				if (map->mtd)
225					goto found;
226			}
227		}
228		map_top += ROM_PROBE_STEP_SIZE;
229		continue;
230	found:
231		/* Trim the size if we are larger than the map */
232		if (map->mtd->size > map->map.size) {
233			printk(KERN_WARNING MOD_NAME
234				" rom(%llu) larger than window(%lu). fixing...\n",
235				(unsigned long long)map->mtd->size, map->map.size);
236			map->mtd->size = map->map.size;
237		}
238		if (window->rsrc.parent) {
239			/*
240			 * Registering the MTD device in iomem may not be possible
241			 * if there is a BIOS "reserved" and BUSY range.  If this
242			 * fails then continue anyway.
243			 */
244			map->rsrc.name  = map->map_name;
245			map->rsrc.start = map->map.phys;
246			map->rsrc.end   = map->map.phys + map->mtd->size - 1;
247			map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
248			if (request_resource(&window->rsrc, &map->rsrc)) {
249				printk(KERN_ERR MOD_NAME
250					": cannot reserve MTD resource\n");
251				map->rsrc.parent = NULL;
252			}
253		}
254
255		/* Make the whole region visible in the map */
256		map->map.virt = window->virt;
257		map->map.phys = window->phys;
258		cfi = map->map.fldrv_priv;
259		for(i = 0; i < cfi->numchips; i++) {
260			cfi->chips[i].start += offset;
261		}
262
263		/* Now that the mtd devices is complete claim and export it */
264		map->mtd->owner = THIS_MODULE;
265		if (mtd_device_register(map->mtd, NULL, 0)) {
266			map_destroy(map->mtd);
267			map->mtd = NULL;
268			goto out;
269		}
270
271
272		/* Calculate the new value of map_top */
273		map_top += map->mtd->size;
274
275		/* File away the map structure */
276		list_add(&map->list, &window->maps);
277		map = NULL;
278	}
279
280 out:
281	/* Free any left over map structures */
282	kfree(map);
283	/* See if I have any map structures */
284	if (list_empty(&window->maps)) {
285		amd76xrom_cleanup(window);
286		return -ENODEV;
287	}
288	return 0;
289}
290
291
292static void __devexit amd76xrom_remove_one (struct pci_dev *pdev)
293{
294	struct amd76xrom_window *window = &amd76xrom_window;
295
296	amd76xrom_cleanup(window);
297}
298
299static struct pci_device_id amd76xrom_pci_tbl[] = {
300	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410,
301		PCI_ANY_ID, PCI_ANY_ID, },
302	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440,
303		PCI_ANY_ID, PCI_ANY_ID, },
304	{ PCI_VENDOR_ID_AMD, 0x7468 }, /* amd8111 support */
305	{ 0, }
306};
307
308MODULE_DEVICE_TABLE(pci, amd76xrom_pci_tbl);
309
310#if 0
311static struct pci_driver amd76xrom_driver = {
312	.name =		MOD_NAME,
313	.id_table =	amd76xrom_pci_tbl,
314	.probe =	amd76xrom_init_one,
315	.remove =	amd76xrom_remove_one,
316};
317#endif
318
319static int __init init_amd76xrom(void)
320{
321	struct pci_dev *pdev;
322	struct pci_device_id *id;
323	pdev = NULL;
324	for(id = amd76xrom_pci_tbl; id->vendor; id++) {
325		pdev = pci_get_device(id->vendor, id->device, NULL);
326		if (pdev) {
327			break;
328		}
329	}
330	if (pdev) {
331		return amd76xrom_init_one(pdev, &amd76xrom_pci_tbl[0]);
332	}
333	return -ENXIO;
334#if 0
335	return pci_register_driver(&amd76xrom_driver);
336#endif
337}
338
339static void __exit cleanup_amd76xrom(void)
340{
341	amd76xrom_remove_one(amd76xrom_window.pdev);
342}
343
344module_init(init_amd76xrom);
345module_exit(cleanup_amd76xrom);
346
347MODULE_LICENSE("GPL");
348MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");
349MODULE_DESCRIPTION("MTD map driver for BIOS chips on the AMD76X southbridge");
350
351