1/*
2 * Linux network driver for Brocade Converged Network Adapter.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
11 * General Public License for more details.
12 */
13/*
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
15 * All rights reserved
16 * www.brocade.com
17 */
18
19#ifndef __BFA_IOC_H__
20#define __BFA_IOC_H__
21
22#include "bfa_cs.h"
23#include "bfi.h"
24#include "cna.h"
25
26#define BFA_IOC_TOV		3000	/* msecs */
27#define BFA_IOC_HWSEM_TOV	500	/* msecs */
28#define BFA_IOC_HB_TOV		500	/* msecs */
29#define BFA_IOC_POLL_TOV	200	/* msecs */
30#define BNA_DBG_FWTRC_LEN      (BFI_IOC_TRC_ENTS * BFI_IOC_TRC_ENT_SZ + \
31				BFI_IOC_TRC_HDR_SZ)
32
33/**
34 * PCI device information required by IOC
35 */
36struct bfa_pcidev {
37	int	pci_slot;
38	u8	pci_func;
39	u16	device_id;
40	u16	ssid;
41	void	__iomem *pci_bar_kva;
42};
43
44/**
45 * Structure used to remember the DMA-able memory block's KVA and Physical
46 * Address
47 */
48struct bfa_dma {
49	void	*kva;	/* ! Kernel virtual address	*/
50	u64	pa;	/* ! Physical address		*/
51};
52
53#define BFA_DMA_ALIGN_SZ	256
54
55/**
56 * smem size for Crossbow and Catapult
57 */
58#define BFI_SMEM_CB_SIZE	0x200000U	/* ! 2MB for crossbow	*/
59#define BFI_SMEM_CT_SIZE	0x280000U	/* ! 2.5MB for catapult	*/
60
61/**
62 * @brief BFA dma address assignment macro. (big endian format)
63 */
64#define bfa_dma_be_addr_set(dma_addr, pa)	\
65		__bfa_dma_be_addr_set(&dma_addr, (u64)pa)
66static inline void
67__bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa)
68{
69	dma_addr->a32.addr_lo = (u32) htonl(pa);
70	dma_addr->a32.addr_hi = (u32) htonl(upper_32_bits(pa));
71}
72
73#define bfa_alen_set(__alen, __len, __pa)	\
74	__bfa_alen_set(__alen, __len, (u64)__pa)
75
76static inline void
77__bfa_alen_set(struct bfi_alen *alen, u32 len, u64 pa)
78{
79	alen->al_len = cpu_to_be32(len);
80	bfa_dma_be_addr_set(alen->al_addr, pa);
81}
82
83struct bfa_ioc_regs {
84	void __iomem *hfn_mbox_cmd;
85	void __iomem *hfn_mbox;
86	void __iomem *lpu_mbox_cmd;
87	void __iomem *lpu_mbox;
88	void __iomem *lpu_read_stat;
89	void __iomem *pss_ctl_reg;
90	void __iomem *pss_err_status_reg;
91	void __iomem *app_pll_fast_ctl_reg;
92	void __iomem *app_pll_slow_ctl_reg;
93	void __iomem *ioc_sem_reg;
94	void __iomem *ioc_usage_sem_reg;
95	void __iomem *ioc_init_sem_reg;
96	void __iomem *ioc_usage_reg;
97	void __iomem *host_page_num_fn;
98	void __iomem *heartbeat;
99	void __iomem *ioc_fwstate;
100	void __iomem *alt_ioc_fwstate;
101	void __iomem *ll_halt;
102	void __iomem *alt_ll_halt;
103	void __iomem *err_set;
104	void __iomem *ioc_fail_sync;
105	void __iomem *shirq_isr_next;
106	void __iomem *shirq_msk_next;
107	void __iomem *smem_page_start;
108	u32	smem_pg0;
109};
110
111/**
112 * IOC Mailbox structures
113 */
114typedef void (*bfa_mbox_cmd_cbfn_t)(void *cbarg);
115struct bfa_mbox_cmd {
116	struct list_head	qe;
117	bfa_mbox_cmd_cbfn_t     cbfn;
118	void		    *cbarg;
119	u32     msg[BFI_IOC_MSGSZ];
120};
121
122/**
123 * IOC mailbox module
124 */
125typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg *m);
126struct bfa_ioc_mbox_mod {
127	struct list_head	cmd_q;		/*!< pending mbox queue	*/
128	int			nmclass;	/*!< number of handlers */
129	struct {
130		bfa_ioc_mbox_mcfunc_t	cbfn;	/*!< message handlers	*/
131		void			*cbarg;
132	} mbhdlr[BFI_MC_MAX];
133};
134
135/**
136 * IOC callback function interfaces
137 */
138typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status);
139typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa);
140typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa);
141typedef void (*bfa_ioc_reset_cbfn_t)(void *bfa);
142struct bfa_ioc_cbfn {
143	bfa_ioc_enable_cbfn_t	enable_cbfn;
144	bfa_ioc_disable_cbfn_t	disable_cbfn;
145	bfa_ioc_hbfail_cbfn_t	hbfail_cbfn;
146	bfa_ioc_reset_cbfn_t	reset_cbfn;
147};
148
149/**
150 * IOC event notification mechanism.
151 */
152enum bfa_ioc_event {
153	BFA_IOC_E_ENABLED	= 1,
154	BFA_IOC_E_DISABLED	= 2,
155	BFA_IOC_E_FAILED	= 3,
156};
157
158typedef void (*bfa_ioc_notify_cbfn_t)(void *, enum bfa_ioc_event);
159
160struct bfa_ioc_notify {
161	struct list_head	qe;
162	bfa_ioc_notify_cbfn_t	cbfn;
163	void			*cbarg;
164};
165
166/**
167 * Initialize a IOC event notification structure
168 */
169#define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do {	\
170	(__notify)->cbfn = (__cbfn);				\
171	(__notify)->cbarg = (__cbarg);				\
172} while (0)
173
174struct bfa_iocpf {
175	bfa_fsm_t		fsm;
176	struct bfa_ioc		*ioc;
177	bool			fw_mismatch_notified;
178	bool			auto_recover;
179	u32			poll_time;
180};
181
182struct bfa_ioc {
183	bfa_fsm_t		fsm;
184	struct bfa		*bfa;
185	struct bfa_pcidev	pcidev;
186	struct timer_list	ioc_timer;
187	struct timer_list	iocpf_timer;
188	struct timer_list	sem_timer;
189	struct timer_list	hb_timer;
190	u32			hb_count;
191	struct list_head	notify_q;
192	void			*dbg_fwsave;
193	int			dbg_fwsave_len;
194	bool			dbg_fwsave_once;
195	enum bfi_pcifn_class	clscode;
196	struct bfa_ioc_regs	ioc_regs;
197	struct bfa_ioc_drv_stats stats;
198	bool			fcmode;
199	bool			pllinit;
200	bool			stats_busy;	/*!< outstanding stats */
201	u8			port_id;
202
203	struct bfa_dma		attr_dma;
204	struct bfi_ioc_attr	*attr;
205	struct bfa_ioc_cbfn	*cbfn;
206	struct bfa_ioc_mbox_mod	mbox_mod;
207	const struct bfa_ioc_hwif *ioc_hwif;
208	struct bfa_iocpf	iocpf;
209	enum bfi_asic_gen	asic_gen;
210	enum bfi_asic_mode	asic_mode;
211	enum bfi_port_mode	port0_mode;
212	enum bfi_port_mode	port1_mode;
213	enum bfa_mode		port_mode;
214	u8			ad_cap_bm;	/*!< adapter cap bit mask */
215	u8			port_mode_cfg;	/*!< config port mode */
216};
217
218struct bfa_ioc_hwif {
219	enum bfa_status (*ioc_pll_init) (void __iomem *rb,
220						enum bfi_asic_mode m);
221	bool		(*ioc_firmware_lock)	(struct bfa_ioc *ioc);
222	void		(*ioc_firmware_unlock)	(struct bfa_ioc *ioc);
223	void		(*ioc_reg_init)	(struct bfa_ioc *ioc);
224	void		(*ioc_map_port)	(struct bfa_ioc *ioc);
225	void		(*ioc_isr_mode_set)	(struct bfa_ioc *ioc,
226					bool msix);
227	void		(*ioc_notify_fail)	(struct bfa_ioc *ioc);
228	void		(*ioc_ownership_reset)	(struct bfa_ioc *ioc);
229	bool		(*ioc_sync_start)       (struct bfa_ioc *ioc);
230	void		(*ioc_sync_join)	(struct bfa_ioc *ioc);
231	void		(*ioc_sync_leave)	(struct bfa_ioc *ioc);
232	void		(*ioc_sync_ack)		(struct bfa_ioc *ioc);
233	bool		(*ioc_sync_complete)	(struct bfa_ioc *ioc);
234	bool		(*ioc_lpu_read_stat)	(struct bfa_ioc *ioc);
235};
236
237#define bfa_ioc_pcifn(__ioc)		((__ioc)->pcidev.pci_func)
238#define bfa_ioc_devid(__ioc)		((__ioc)->pcidev.device_id)
239#define bfa_ioc_bar0(__ioc)		((__ioc)->pcidev.pci_bar_kva)
240#define bfa_ioc_portid(__ioc)		((__ioc)->port_id)
241#define bfa_ioc_asic_gen(__ioc)		((__ioc)->asic_gen)
242#define bfa_ioc_fetch_stats(__ioc, __stats) \
243		(((__stats)->drv_stats) = (__ioc)->stats)
244#define bfa_ioc_clr_stats(__ioc)	\
245		memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
246#define bfa_ioc_maxfrsize(__ioc)	((__ioc)->attr->maxfrsize)
247#define bfa_ioc_rx_bbcredit(__ioc)	((__ioc)->attr->rx_bbcredit)
248#define bfa_ioc_speed_sup(__ioc)	\
249	BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop)
250#define bfa_ioc_get_nports(__ioc)	\
251	BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop)
252
253#define bfa_ioc_stats(_ioc, _stats)	((_ioc)->stats._stats++)
254#define bfa_ioc_stats_hb_count(_ioc, _hb_count)	\
255	((_ioc)->stats.hb_count = (_hb_count))
256#define BFA_IOC_FWIMG_MINSZ	(16 * 1024)
257#define BFA_IOC_FW_SMEM_SIZE(__ioc)					\
258	((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB)			\
259	? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE)
260#define BFA_IOC_FLASH_CHUNK_NO(off)		(off / BFI_FLASH_CHUNK_SZ_WORDS)
261#define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off)	(off % BFI_FLASH_CHUNK_SZ_WORDS)
262#define BFA_IOC_FLASH_CHUNK_ADDR(chunkno)  (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
263
264/**
265 * IOC mailbox interface
266 */
267bool bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc,
268			struct bfa_mbox_cmd *cmd,
269			bfa_mbox_cmd_cbfn_t cbfn, void *cbarg);
270void bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc);
271void bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
272		bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg);
273
274/**
275 * IOC interfaces
276 */
277
278#define bfa_ioc_pll_init_asic(__ioc) \
279	((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
280			   (__ioc)->asic_mode))
281
282#define	bfa_ioc_isr_mode_set(__ioc, __msix) do {			\
283	if ((__ioc)->ioc_hwif->ioc_isr_mode_set)			\
284		((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix));	\
285} while (0)
286#define	bfa_ioc_ownership_reset(__ioc)				\
287			((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
288
289#define bfa_ioc_lpu_read_stat(__ioc) do {				\
290		if ((__ioc)->ioc_hwif->ioc_lpu_read_stat)		\
291			((__ioc)->ioc_hwif->ioc_lpu_read_stat(__ioc));	\
292} while (0)
293
294void bfa_nw_ioc_set_ct_hwif(struct bfa_ioc *ioc);
295void bfa_nw_ioc_set_ct2_hwif(struct bfa_ioc *ioc);
296void bfa_nw_ioc_ct2_poweron(struct bfa_ioc *ioc);
297
298void bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa,
299		struct bfa_ioc_cbfn *cbfn);
300void bfa_nw_ioc_auto_recover(bool auto_recover);
301void bfa_nw_ioc_detach(struct bfa_ioc *ioc);
302void bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev,
303		enum bfi_pcifn_class clscode);
304u32 bfa_nw_ioc_meminfo(void);
305void bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc,  u8 *dm_kva, u64 dm_pa);
306void bfa_nw_ioc_enable(struct bfa_ioc *ioc);
307void bfa_nw_ioc_disable(struct bfa_ioc *ioc);
308
309void bfa_nw_ioc_error_isr(struct bfa_ioc *ioc);
310bool bfa_nw_ioc_is_disabled(struct bfa_ioc *ioc);
311bool bfa_nw_ioc_is_operational(struct bfa_ioc *ioc);
312void bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr);
313void bfa_nw_ioc_notify_register(struct bfa_ioc *ioc,
314	struct bfa_ioc_notify *notify);
315bool bfa_nw_ioc_sem_get(void __iomem *sem_reg);
316void bfa_nw_ioc_sem_release(void __iomem *sem_reg);
317void bfa_nw_ioc_hw_sem_release(struct bfa_ioc *ioc);
318void bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc,
319			struct bfi_ioc_image_hdr *fwhdr);
320bool bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc,
321			struct bfi_ioc_image_hdr *fwhdr);
322mac_t bfa_nw_ioc_get_mac(struct bfa_ioc *ioc);
323void bfa_nw_ioc_debug_memclaim(struct bfa_ioc *ioc, void *dbg_fwsave);
324int bfa_nw_ioc_debug_fwtrc(struct bfa_ioc *ioc, void *trcdata, int *trclen);
325int bfa_nw_ioc_debug_fwsave(struct bfa_ioc *ioc, void *trcdata, int *trclen);
326
327/*
328 * Timeout APIs
329 */
330void bfa_nw_ioc_timeout(void *ioc);
331void bfa_nw_ioc_hb_check(void *ioc);
332void bfa_nw_iocpf_timeout(void *ioc);
333void bfa_nw_iocpf_sem_timeout(void *ioc);
334
335/*
336 * F/W Image Size & Chunk
337 */
338u32 *bfa_cb_image_get_chunk(enum bfi_asic_gen asic_gen, u32 off);
339u32 bfa_cb_image_get_size(enum bfi_asic_gen asic_gen);
340
341/*
342 *	Flash module specific
343 */
344typedef void	(*bfa_cb_flash) (void *cbarg, enum bfa_status status);
345
346struct bfa_flash {
347	struct bfa_ioc *ioc;		/* back pointer to ioc */
348	u32		type;		/* partition type */
349	u8		instance;	/* partition instance */
350	u8		rsv[3];
351	u32		op_busy;	/*  operation busy flag */
352	u32		residue;	/*  residual length */
353	u32		offset;		/*  offset */
354	enum bfa_status	status;		/*  status */
355	u8		*dbuf_kva;	/*  dma buf virtual address */
356	u64		dbuf_pa;	/*  dma buf physical address */
357	bfa_cb_flash	cbfn;		/*  user callback function */
358	void		*cbarg;		/*  user callback arg */
359	u8		*ubuf;		/*  user supplied buffer */
360	u32		addr_off;	/*  partition address offset */
361	struct bfa_mbox_cmd mb;		/*  mailbox */
362	struct bfa_ioc_notify ioc_notify; /*  ioc event notify */
363};
364
365enum bfa_status bfa_nw_flash_get_attr(struct bfa_flash *flash,
366			struct bfa_flash_attr *attr,
367			bfa_cb_flash cbfn, void *cbarg);
368enum bfa_status bfa_nw_flash_update_part(struct bfa_flash *flash,
369			u32 type, u8 instance, void *buf, u32 len, u32 offset,
370			bfa_cb_flash cbfn, void *cbarg);
371enum bfa_status bfa_nw_flash_read_part(struct bfa_flash *flash,
372			u32 type, u8 instance, void *buf, u32 len, u32 offset,
373			bfa_cb_flash cbfn, void *cbarg);
374u32	bfa_nw_flash_meminfo(void);
375void	bfa_nw_flash_attach(struct bfa_flash *flash,
376			    struct bfa_ioc *ioc, void *dev);
377void	bfa_nw_flash_memclaim(struct bfa_flash *flash, u8 *dm_kva, u64 dm_pa);
378
379#endif /* __BFA_IOC_H__ */
380