1/* 2 * Faraday FTMAC100 10/100 Ethernet 3 * 4 * (C) Copyright 2009-2011 Faraday Technology 5 * Po-Yu Chuang <ratbert@faraday-tech.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 23 24#include <linux/dma-mapping.h> 25#include <linux/etherdevice.h> 26#include <linux/ethtool.h> 27#include <linux/init.h> 28#include <linux/interrupt.h> 29#include <linux/io.h> 30#include <linux/mii.h> 31#include <linux/module.h> 32#include <linux/netdevice.h> 33#include <linux/platform_device.h> 34 35#include "ftmac100.h" 36 37#define DRV_NAME "ftmac100" 38#define DRV_VERSION "0.2" 39 40#define RX_QUEUE_ENTRIES 128 /* must be power of 2 */ 41#define TX_QUEUE_ENTRIES 16 /* must be power of 2 */ 42 43#define MAX_PKT_SIZE 1518 44#define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */ 45 46#if MAX_PKT_SIZE > 0x7ff 47#error invalid MAX_PKT_SIZE 48#endif 49 50#if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE 51#error invalid RX_BUF_SIZE 52#endif 53 54/****************************************************************************** 55 * private data 56 *****************************************************************************/ 57struct ftmac100_descs { 58 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES]; 59 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES]; 60}; 61 62struct ftmac100 { 63 struct resource *res; 64 void __iomem *base; 65 int irq; 66 67 struct ftmac100_descs *descs; 68 dma_addr_t descs_dma_addr; 69 70 unsigned int rx_pointer; 71 unsigned int tx_clean_pointer; 72 unsigned int tx_pointer; 73 unsigned int tx_pending; 74 75 spinlock_t tx_lock; 76 77 struct net_device *netdev; 78 struct device *dev; 79 struct napi_struct napi; 80 81 struct mii_if_info mii; 82}; 83 84static int ftmac100_alloc_rx_page(struct ftmac100 *priv, 85 struct ftmac100_rxdes *rxdes, gfp_t gfp); 86 87/****************************************************************************** 88 * internal functions (hardware register access) 89 *****************************************************************************/ 90#define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \ 91 FTMAC100_INT_NORXBUF | \ 92 FTMAC100_INT_XPKT_OK | \ 93 FTMAC100_INT_XPKT_LOST | \ 94 FTMAC100_INT_RPKT_LOST | \ 95 FTMAC100_INT_AHB_ERR | \ 96 FTMAC100_INT_PHYSTS_CHG) 97 98#define INT_MASK_ALL_DISABLED 0 99 100static void ftmac100_enable_all_int(struct ftmac100 *priv) 101{ 102 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR); 103} 104 105static void ftmac100_disable_all_int(struct ftmac100 *priv) 106{ 107 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR); 108} 109 110static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr) 111{ 112 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR); 113} 114 115static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr) 116{ 117 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR); 118} 119 120static void ftmac100_txdma_start_polling(struct ftmac100 *priv) 121{ 122 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD); 123} 124 125static int ftmac100_reset(struct ftmac100 *priv) 126{ 127 struct net_device *netdev = priv->netdev; 128 int i; 129 130 /* NOTE: reset clears all registers */ 131 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR); 132 133 for (i = 0; i < 5; i++) { 134 unsigned int maccr; 135 136 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR); 137 if (!(maccr & FTMAC100_MACCR_SW_RST)) { 138 /* 139 * FTMAC100_MACCR_SW_RST cleared does not indicate 140 * that hardware reset completed (what the f*ck). 141 * We still need to wait for a while. 142 */ 143 udelay(500); 144 return 0; 145 } 146 147 udelay(1000); 148 } 149 150 netdev_err(netdev, "software reset failed\n"); 151 return -EIO; 152} 153 154static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac) 155{ 156 unsigned int maddr = mac[0] << 8 | mac[1]; 157 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5]; 158 159 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR); 160 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR); 161} 162 163#define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \ 164 FTMAC100_MACCR_RCV_EN | \ 165 FTMAC100_MACCR_XDMA_EN | \ 166 FTMAC100_MACCR_RDMA_EN | \ 167 FTMAC100_MACCR_CRC_APD | \ 168 FTMAC100_MACCR_FULLDUP | \ 169 FTMAC100_MACCR_RX_RUNT | \ 170 FTMAC100_MACCR_RX_BROADPKT) 171 172static int ftmac100_start_hw(struct ftmac100 *priv) 173{ 174 struct net_device *netdev = priv->netdev; 175 176 if (ftmac100_reset(priv)) 177 return -EIO; 178 179 /* setup ring buffer base registers */ 180 ftmac100_set_rx_ring_base(priv, 181 priv->descs_dma_addr + 182 offsetof(struct ftmac100_descs, rxdes)); 183 ftmac100_set_tx_ring_base(priv, 184 priv->descs_dma_addr + 185 offsetof(struct ftmac100_descs, txdes)); 186 187 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC); 188 189 ftmac100_set_mac(priv, netdev->dev_addr); 190 191 iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR); 192 return 0; 193} 194 195static void ftmac100_stop_hw(struct ftmac100 *priv) 196{ 197 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR); 198} 199 200/****************************************************************************** 201 * internal functions (receive descriptor) 202 *****************************************************************************/ 203static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes) 204{ 205 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS); 206} 207 208static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes) 209{ 210 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS); 211} 212 213static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes) 214{ 215 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN); 216} 217 218static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes) 219{ 220 /* clear status bits */ 221 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN); 222} 223 224static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes) 225{ 226 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR); 227} 228 229static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes) 230{ 231 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR); 232} 233 234static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes) 235{ 236 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL); 237} 238 239static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes) 240{ 241 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT); 242} 243 244static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes) 245{ 246 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB); 247} 248 249static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes) 250{ 251 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL; 252} 253 254static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes) 255{ 256 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST); 257} 258 259static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes, 260 unsigned int size) 261{ 262 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR); 263 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size)); 264} 265 266static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes) 267{ 268 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR); 269} 270 271static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes, 272 dma_addr_t addr) 273{ 274 rxdes->rxdes2 = cpu_to_le32(addr); 275} 276 277static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes) 278{ 279 return le32_to_cpu(rxdes->rxdes2); 280} 281 282/* 283 * rxdes3 is not used by hardware. We use it to keep track of page. 284 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu(). 285 */ 286static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page) 287{ 288 rxdes->rxdes3 = (unsigned int)page; 289} 290 291static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes) 292{ 293 return (struct page *)rxdes->rxdes3; 294} 295 296/****************************************************************************** 297 * internal functions (receive) 298 *****************************************************************************/ 299static int ftmac100_next_rx_pointer(int pointer) 300{ 301 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1); 302} 303 304static void ftmac100_rx_pointer_advance(struct ftmac100 *priv) 305{ 306 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer); 307} 308 309static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv) 310{ 311 return &priv->descs->rxdes[priv->rx_pointer]; 312} 313 314static struct ftmac100_rxdes * 315ftmac100_rx_locate_first_segment(struct ftmac100 *priv) 316{ 317 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv); 318 319 while (!ftmac100_rxdes_owned_by_dma(rxdes)) { 320 if (ftmac100_rxdes_first_segment(rxdes)) 321 return rxdes; 322 323 ftmac100_rxdes_set_dma_own(rxdes); 324 ftmac100_rx_pointer_advance(priv); 325 rxdes = ftmac100_current_rxdes(priv); 326 } 327 328 return NULL; 329} 330 331static bool ftmac100_rx_packet_error(struct ftmac100 *priv, 332 struct ftmac100_rxdes *rxdes) 333{ 334 struct net_device *netdev = priv->netdev; 335 bool error = false; 336 337 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) { 338 if (net_ratelimit()) 339 netdev_info(netdev, "rx err\n"); 340 341 netdev->stats.rx_errors++; 342 error = true; 343 } 344 345 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) { 346 if (net_ratelimit()) 347 netdev_info(netdev, "rx crc err\n"); 348 349 netdev->stats.rx_crc_errors++; 350 error = true; 351 } 352 353 if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) { 354 if (net_ratelimit()) 355 netdev_info(netdev, "rx frame too long\n"); 356 357 netdev->stats.rx_length_errors++; 358 error = true; 359 } else if (unlikely(ftmac100_rxdes_runt(rxdes))) { 360 if (net_ratelimit()) 361 netdev_info(netdev, "rx runt\n"); 362 363 netdev->stats.rx_length_errors++; 364 error = true; 365 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) { 366 if (net_ratelimit()) 367 netdev_info(netdev, "rx odd nibble\n"); 368 369 netdev->stats.rx_length_errors++; 370 error = true; 371 } 372 373 return error; 374} 375 376static void ftmac100_rx_drop_packet(struct ftmac100 *priv) 377{ 378 struct net_device *netdev = priv->netdev; 379 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv); 380 bool done = false; 381 382 if (net_ratelimit()) 383 netdev_dbg(netdev, "drop packet %p\n", rxdes); 384 385 do { 386 if (ftmac100_rxdes_last_segment(rxdes)) 387 done = true; 388 389 ftmac100_rxdes_set_dma_own(rxdes); 390 ftmac100_rx_pointer_advance(priv); 391 rxdes = ftmac100_current_rxdes(priv); 392 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes)); 393 394 netdev->stats.rx_dropped++; 395} 396 397static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed) 398{ 399 struct net_device *netdev = priv->netdev; 400 struct ftmac100_rxdes *rxdes; 401 struct sk_buff *skb; 402 struct page *page; 403 dma_addr_t map; 404 int length; 405 406 rxdes = ftmac100_rx_locate_first_segment(priv); 407 if (!rxdes) 408 return false; 409 410 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) { 411 ftmac100_rx_drop_packet(priv); 412 return true; 413 } 414 415 /* 416 * It is impossible to get multi-segment packets 417 * because we always provide big enough receive buffers. 418 */ 419 if (unlikely(!ftmac100_rxdes_last_segment(rxdes))) 420 BUG(); 421 422 /* start processing */ 423 skb = netdev_alloc_skb_ip_align(netdev, 128); 424 if (unlikely(!skb)) { 425 if (net_ratelimit()) 426 netdev_err(netdev, "rx skb alloc failed\n"); 427 428 ftmac100_rx_drop_packet(priv); 429 return true; 430 } 431 432 if (unlikely(ftmac100_rxdes_multicast(rxdes))) 433 netdev->stats.multicast++; 434 435 map = ftmac100_rxdes_get_dma_addr(rxdes); 436 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE); 437 438 length = ftmac100_rxdes_frame_length(rxdes); 439 page = ftmac100_rxdes_get_page(rxdes); 440 skb_fill_page_desc(skb, 0, page, 0, length); 441 skb->len += length; 442 skb->data_len += length; 443 444 /* page might be freed in __pskb_pull_tail() */ 445 if (length > 64) 446 skb->truesize += PAGE_SIZE; 447 __pskb_pull_tail(skb, min(length, 64)); 448 449 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC); 450 451 ftmac100_rx_pointer_advance(priv); 452 453 skb->protocol = eth_type_trans(skb, netdev); 454 455 netdev->stats.rx_packets++; 456 netdev->stats.rx_bytes += skb->len; 457 458 /* push packet to protocol stack */ 459 netif_receive_skb(skb); 460 461 (*processed)++; 462 return true; 463} 464 465/****************************************************************************** 466 * internal functions (transmit descriptor) 467 *****************************************************************************/ 468static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes) 469{ 470 /* clear all except end of ring bit */ 471 txdes->txdes0 = 0; 472 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR); 473 txdes->txdes2 = 0; 474 txdes->txdes3 = 0; 475} 476 477static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes) 478{ 479 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN); 480} 481 482static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes) 483{ 484 /* 485 * Make sure dma own bit will not be set before any other 486 * descriptor fields. 487 */ 488 wmb(); 489 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN); 490} 491 492static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes) 493{ 494 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL); 495} 496 497static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes) 498{ 499 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL); 500} 501 502static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes) 503{ 504 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR); 505} 506 507static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes) 508{ 509 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS); 510} 511 512static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes) 513{ 514 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS); 515} 516 517static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes) 518{ 519 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC); 520} 521 522static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes, 523 unsigned int len) 524{ 525 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len)); 526} 527 528static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes, 529 dma_addr_t addr) 530{ 531 txdes->txdes2 = cpu_to_le32(addr); 532} 533 534static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes) 535{ 536 return le32_to_cpu(txdes->txdes2); 537} 538 539/* 540 * txdes3 is not used by hardware. We use it to keep track of socket buffer. 541 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu(). 542 */ 543static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb) 544{ 545 txdes->txdes3 = (unsigned int)skb; 546} 547 548static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes) 549{ 550 return (struct sk_buff *)txdes->txdes3; 551} 552 553/****************************************************************************** 554 * internal functions (transmit) 555 *****************************************************************************/ 556static int ftmac100_next_tx_pointer(int pointer) 557{ 558 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1); 559} 560 561static void ftmac100_tx_pointer_advance(struct ftmac100 *priv) 562{ 563 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer); 564} 565 566static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv) 567{ 568 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer); 569} 570 571static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv) 572{ 573 return &priv->descs->txdes[priv->tx_pointer]; 574} 575 576static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv) 577{ 578 return &priv->descs->txdes[priv->tx_clean_pointer]; 579} 580 581static bool ftmac100_tx_complete_packet(struct ftmac100 *priv) 582{ 583 struct net_device *netdev = priv->netdev; 584 struct ftmac100_txdes *txdes; 585 struct sk_buff *skb; 586 dma_addr_t map; 587 588 if (priv->tx_pending == 0) 589 return false; 590 591 txdes = ftmac100_current_clean_txdes(priv); 592 593 if (ftmac100_txdes_owned_by_dma(txdes)) 594 return false; 595 596 skb = ftmac100_txdes_get_skb(txdes); 597 map = ftmac100_txdes_get_dma_addr(txdes); 598 599 if (unlikely(ftmac100_txdes_excessive_collision(txdes) || 600 ftmac100_txdes_late_collision(txdes))) { 601 /* 602 * packet transmitted to ethernet lost due to late collision 603 * or excessive collision 604 */ 605 netdev->stats.tx_aborted_errors++; 606 } else { 607 netdev->stats.tx_packets++; 608 netdev->stats.tx_bytes += skb->len; 609 } 610 611 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE); 612 dev_kfree_skb(skb); 613 614 ftmac100_txdes_reset(txdes); 615 616 ftmac100_tx_clean_pointer_advance(priv); 617 618 spin_lock(&priv->tx_lock); 619 priv->tx_pending--; 620 spin_unlock(&priv->tx_lock); 621 netif_wake_queue(netdev); 622 623 return true; 624} 625 626static void ftmac100_tx_complete(struct ftmac100 *priv) 627{ 628 while (ftmac100_tx_complete_packet(priv)) 629 ; 630} 631 632static int ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb, 633 dma_addr_t map) 634{ 635 struct net_device *netdev = priv->netdev; 636 struct ftmac100_txdes *txdes; 637 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len; 638 639 txdes = ftmac100_current_txdes(priv); 640 ftmac100_tx_pointer_advance(priv); 641 642 /* setup TX descriptor */ 643 ftmac100_txdes_set_skb(txdes, skb); 644 ftmac100_txdes_set_dma_addr(txdes, map); 645 646 ftmac100_txdes_set_first_segment(txdes); 647 ftmac100_txdes_set_last_segment(txdes); 648 ftmac100_txdes_set_txint(txdes); 649 ftmac100_txdes_set_buffer_size(txdes, len); 650 651 spin_lock(&priv->tx_lock); 652 priv->tx_pending++; 653 if (priv->tx_pending == TX_QUEUE_ENTRIES) 654 netif_stop_queue(netdev); 655 656 /* start transmit */ 657 ftmac100_txdes_set_dma_own(txdes); 658 spin_unlock(&priv->tx_lock); 659 660 ftmac100_txdma_start_polling(priv); 661 return NETDEV_TX_OK; 662} 663 664/****************************************************************************** 665 * internal functions (buffer) 666 *****************************************************************************/ 667static int ftmac100_alloc_rx_page(struct ftmac100 *priv, 668 struct ftmac100_rxdes *rxdes, gfp_t gfp) 669{ 670 struct net_device *netdev = priv->netdev; 671 struct page *page; 672 dma_addr_t map; 673 674 page = alloc_page(gfp); 675 if (!page) { 676 if (net_ratelimit()) 677 netdev_err(netdev, "failed to allocate rx page\n"); 678 return -ENOMEM; 679 } 680 681 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE); 682 if (unlikely(dma_mapping_error(priv->dev, map))) { 683 if (net_ratelimit()) 684 netdev_err(netdev, "failed to map rx page\n"); 685 __free_page(page); 686 return -ENOMEM; 687 } 688 689 ftmac100_rxdes_set_page(rxdes, page); 690 ftmac100_rxdes_set_dma_addr(rxdes, map); 691 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE); 692 ftmac100_rxdes_set_dma_own(rxdes); 693 return 0; 694} 695 696static void ftmac100_free_buffers(struct ftmac100 *priv) 697{ 698 int i; 699 700 for (i = 0; i < RX_QUEUE_ENTRIES; i++) { 701 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i]; 702 struct page *page = ftmac100_rxdes_get_page(rxdes); 703 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes); 704 705 if (!page) 706 continue; 707 708 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE); 709 __free_page(page); 710 } 711 712 for (i = 0; i < TX_QUEUE_ENTRIES; i++) { 713 struct ftmac100_txdes *txdes = &priv->descs->txdes[i]; 714 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes); 715 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes); 716 717 if (!skb) 718 continue; 719 720 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE); 721 dev_kfree_skb(skb); 722 } 723 724 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs), 725 priv->descs, priv->descs_dma_addr); 726} 727 728static int ftmac100_alloc_buffers(struct ftmac100 *priv) 729{ 730 int i; 731 732 priv->descs = dma_alloc_coherent(priv->dev, sizeof(struct ftmac100_descs), 733 &priv->descs_dma_addr, GFP_KERNEL); 734 if (!priv->descs) 735 return -ENOMEM; 736 737 memset(priv->descs, 0, sizeof(struct ftmac100_descs)); 738 739 /* initialize RX ring */ 740 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]); 741 742 for (i = 0; i < RX_QUEUE_ENTRIES; i++) { 743 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i]; 744 745 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL)) 746 goto err; 747 } 748 749 /* initialize TX ring */ 750 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]); 751 return 0; 752 753err: 754 ftmac100_free_buffers(priv); 755 return -ENOMEM; 756} 757 758/****************************************************************************** 759 * struct mii_if_info functions 760 *****************************************************************************/ 761static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg) 762{ 763 struct ftmac100 *priv = netdev_priv(netdev); 764 unsigned int phycr; 765 int i; 766 767 phycr = FTMAC100_PHYCR_PHYAD(phy_id) | 768 FTMAC100_PHYCR_REGAD(reg) | 769 FTMAC100_PHYCR_MIIRD; 770 771 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR); 772 773 for (i = 0; i < 10; i++) { 774 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR); 775 776 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0) 777 return phycr & FTMAC100_PHYCR_MIIRDATA; 778 779 udelay(100); 780 } 781 782 netdev_err(netdev, "mdio read timed out\n"); 783 return 0; 784} 785 786static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg, 787 int data) 788{ 789 struct ftmac100 *priv = netdev_priv(netdev); 790 unsigned int phycr; 791 int i; 792 793 phycr = FTMAC100_PHYCR_PHYAD(phy_id) | 794 FTMAC100_PHYCR_REGAD(reg) | 795 FTMAC100_PHYCR_MIIWR; 796 797 data = FTMAC100_PHYWDATA_MIIWDATA(data); 798 799 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA); 800 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR); 801 802 for (i = 0; i < 10; i++) { 803 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR); 804 805 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0) 806 return; 807 808 udelay(100); 809 } 810 811 netdev_err(netdev, "mdio write timed out\n"); 812} 813 814/****************************************************************************** 815 * struct ethtool_ops functions 816 *****************************************************************************/ 817static void ftmac100_get_drvinfo(struct net_device *netdev, 818 struct ethtool_drvinfo *info) 819{ 820 strcpy(info->driver, DRV_NAME); 821 strcpy(info->version, DRV_VERSION); 822 strcpy(info->bus_info, dev_name(&netdev->dev)); 823} 824 825static int ftmac100_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd) 826{ 827 struct ftmac100 *priv = netdev_priv(netdev); 828 return mii_ethtool_gset(&priv->mii, cmd); 829} 830 831static int ftmac100_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd) 832{ 833 struct ftmac100 *priv = netdev_priv(netdev); 834 return mii_ethtool_sset(&priv->mii, cmd); 835} 836 837static int ftmac100_nway_reset(struct net_device *netdev) 838{ 839 struct ftmac100 *priv = netdev_priv(netdev); 840 return mii_nway_restart(&priv->mii); 841} 842 843static u32 ftmac100_get_link(struct net_device *netdev) 844{ 845 struct ftmac100 *priv = netdev_priv(netdev); 846 return mii_link_ok(&priv->mii); 847} 848 849static const struct ethtool_ops ftmac100_ethtool_ops = { 850 .set_settings = ftmac100_set_settings, 851 .get_settings = ftmac100_get_settings, 852 .get_drvinfo = ftmac100_get_drvinfo, 853 .nway_reset = ftmac100_nway_reset, 854 .get_link = ftmac100_get_link, 855}; 856 857/****************************************************************************** 858 * interrupt handler 859 *****************************************************************************/ 860static irqreturn_t ftmac100_interrupt(int irq, void *dev_id) 861{ 862 struct net_device *netdev = dev_id; 863 struct ftmac100 *priv = netdev_priv(netdev); 864 865 if (likely(netif_running(netdev))) { 866 /* Disable interrupts for polling */ 867 ftmac100_disable_all_int(priv); 868 napi_schedule(&priv->napi); 869 } 870 871 return IRQ_HANDLED; 872} 873 874/****************************************************************************** 875 * struct napi_struct functions 876 *****************************************************************************/ 877static int ftmac100_poll(struct napi_struct *napi, int budget) 878{ 879 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi); 880 struct net_device *netdev = priv->netdev; 881 unsigned int status; 882 bool completed = true; 883 int rx = 0; 884 885 status = ioread32(priv->base + FTMAC100_OFFSET_ISR); 886 887 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) { 888 /* 889 * FTMAC100_INT_RPKT_FINISH: 890 * RX DMA has received packets into RX buffer successfully 891 * 892 * FTMAC100_INT_NORXBUF: 893 * RX buffer unavailable 894 */ 895 bool retry; 896 897 do { 898 retry = ftmac100_rx_packet(priv, &rx); 899 } while (retry && rx < budget); 900 901 if (retry && rx == budget) 902 completed = false; 903 } 904 905 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) { 906 /* 907 * FTMAC100_INT_XPKT_OK: 908 * packet transmitted to ethernet successfully 909 * 910 * FTMAC100_INT_XPKT_LOST: 911 * packet transmitted to ethernet lost due to late 912 * collision or excessive collision 913 */ 914 ftmac100_tx_complete(priv); 915 } 916 917 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST | 918 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) { 919 if (net_ratelimit()) 920 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status, 921 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "", 922 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "", 923 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "", 924 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : ""); 925 926 if (status & FTMAC100_INT_NORXBUF) { 927 /* RX buffer unavailable */ 928 netdev->stats.rx_over_errors++; 929 } 930 931 if (status & FTMAC100_INT_RPKT_LOST) { 932 /* received packet lost due to RX FIFO full */ 933 netdev->stats.rx_fifo_errors++; 934 } 935 936 if (status & FTMAC100_INT_PHYSTS_CHG) { 937 /* PHY link status change */ 938 mii_check_link(&priv->mii); 939 } 940 } 941 942 if (completed) { 943 /* stop polling */ 944 napi_complete(napi); 945 ftmac100_enable_all_int(priv); 946 } 947 948 return rx; 949} 950 951/****************************************************************************** 952 * struct net_device_ops functions 953 *****************************************************************************/ 954static int ftmac100_open(struct net_device *netdev) 955{ 956 struct ftmac100 *priv = netdev_priv(netdev); 957 int err; 958 959 err = ftmac100_alloc_buffers(priv); 960 if (err) { 961 netdev_err(netdev, "failed to allocate buffers\n"); 962 goto err_alloc; 963 } 964 965 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev); 966 if (err) { 967 netdev_err(netdev, "failed to request irq %d\n", priv->irq); 968 goto err_irq; 969 } 970 971 priv->rx_pointer = 0; 972 priv->tx_clean_pointer = 0; 973 priv->tx_pointer = 0; 974 priv->tx_pending = 0; 975 976 err = ftmac100_start_hw(priv); 977 if (err) 978 goto err_hw; 979 980 napi_enable(&priv->napi); 981 netif_start_queue(netdev); 982 983 ftmac100_enable_all_int(priv); 984 985 return 0; 986 987err_hw: 988 free_irq(priv->irq, netdev); 989err_irq: 990 ftmac100_free_buffers(priv); 991err_alloc: 992 return err; 993} 994 995static int ftmac100_stop(struct net_device *netdev) 996{ 997 struct ftmac100 *priv = netdev_priv(netdev); 998 999 ftmac100_disable_all_int(priv); 1000 netif_stop_queue(netdev); 1001 napi_disable(&priv->napi); 1002 ftmac100_stop_hw(priv); 1003 free_irq(priv->irq, netdev); 1004 ftmac100_free_buffers(priv); 1005 1006 return 0; 1007} 1008 1009static int ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev) 1010{ 1011 struct ftmac100 *priv = netdev_priv(netdev); 1012 dma_addr_t map; 1013 1014 if (unlikely(skb->len > MAX_PKT_SIZE)) { 1015 if (net_ratelimit()) 1016 netdev_dbg(netdev, "tx packet too big\n"); 1017 1018 netdev->stats.tx_dropped++; 1019 dev_kfree_skb(skb); 1020 return NETDEV_TX_OK; 1021 } 1022 1023 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); 1024 if (unlikely(dma_mapping_error(priv->dev, map))) { 1025 /* drop packet */ 1026 if (net_ratelimit()) 1027 netdev_err(netdev, "map socket buffer failed\n"); 1028 1029 netdev->stats.tx_dropped++; 1030 dev_kfree_skb(skb); 1031 return NETDEV_TX_OK; 1032 } 1033 1034 return ftmac100_xmit(priv, skb, map); 1035} 1036 1037/* optional */ 1038static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 1039{ 1040 struct ftmac100 *priv = netdev_priv(netdev); 1041 struct mii_ioctl_data *data = if_mii(ifr); 1042 1043 return generic_mii_ioctl(&priv->mii, data, cmd, NULL); 1044} 1045 1046static const struct net_device_ops ftmac100_netdev_ops = { 1047 .ndo_open = ftmac100_open, 1048 .ndo_stop = ftmac100_stop, 1049 .ndo_start_xmit = ftmac100_hard_start_xmit, 1050 .ndo_set_mac_address = eth_mac_addr, 1051 .ndo_validate_addr = eth_validate_addr, 1052 .ndo_do_ioctl = ftmac100_do_ioctl, 1053}; 1054 1055/****************************************************************************** 1056 * struct platform_driver functions 1057 *****************************************************************************/ 1058static int ftmac100_probe(struct platform_device *pdev) 1059{ 1060 struct resource *res; 1061 int irq; 1062 struct net_device *netdev; 1063 struct ftmac100 *priv; 1064 int err; 1065 1066 if (!pdev) 1067 return -ENODEV; 1068 1069 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1070 if (!res) 1071 return -ENXIO; 1072 1073 irq = platform_get_irq(pdev, 0); 1074 if (irq < 0) 1075 return irq; 1076 1077 /* setup net_device */ 1078 netdev = alloc_etherdev(sizeof(*priv)); 1079 if (!netdev) { 1080 err = -ENOMEM; 1081 goto err_alloc_etherdev; 1082 } 1083 1084 SET_NETDEV_DEV(netdev, &pdev->dev); 1085 SET_ETHTOOL_OPS(netdev, &ftmac100_ethtool_ops); 1086 netdev->netdev_ops = &ftmac100_netdev_ops; 1087 1088 platform_set_drvdata(pdev, netdev); 1089 1090 /* setup private data */ 1091 priv = netdev_priv(netdev); 1092 priv->netdev = netdev; 1093 priv->dev = &pdev->dev; 1094 1095 spin_lock_init(&priv->tx_lock); 1096 1097 /* initialize NAPI */ 1098 netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64); 1099 1100 /* map io memory */ 1101 priv->res = request_mem_region(res->start, resource_size(res), 1102 dev_name(&pdev->dev)); 1103 if (!priv->res) { 1104 dev_err(&pdev->dev, "Could not reserve memory region\n"); 1105 err = -ENOMEM; 1106 goto err_req_mem; 1107 } 1108 1109 priv->base = ioremap(res->start, resource_size(res)); 1110 if (!priv->base) { 1111 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n"); 1112 err = -EIO; 1113 goto err_ioremap; 1114 } 1115 1116 priv->irq = irq; 1117 1118 /* initialize struct mii_if_info */ 1119 priv->mii.phy_id = 0; 1120 priv->mii.phy_id_mask = 0x1f; 1121 priv->mii.reg_num_mask = 0x1f; 1122 priv->mii.dev = netdev; 1123 priv->mii.mdio_read = ftmac100_mdio_read; 1124 priv->mii.mdio_write = ftmac100_mdio_write; 1125 1126 /* register network device */ 1127 err = register_netdev(netdev); 1128 if (err) { 1129 dev_err(&pdev->dev, "Failed to register netdev\n"); 1130 goto err_register_netdev; 1131 } 1132 1133 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base); 1134 1135 if (!is_valid_ether_addr(netdev->dev_addr)) { 1136 eth_hw_addr_random(netdev); 1137 netdev_info(netdev, "generated random MAC address %pM\n", 1138 netdev->dev_addr); 1139 } 1140 1141 return 0; 1142 1143err_register_netdev: 1144 iounmap(priv->base); 1145err_ioremap: 1146 release_resource(priv->res); 1147err_req_mem: 1148 netif_napi_del(&priv->napi); 1149 platform_set_drvdata(pdev, NULL); 1150 free_netdev(netdev); 1151err_alloc_etherdev: 1152 return err; 1153} 1154 1155static int __exit ftmac100_remove(struct platform_device *pdev) 1156{ 1157 struct net_device *netdev; 1158 struct ftmac100 *priv; 1159 1160 netdev = platform_get_drvdata(pdev); 1161 priv = netdev_priv(netdev); 1162 1163 unregister_netdev(netdev); 1164 1165 iounmap(priv->base); 1166 release_resource(priv->res); 1167 1168 netif_napi_del(&priv->napi); 1169 platform_set_drvdata(pdev, NULL); 1170 free_netdev(netdev); 1171 return 0; 1172} 1173 1174static struct platform_driver ftmac100_driver = { 1175 .probe = ftmac100_probe, 1176 .remove = __exit_p(ftmac100_remove), 1177 .driver = { 1178 .name = DRV_NAME, 1179 .owner = THIS_MODULE, 1180 }, 1181}; 1182 1183/****************************************************************************** 1184 * initialization / finalization 1185 *****************************************************************************/ 1186static int __init ftmac100_init(void) 1187{ 1188 pr_info("Loading version " DRV_VERSION " ...\n"); 1189 return platform_driver_register(&ftmac100_driver); 1190} 1191 1192static void __exit ftmac100_exit(void) 1193{ 1194 platform_driver_unregister(&ftmac100_driver); 1195} 1196 1197module_init(ftmac100_init); 1198module_exit(ftmac100_exit); 1199 1200MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>"); 1201MODULE_DESCRIPTION("FTMAC100 driver"); 1202MODULE_LICENSE("GPL"); 1203