1/* eth16i.c An ICL EtherTeam 16i and 32 EISA ethernet driver for Linux
2
3   Written 1994-1999 by Mika Kuoppala
4
5   Copyright (C) 1994-1999 by Mika Kuoppala
6   Based on skeleton.c and heavily on at1700.c by Donald Becker
7
8   This software may be used and distributed according to the terms
9   of the GNU General Public License, incorporated herein by reference.
10
11   The author may be reached as miku@iki.fi
12
13   This driver supports following cards :
14	- ICL EtherTeam 16i
15	- ICL EtherTeam 32 EISA
16	  (Uses true 32 bit transfers rather than 16i compatibility mode)
17
18   Example Module usage:
19        insmod eth16i.o io=0x2a0 mediatype=bnc
20
21	mediatype can be one of the following: bnc,tp,dix,auto,eprom
22
23	'auto' will try to autoprobe mediatype.
24	'eprom' will use whatever type defined in eprom.
25
26   I have benchmarked driver with PII/300Mhz as a ftp client
27   and 486/33Mhz as a ftp server. Top speed was 1128.37 kilobytes/sec.
28
29   Sources:
30     - skeleton.c  a sample network driver core for linux,
31       written by Donald Becker <becker@scyld.com>
32     - at1700.c a driver for Allied Telesis AT1700, written
33       by Donald Becker.
34     - e16iSRV.asm a Netware 3.X Server Driver for ICL EtherTeam16i
35       written by Markku Viima
36     - The Fujitsu MB86965 databook.
37
38   Author thanks following persons due to their valueble assistance:
39        Markku Viima (ICL)
40	Ari Valve (ICL)
41	Donald Becker
42	Kurt Huwig <kurt@huwig.de>
43
44   Revision history:
45
46   Version	Date		Description
47
48   0.01         15.12-94        Initial version (card detection)
49   0.02         23.01-95        Interrupt is now hooked correctly
50   0.03         01.02-95        Rewrote initialization part
51   0.04         07.02-95        Base skeleton done...
52                                Made a few changes to signature checking
53                                to make it a bit reliable.
54                                - fixed bug in tx_buf mapping
55                                - fixed bug in initialization (DLC_EN
56                                  wasn't enabled when initialization
57                                  was done.)
58   0.05         08.02-95        If there were more than one packet to send,
59                                transmit was jammed due to invalid
60                                register write...now fixed
61   0.06         19.02-95        Rewrote interrupt handling
62   0.07         13.04-95        Wrote EEPROM read routines
63                                Card configuration now set according to
64                                data read from EEPROM
65   0.08         23.06-95        Wrote part that tries to probe used interface
66                                port if AUTO is selected
67
68   0.09         01.09-95        Added module support
69
70   0.10         04.09-95        Fixed receive packet allocation to work
71                                with kernels > 1.3.x
72
73   0.20		20.09-95	Added support for EtherTeam32 EISA
74
75   0.21         17.10-95        Removed the unnecessary extern
76				init_etherdev() declaration. Some
77				other cleanups.
78
79   0.22		22.02-96	Receive buffer was not flushed
80				correctly when faulty packet was
81				received. Now fixed.
82
83   0.23		26.02-96	Made resetting the adapter
84			 	more reliable.
85
86   0.24		27.02-96	Rewrote faulty packet handling in eth16i_rx
87
88   0.25		22.05-96	kfree() was missing from cleanup_module.
89
90   0.26		11.06-96	Sometimes card was not found by
91				check_signature(). Now made more reliable.
92
93   0.27		23.06-96	Oops. 16 consecutive collisions halted
94				adapter. Now will try to retransmit
95				MAX_COL_16 times before finally giving up.
96
97   0.28	        28.10-97	Added dev_id parameter (NULL) for free_irq
98
99   0.29         29.10-97        Multiple card support for module users
100
101   0.30         30.10-97        Fixed irq allocation bug.
102                                (request_irq moved from probe to open)
103
104   0.30a        21.08-98        Card detection made more relaxed. Driver
105                                had problems with some TCP/IP-PROM boots
106				to find the card. Suggested by
107				Kurt Huwig <kurt@huwig.de>
108
109   0.31         28.08-98        Media interface port can now be selected
110                                with module parameters or kernel
111				boot parameters.
112
113   0.32         31.08-98        IRQ was never freed if open/close
114                                pair wasn't called. Now fixed.
115
116   0.33         10.09-98        When eth16i_open() was called after
117                                eth16i_close() chip never recovered.
118				Now more shallow reset is made on
119				close.
120
121   0.34         29.06-99	Fixed one bad #ifdef.
122				Changed ioaddr -> io for consistency
123
124   0.35         01.07-99        transmit,-receive bytes were never
125                                updated in stats.
126
127   Bugs:
128	In some cases the media interface autoprobing code doesn't find
129	the correct interface type. In this case you can
130	manually choose the interface type in DOS with E16IC.EXE which is
131	configuration software for EtherTeam16i and EtherTeam32 cards.
132	This is also true for IRQ setting. You cannot use module
133	parameter to configure IRQ of the card (yet).
134
135   To do:
136	- Real multicast support
137	- Rewrite the media interface autoprobing code. Its _horrible_ !
138	- Possibly merge all the MB86965 specific code to external
139	  module for use by eth16.c and Donald's at1700.c
140	- IRQ configuration with module parameter. I will do
141	  this when i will get enough info about setting
142	  irq without configuration utility.
143*/
144
145static char *version =
146    "eth16i.c: v0.35 01-Jul-1999 Mika Kuoppala (miku@iki.fi)\n";
147
148#include <linux/module.h>
149#include <linux/kernel.h>
150#include <linux/types.h>
151#include <linux/fcntl.h>
152#include <linux/interrupt.h>
153#include <linux/ioport.h>
154#include <linux/in.h>
155#include <linux/string.h>
156#include <linux/errno.h>
157#include <linux/init.h>
158#include <linux/spinlock.h>
159#include <linux/netdevice.h>
160#include <linux/etherdevice.h>
161#include <linux/skbuff.h>
162#include <linux/bitops.h>
163#include <linux/jiffies.h>
164#include <linux/io.h>
165
166#include <asm/dma.h>
167
168
169
170/* Few macros */
171#define BITSET(ioaddr, bnum)   ((outb(((inb(ioaddr)) | (bnum)), ioaddr)))
172#define BITCLR(ioaddr, bnum)   ((outb(((inb(ioaddr)) & (~(bnum))), ioaddr)))
173
174/* This is the I/O address space for Etherteam 16i adapter. */
175#define ETH16I_IO_EXTENT       32
176
177/* Ticks before deciding that transmit has timed out */
178#define TX_TIMEOUT             (400*HZ/1000)
179
180/* Maximum loop count when receiving packets */
181#define MAX_RX_LOOP            20
182
183/* Some interrupt masks */
184#define ETH16I_INTR_ON	       0xef8a       /* Higher is receive mask */
185#define ETH16I_INTR_OFF	       0x0000
186
187/* Buffers header status byte meanings */
188#define PKT_GOOD               BIT(5)
189#define PKT_GOOD_RMT           BIT(4)
190#define PKT_SHORT              BIT(3)
191#define PKT_ALIGN_ERR          BIT(2)
192#define PKT_CRC_ERR            BIT(1)
193#define PKT_RX_BUF_OVERFLOW    BIT(0)
194
195/* Transmit status register (DLCR0) */
196#define TX_STATUS_REG          0
197#define TX_DONE                BIT(7)
198#define NET_BUSY               BIT(6)
199#define TX_PKT_RCD             BIT(5)
200#define CR_LOST                BIT(4)
201#define TX_JABBER_ERR	       BIT(3)
202#define COLLISION              BIT(2)
203#define COLLISIONS_16          BIT(1)
204
205/* Receive status register (DLCR1) */
206#define RX_STATUS_REG          1
207#define RX_PKT                 BIT(7)  /* Packet received */
208#define BUS_RD_ERR             BIT(6)
209#define SHORT_PKT_ERR          BIT(3)
210#define ALIGN_ERR              BIT(2)
211#define CRC_ERR                BIT(1)
212#define RX_BUF_OVERFLOW        BIT(0)
213
214/* Transmit Interrupt Enable Register (DLCR2) */
215#define TX_INTR_REG            2
216#define TX_INTR_DONE           BIT(7)
217#define TX_INTR_COL            BIT(2)
218#define TX_INTR_16_COL         BIT(1)
219
220/* Receive Interrupt Enable Register (DLCR3) */
221#define RX_INTR_REG            3
222#define RX_INTR_RECEIVE        BIT(7)
223#define RX_INTR_SHORT_PKT      BIT(3)
224#define RX_INTR_CRC_ERR        BIT(1)
225#define RX_INTR_BUF_OVERFLOW   BIT(0)
226
227/* Transmit Mode Register (DLCR4) */
228#define TRANSMIT_MODE_REG      4
229#define LOOPBACK_CONTROL       BIT(1)
230#define CONTROL_OUTPUT         BIT(2)
231
232/* Receive Mode Register (DLCR5) */
233#define RECEIVE_MODE_REG       5
234#define RX_BUFFER_EMPTY        BIT(6)
235#define ACCEPT_BAD_PACKETS     BIT(5)
236#define RECEIVE_SHORT_ADDR     BIT(4)
237#define ACCEPT_SHORT_PACKETS   BIT(3)
238#define REMOTE_RESET           BIT(2)
239
240#define ADDRESS_FILTER_MODE    BIT(1) | BIT(0)
241#define REJECT_ALL             0
242#define ACCEPT_ALL             3
243#define MODE_1                 1            /* NODE ID, BC, MC, 2-24th bit */
244#define MODE_2                 2            /* NODE ID, BC, MC, Hash Table */
245
246/* Configuration Register 0 (DLCR6) */
247#define CONFIG_REG_0           6
248#define DLC_EN                 BIT(7)
249#define SRAM_CYCLE_TIME_100NS  BIT(6)
250#define SYSTEM_BUS_WIDTH_8     BIT(5)       /* 1 = 8bit, 0 = 16bit */
251#define BUFFER_WIDTH_8         BIT(4)       /* 1 = 8bit, 0 = 16bit */
252#define TBS1                   BIT(3)
253#define TBS0                   BIT(2)
254#define SRAM_BS1               BIT(1)       /* 00=8kb,  01=16kb  */
255#define SRAM_BS0               BIT(0)       /* 10=32kb, 11=64kb  */
256
257#ifndef ETH16I_TX_BUF_SIZE                   /* 0 = 2kb, 1 = 4kb  */
258#define ETH16I_TX_BUF_SIZE     3             /* 2 = 8kb, 3 = 16kb */
259#endif
260#define TX_BUF_1x2048          0
261#define TX_BUF_2x2048          1
262#define TX_BUF_2x4098          2
263#define TX_BUF_2x8192          3
264
265/* Configuration Register 1 (DLCR7) */
266#define CONFIG_REG_1           7
267#define POWERUP                BIT(5)
268
269/* Transmit start register */
270#define TRANSMIT_START_REG     10
271#define TRANSMIT_START_RB      2
272#define TX_START               BIT(7)       /* Rest of register bit indicate*/
273                                            /* number of packets in tx buffer*/
274/* Node ID registers (DLCR8-13) */
275#define NODE_ID_0              8
276#define NODE_ID_RB             0
277
278/* Hash Table registers (HT8-15) */
279#define HASH_TABLE_0           8
280#define HASH_TABLE_RB          1
281
282/* Buffer memory ports */
283#define BUFFER_MEM_PORT_LB     8
284#define DATAPORT               BUFFER_MEM_PORT_LB
285#define BUFFER_MEM_PORT_HB     9
286
287/* 16 Collision control register (BMPR11) */
288#define COL_16_REG             11
289#define HALT_ON_16             0x00
290#define RETRANS_AND_HALT_ON_16 0x02
291
292/* Maximum number of attempts to send after 16 concecutive collisions */
293#define MAX_COL_16	       10
294
295/* DMA Burst and Transceiver Mode Register (BMPR13) */
296#define TRANSCEIVER_MODE_REG   13
297#define TRANSCEIVER_MODE_RB    2
298#define IO_BASE_UNLOCK	       BIT(7)
299#define LOWER_SQUELCH_TRESH    BIT(6)
300#define LINK_TEST_DISABLE      BIT(5)
301#define AUI_SELECT             BIT(4)
302#define DIS_AUTO_PORT_SEL      BIT(3)
303
304/* Filter Self Receive Register (BMPR14)  */
305#define FILTER_SELF_RX_REG     14
306#define SKIP_RX_PACKET         BIT(2)
307#define FILTER_SELF_RECEIVE    BIT(0)
308
309/* EEPROM Control Register (BMPR 16) */
310#define EEPROM_CTRL_REG        16
311
312/* EEPROM Data Register (BMPR 17) */
313#define EEPROM_DATA_REG        17
314
315/* NMC93CSx6 EEPROM Control Bits */
316#define CS_0                   0x00
317#define CS_1                   0x20
318#define SK_0                   0x00
319#define SK_1                   0x40
320#define DI_0                   0x00
321#define DI_1                   0x80
322
323/* NMC93CSx6 EEPROM Instructions */
324#define EEPROM_READ            0x80
325
326/* NMC93CSx6 EEPROM Addresses */
327#define E_NODEID_0             0x02
328#define E_NODEID_1             0x03
329#define E_NODEID_2             0x04
330#define E_PORT_SELECT          0x14
331  #define E_PORT_BNC           0x00
332  #define E_PORT_DIX           0x01
333  #define E_PORT_TP            0x02
334  #define E_PORT_AUTO          0x03
335  #define E_PORT_FROM_EPROM    0x04
336#define E_PRODUCT_CFG          0x30
337
338
339/* Macro to slow down io between EEPROM clock transitions */
340#define eeprom_slow_io() do { int _i = 40; while(--_i > 0) { inb(0x80); }}while(0)
341
342/* Jumperless Configuration Register (BMPR19) */
343#define JUMPERLESS_CONFIG      19
344
345/* ID ROM registers, writing to them also resets some parts of chip */
346#define ID_ROM_0               24
347#define ID_ROM_7               31
348#define RESET                  ID_ROM_0
349
350/* This is the I/O address list to be probed when seeking the card */
351static unsigned int eth16i_portlist[] __initdata = {
352	0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300, 0
353};
354
355static unsigned int eth32i_portlist[] __initdata = {
356	0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000, 0x8000,
357	0x9000, 0xA000, 0xB000, 0xC000, 0xD000, 0xE000, 0xF000, 0
358};
359
360/* This is the Interrupt lookup table for Eth16i card */
361static unsigned int eth16i_irqmap[] __initdata = { 9, 10, 5, 15, 0 };
362#define NUM_OF_ISA_IRQS    4
363
364/* This is the Interrupt lookup table for Eth32i card */
365static unsigned int eth32i_irqmap[] __initdata = { 3, 5, 7, 9, 10, 11, 12, 15, 0 };
366#define EISA_IRQ_REG	0xc89
367#define NUM_OF_EISA_IRQS   8
368
369static unsigned int eth16i_tx_buf_map[] = { 2048, 2048, 4096, 8192 };
370
371/* Use 0 for production, 1 for verification, >2 for debug */
372#ifndef ETH16I_DEBUG
373#define ETH16I_DEBUG 0
374#endif
375static unsigned int eth16i_debug = ETH16I_DEBUG;
376
377/* Information for each board */
378
379struct eth16i_local {
380	unsigned char     tx_started;
381	unsigned char     tx_buf_busy;
382	unsigned short    tx_queue;  /* Number of packets in transmit buffer */
383	unsigned short    tx_queue_len;
384	unsigned int      tx_buf_size;
385	unsigned long     open_time;
386	unsigned long     tx_buffered_packets;
387	unsigned long     tx_buffered_bytes;
388	unsigned long     col_16;
389	spinlock_t	  lock;
390};
391
392/* Function prototypes */
393
394static int     eth16i_probe1(struct net_device *dev, int ioaddr);
395static int     eth16i_check_signature(int ioaddr);
396static int     eth16i_probe_port(int ioaddr);
397static void    eth16i_set_port(int ioaddr, int porttype);
398static int     eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l);
399static int     eth16i_receive_probe_packet(int ioaddr);
400static int     eth16i_get_irq(int ioaddr);
401static int     eth16i_read_eeprom(int ioaddr, int offset);
402static int     eth16i_read_eeprom_word(int ioaddr);
403static void    eth16i_eeprom_cmd(int ioaddr, unsigned char command);
404static int     eth16i_open(struct net_device *dev);
405static int     eth16i_close(struct net_device *dev);
406static netdev_tx_t eth16i_tx(struct sk_buff *skb, struct net_device *dev);
407static void    eth16i_rx(struct net_device *dev);
408static void    eth16i_timeout(struct net_device *dev);
409static irqreturn_t eth16i_interrupt(int irq, void *dev_id);
410static void    eth16i_reset(struct net_device *dev);
411static void    eth16i_timeout(struct net_device *dev);
412static void    eth16i_skip_packet(struct net_device *dev);
413static void    eth16i_multicast(struct net_device *dev);
414static void    eth16i_select_regbank(unsigned char regbank, int ioaddr);
415static void    eth16i_initialize(struct net_device *dev, int boot);
416
417#if 0
418static int     eth16i_set_irq(struct net_device *dev);
419#endif
420
421#ifdef MODULE
422static ushort  eth16i_parse_mediatype(const char* s);
423#endif
424
425static char cardname[] __initdata = "ICL EtherTeam 16i/32";
426
427static int __init do_eth16i_probe(struct net_device *dev)
428{
429	int i;
430	int ioaddr;
431	int base_addr = dev->base_addr;
432
433	if(eth16i_debug > 4)
434		printk(KERN_DEBUG "Probing started for %s\n", cardname);
435
436	if(base_addr > 0x1ff)           /* Check only single location */
437		return eth16i_probe1(dev, base_addr);
438	else if(base_addr != 0)         /* Don't probe at all */
439		return -ENXIO;
440
441	/* Seek card from the ISA io address space */
442	for(i = 0; (ioaddr = eth16i_portlist[i]) ; i++)
443		if(eth16i_probe1(dev, ioaddr) == 0)
444			return 0;
445
446	/* Seek card from the EISA io address space */
447	for(i = 0; (ioaddr = eth32i_portlist[i]) ; i++)
448		if(eth16i_probe1(dev, ioaddr) == 0)
449			return 0;
450
451	return -ENODEV;
452}
453
454#ifndef MODULE
455struct net_device * __init eth16i_probe(int unit)
456{
457	struct net_device *dev = alloc_etherdev(sizeof(struct eth16i_local));
458	int err;
459
460	if (!dev)
461		return ERR_PTR(-ENOMEM);
462
463	sprintf(dev->name, "eth%d", unit);
464	netdev_boot_setup_check(dev);
465
466	err = do_eth16i_probe(dev);
467	if (err)
468		goto out;
469	return dev;
470out:
471	free_netdev(dev);
472	return ERR_PTR(err);
473}
474#endif
475
476static const struct net_device_ops eth16i_netdev_ops = {
477	.ndo_open               = eth16i_open,
478	.ndo_stop               = eth16i_close,
479	.ndo_start_xmit    	= eth16i_tx,
480	.ndo_set_rx_mode	= eth16i_multicast,
481	.ndo_tx_timeout 	= eth16i_timeout,
482	.ndo_change_mtu		= eth_change_mtu,
483	.ndo_set_mac_address 	= eth_mac_addr,
484	.ndo_validate_addr	= eth_validate_addr,
485};
486
487static int __init eth16i_probe1(struct net_device *dev, int ioaddr)
488{
489	struct eth16i_local *lp = netdev_priv(dev);
490	static unsigned version_printed;
491	int retval;
492
493	/* Let's grab the region */
494	if (!request_region(ioaddr, ETH16I_IO_EXTENT, cardname))
495		return -EBUSY;
496
497	/*
498	  The MB86985 chip has on register which holds information in which
499	  io address the chip lies. First read this register and compare
500	  it to our current io address and if match then this could
501	  be our chip.
502	  */
503
504	if(ioaddr < 0x1000) {
505		if(eth16i_portlist[(inb(ioaddr + JUMPERLESS_CONFIG) & 0x07)]
506		   != ioaddr) {
507			retval = -ENODEV;
508			goto out;
509		}
510	}
511
512	/* Now we will go a bit deeper and try to find the chip's signature */
513
514	if(eth16i_check_signature(ioaddr) != 0) {
515		retval = -ENODEV;
516		goto out;
517	}
518
519	/*
520	   Now it seems that we have found a ethernet chip in this particular
521	   ioaddr. The MB86985 chip has this feature, that when you read a
522	   certain register it will increase it's io base address to next
523	   configurable slot. Now when we have found the chip, first thing is
524	   to make sure that the chip's ioaddr will hold still here.
525	   */
526
527	eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
528	outb(0x00, ioaddr + TRANSCEIVER_MODE_REG);
529
530	outb(0x00, ioaddr + RESET);             /* Reset some parts of chip */
531	BITSET(ioaddr + CONFIG_REG_0, BIT(7));  /* Disable the data link */
532
533	if( (eth16i_debug & version_printed++) == 0)
534		printk(KERN_INFO "%s", version);
535
536	dev->base_addr = ioaddr;
537	dev->irq = eth16i_get_irq(ioaddr);
538
539	/* Try to obtain interrupt vector */
540
541	if ((retval = request_irq(dev->irq, (void *)&eth16i_interrupt, 0, cardname, dev))) {
542		printk(KERN_WARNING "%s at %#3x, but is unusable due to conflicting IRQ %d.\n",
543		       cardname, ioaddr, dev->irq);
544		goto out;
545	}
546
547	printk(KERN_INFO "%s: %s at %#3x, IRQ %d, ",
548	       dev->name, cardname, ioaddr, dev->irq);
549
550
551	/* Now we will have to lock the chip's io address */
552	eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
553	outb(0x38, ioaddr + TRANSCEIVER_MODE_REG);
554
555	eth16i_initialize(dev, 1); /* Initialize rest of the chip's registers */
556
557	/* Now let's same some energy by shutting down the chip ;) */
558	BITCLR(ioaddr + CONFIG_REG_1, POWERUP);
559
560	/* Initialize the device structure */
561	dev->netdev_ops         = &eth16i_netdev_ops;
562	dev->watchdog_timeo	= TX_TIMEOUT;
563	spin_lock_init(&lp->lock);
564
565	retval = register_netdev(dev);
566	if (retval)
567		goto out1;
568	return 0;
569out1:
570	free_irq(dev->irq, dev);
571out:
572	release_region(ioaddr, ETH16I_IO_EXTENT);
573	return retval;
574}
575
576
577static void eth16i_initialize(struct net_device *dev, int boot)
578{
579	int ioaddr = dev->base_addr;
580	int i, node_w = 0;
581	unsigned char node_byte = 0;
582
583	/* Setup station address */
584	eth16i_select_regbank(NODE_ID_RB, ioaddr);
585	for(i = 0 ; i < 3 ; i++) {
586		unsigned short node_val = eth16i_read_eeprom(ioaddr, E_NODEID_0 + i);
587		((unsigned short *)dev->dev_addr)[i] = ntohs(node_val);
588	}
589
590	for(i = 0; i < 6; i++) {
591		outb( ((unsigned char *)dev->dev_addr)[i], ioaddr + NODE_ID_0 + i);
592		if(boot) {
593			printk("%02x", inb(ioaddr + NODE_ID_0 + i));
594			if(i != 5)
595				printk(":");
596		}
597	}
598
599	/* Now we will set multicast addresses to accept none */
600	eth16i_select_regbank(HASH_TABLE_RB, ioaddr);
601	for(i = 0; i < 8; i++)
602		outb(0x00, ioaddr + HASH_TABLE_0 + i);
603
604	/*
605	  Now let's disable the transmitter and receiver, set the buffer ram
606	  cycle time, bus width and buffer data path width. Also we shall
607	  set transmit buffer size and total buffer size.
608	  */
609
610	eth16i_select_regbank(2, ioaddr);
611
612	node_byte = 0;
613	node_w = eth16i_read_eeprom(ioaddr, E_PRODUCT_CFG);
614
615	if( (node_w & 0xFF00) == 0x0800)
616		node_byte |= BUFFER_WIDTH_8;
617
618	node_byte |= SRAM_BS1;
619
620	if( (node_w & 0x00FF) == 64)
621		node_byte |= SRAM_BS0;
622
623	node_byte |= DLC_EN | SRAM_CYCLE_TIME_100NS | (ETH16I_TX_BUF_SIZE << 2);
624
625	outb(node_byte, ioaddr + CONFIG_REG_0);
626
627	/* We shall halt the transmitting, if 16 collisions are detected */
628	outb(HALT_ON_16, ioaddr + COL_16_REG);
629
630#ifdef MODULE
631	/* if_port already set by init_module() */
632#else
633	dev->if_port = (dev->mem_start < E_PORT_FROM_EPROM) ?
634		dev->mem_start : E_PORT_FROM_EPROM;
635#endif
636
637	/* Set interface port type */
638	if(boot) {
639		static const char * const porttype[] = {
640			"BNC", "DIX", "TP", "AUTO", "FROM_EPROM"
641		};
642
643		switch(dev->if_port)
644		{
645
646		case E_PORT_FROM_EPROM:
647			dev->if_port = eth16i_read_eeprom(ioaddr, E_PORT_SELECT);
648			break;
649
650		case E_PORT_AUTO:
651			dev->if_port = eth16i_probe_port(ioaddr);
652			break;
653
654		case E_PORT_BNC:
655		case E_PORT_TP:
656		case E_PORT_DIX:
657			break;
658		}
659
660		printk(" %s interface.\n", porttype[dev->if_port]);
661
662		eth16i_set_port(ioaddr, dev->if_port);
663	}
664
665	/* Set Receive Mode to normal operation */
666	outb(MODE_2, ioaddr + RECEIVE_MODE_REG);
667}
668
669static int eth16i_probe_port(int ioaddr)
670{
671	int i;
672	int retcode;
673	unsigned char dummy_packet[64];
674
675	/* Powerup the chip */
676	outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
677
678	BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
679
680	eth16i_select_regbank(NODE_ID_RB, ioaddr);
681
682	for(i = 0; i < 6; i++) {
683		dummy_packet[i] = inb(ioaddr + NODE_ID_0 + i);
684		dummy_packet[i+6] = inb(ioaddr + NODE_ID_0 + i);
685	}
686
687	dummy_packet[12] = 0x00;
688	dummy_packet[13] = 0x04;
689	memset(dummy_packet + 14, 0, sizeof(dummy_packet) - 14);
690
691	eth16i_select_regbank(2, ioaddr);
692
693	for(i = 0; i < 3; i++) {
694		BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
695		BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
696		eth16i_set_port(ioaddr, i);
697
698		if(eth16i_debug > 1)
699			printk(KERN_DEBUG "Set port number %d\n", i);
700
701		retcode = eth16i_send_probe_packet(ioaddr, dummy_packet, 64);
702		if(retcode == 0) {
703			retcode = eth16i_receive_probe_packet(ioaddr);
704			if(retcode != -1) {
705				if(eth16i_debug > 1)
706					printk(KERN_DEBUG "Eth16i interface port found at %d\n", i);
707				return i;
708			}
709		}
710		else {
711			if(eth16i_debug > 1)
712				printk(KERN_DEBUG "TRANSMIT_DONE timeout when probing interface port\n");
713		}
714	}
715
716	if( eth16i_debug > 1)
717		printk(KERN_DEBUG "Using default port\n");
718
719	return E_PORT_BNC;
720}
721
722static void eth16i_set_port(int ioaddr, int porttype)
723{
724	unsigned short temp = 0;
725
726	eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
727	outb(LOOPBACK_CONTROL, ioaddr + TRANSMIT_MODE_REG);
728
729	temp |= DIS_AUTO_PORT_SEL;
730
731	switch(porttype) {
732
733	case E_PORT_BNC :
734		temp |= AUI_SELECT;
735		break;
736
737	case E_PORT_TP :
738		break;
739
740	case E_PORT_DIX :
741		temp |= AUI_SELECT;
742		BITSET(ioaddr + TRANSMIT_MODE_REG, CONTROL_OUTPUT);
743		break;
744	}
745
746	outb(temp, ioaddr + TRANSCEIVER_MODE_REG);
747
748	if(eth16i_debug > 1) {
749		printk(KERN_DEBUG "TRANSMIT_MODE_REG = %x\n", inb(ioaddr + TRANSMIT_MODE_REG));
750		printk(KERN_DEBUG "TRANSCEIVER_MODE_REG = %x\n",
751		       inb(ioaddr+TRANSCEIVER_MODE_REG));
752	}
753}
754
755static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
756{
757	unsigned long starttime;
758
759	outb(0xff, ioaddr + TX_STATUS_REG);
760
761	outw(l, ioaddr + DATAPORT);
762	outsw(ioaddr + DATAPORT, (unsigned short *)b, (l + 1) >> 1);
763
764	starttime = jiffies;
765	outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
766
767	while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
768		if( time_after(jiffies, starttime + TX_TIMEOUT)) {
769			return -1;
770		}
771	}
772
773	return 0;
774}
775
776static int eth16i_receive_probe_packet(int ioaddr)
777{
778	unsigned long starttime;
779
780	starttime = jiffies;
781
782	while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
783		if( time_after(jiffies, starttime + TX_TIMEOUT)) {
784
785			if(eth16i_debug > 1)
786				printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
787			starttime = jiffies;
788			while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
789				if( time_after(jiffies, starttime + TX_TIMEOUT)) {
790					if(eth16i_debug > 1)
791						printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
792					return -1;
793				}
794			}
795
796			if(eth16i_debug > 1)
797				printk(KERN_DEBUG "RECEIVE_PACKET\n");
798			return 0; /* Found receive packet */
799		}
800	}
801
802	if(eth16i_debug > 1) {
803		printk(KERN_DEBUG "TRANSMIT_PACKET_RECEIVED %x\n", inb(ioaddr + TX_STATUS_REG));
804		printk(KERN_DEBUG "RX_STATUS_REG = %x\n", inb(ioaddr + RX_STATUS_REG));
805	}
806
807	return 0; /* Return success */
808}
809
810#if 0
811static int eth16i_set_irq(struct net_device* dev)
812{
813	const int ioaddr = dev->base_addr;
814	const int irq = dev->irq;
815	int i = 0;
816
817	if(ioaddr < 0x1000) {
818		while(eth16i_irqmap[i] && eth16i_irqmap[i] != irq)
819			i++;
820
821		if(i < NUM_OF_ISA_IRQS) {
822			u8 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
823			cbyte = (cbyte & 0x3F) | (i << 6);
824			outb(cbyte, ioaddr + JUMPERLESS_CONFIG);
825			return 0;
826		}
827	}
828	else {
829		printk(KERN_NOTICE "%s: EISA Interrupt cannot be set. Use EISA Configuration utility.\n", dev->name);
830	}
831
832	return -1;
833
834}
835#endif
836
837static int __init eth16i_get_irq(int ioaddr)
838{
839	unsigned char cbyte;
840
841	if( ioaddr < 0x1000) {
842		cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
843		return eth16i_irqmap[((cbyte & 0xC0) >> 6)];
844	} else {  /* Oh..the card is EISA so method getting IRQ different */
845		unsigned short index = 0;
846		cbyte = inb(ioaddr + EISA_IRQ_REG);
847		while( (cbyte & 0x01) == 0) {
848			cbyte = cbyte >> 1;
849			index++;
850		}
851		return eth32i_irqmap[index];
852	}
853}
854
855static int __init eth16i_check_signature(int ioaddr)
856{
857	int i;
858	unsigned char creg[4] = { 0 };
859
860	for(i = 0; i < 4 ; i++) {
861
862		creg[i] = inb(ioaddr + TRANSMIT_MODE_REG + i);
863
864		if(eth16i_debug > 1)
865			printk("eth16i: read signature byte %x at %x\n",
866			       creg[i],
867			       ioaddr + TRANSMIT_MODE_REG + i);
868	}
869
870	creg[0] &= 0x0F;      /* Mask collision cnr */
871	creg[2] &= 0x7F;      /* Mask DCLEN bit */
872
873#if 0
874	/*
875	   This was removed because the card was sometimes left to state
876	   from which it couldn't be find anymore. If there is need
877	   to more strict check still this have to be fixed.
878	   */
879	if( ! ((creg[0] == 0x06) && (creg[1] == 0x41)) ) {
880		if(creg[1] != 0x42)
881			return -1;
882	}
883#endif
884
885	if( !((creg[2] == 0x36) && (creg[3] == 0xE0)) ) {
886		creg[2] &= 0x40;
887		creg[3] &= 0x03;
888
889		if( !((creg[2] == 0x40) && (creg[3] == 0x00)) )
890			return -1;
891	}
892
893	if(eth16i_read_eeprom(ioaddr, E_NODEID_0) != 0)
894		return -1;
895
896	if((eth16i_read_eeprom(ioaddr, E_NODEID_1) & 0xFF00) != 0x4B00)
897		return -1;
898
899	return 0;
900}
901
902static int eth16i_read_eeprom(int ioaddr, int offset)
903{
904	int data = 0;
905
906	eth16i_eeprom_cmd(ioaddr, EEPROM_READ | offset);
907	outb(CS_1, ioaddr + EEPROM_CTRL_REG);
908	data = eth16i_read_eeprom_word(ioaddr);
909	outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
910
911	return data;
912}
913
914static int eth16i_read_eeprom_word(int ioaddr)
915{
916	int i;
917	int data = 0;
918
919	for(i = 16; i > 0; i--) {
920		outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
921		eeprom_slow_io();
922		outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
923		eeprom_slow_io();
924		data = (data << 1) |
925			((inb(ioaddr + EEPROM_DATA_REG) & DI_1) ? 1 : 0);
926
927		eeprom_slow_io();
928	}
929
930	return data;
931}
932
933static void eth16i_eeprom_cmd(int ioaddr, unsigned char command)
934{
935	int i;
936
937	outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
938	outb(DI_0, ioaddr + EEPROM_DATA_REG);
939	outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
940	outb(DI_1, ioaddr + EEPROM_DATA_REG);
941	outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
942
943	for(i = 7; i >= 0; i--) {
944		short cmd = ( (command & (1 << i)) ? DI_1 : DI_0 );
945		outb(cmd, ioaddr + EEPROM_DATA_REG);
946		outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
947		eeprom_slow_io();
948		outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
949		eeprom_slow_io();
950	}
951}
952
953static int eth16i_open(struct net_device *dev)
954{
955	struct eth16i_local *lp = netdev_priv(dev);
956	int ioaddr = dev->base_addr;
957
958	/* Powerup the chip */
959	outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
960
961	/* Initialize the chip */
962	eth16i_initialize(dev, 0);
963
964	/* Set the transmit buffer size */
965	lp->tx_buf_size = eth16i_tx_buf_map[ETH16I_TX_BUF_SIZE & 0x03];
966
967	if(eth16i_debug > 0)
968		printk(KERN_DEBUG "%s: transmit buffer size %d\n",
969		       dev->name, lp->tx_buf_size);
970
971	/* Now enable Transmitter and Receiver sections */
972	BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
973
974	/* Now switch to register bank 2, for run time operation */
975	eth16i_select_regbank(2, ioaddr);
976
977	lp->open_time = jiffies;
978	lp->tx_started = 0;
979	lp->tx_queue = 0;
980	lp->tx_queue_len = 0;
981
982	/* Turn on interrupts*/
983	outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
984
985	netif_start_queue(dev);
986	return 0;
987}
988
989static int eth16i_close(struct net_device *dev)
990{
991	struct eth16i_local *lp = netdev_priv(dev);
992	int ioaddr = dev->base_addr;
993
994	eth16i_reset(dev);
995
996	/* Turn off interrupts*/
997	outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
998
999	netif_stop_queue(dev);
1000
1001	lp->open_time = 0;
1002
1003	/* Disable transmit and receive */
1004	BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
1005
1006	/* Reset the chip */
1007	/* outb(0xff, ioaddr + RESET); */
1008	/* outw(0xffff, ioaddr + TX_STATUS_REG);    */
1009
1010	outb(0x00, ioaddr + CONFIG_REG_1);
1011
1012	return 0;
1013}
1014
1015static void eth16i_timeout(struct net_device *dev)
1016{
1017	struct eth16i_local *lp = netdev_priv(dev);
1018	int ioaddr = dev->base_addr;
1019	/*
1020	   If we get here, some higher level has decided that
1021	   we are broken. There should really be a "kick me"
1022	   function call instead.
1023	   */
1024
1025	outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1026	printk(KERN_WARNING "%s: transmit timed out with status %04x, %s ?\n",
1027	       dev->name,
1028	inw(ioaddr + TX_STATUS_REG),  (inb(ioaddr + TX_STATUS_REG) & TX_DONE) ?
1029		       "IRQ conflict" : "network cable problem");
1030
1031	dev->trans_start = jiffies; /* prevent tx timeout */
1032
1033	/* Let's dump all registers */
1034	if(eth16i_debug > 0) {
1035		printk(KERN_DEBUG "%s: timeout: %02x %02x %02x %02x %02x %02x %02x %02x.\n",
1036		       dev->name, inb(ioaddr + 0),
1037		       inb(ioaddr + 1), inb(ioaddr + 2),
1038		       inb(ioaddr + 3), inb(ioaddr + 4),
1039		       inb(ioaddr + 5),
1040		       inb(ioaddr + 6), inb(ioaddr + 7));
1041
1042		printk(KERN_DEBUG "%s: transmit start reg: %02x. collision reg %02x\n",
1043		       dev->name, inb(ioaddr + TRANSMIT_START_REG),
1044		       inb(ioaddr + COL_16_REG));
1045			printk(KERN_DEBUG "lp->tx_queue = %d\n", lp->tx_queue);
1046		printk(KERN_DEBUG "lp->tx_queue_len = %d\n", lp->tx_queue_len);
1047		printk(KERN_DEBUG "lp->tx_started = %d\n", lp->tx_started);
1048	}
1049	dev->stats.tx_errors++;
1050	eth16i_reset(dev);
1051	dev->trans_start = jiffies; /* prevent tx timeout */
1052	outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1053	netif_wake_queue(dev);
1054}
1055
1056static netdev_tx_t eth16i_tx(struct sk_buff *skb, struct net_device *dev)
1057{
1058	struct eth16i_local *lp = netdev_priv(dev);
1059	int ioaddr = dev->base_addr;
1060	int status = 0;
1061	ushort length = skb->len;
1062	unsigned char *buf;
1063	unsigned long flags;
1064
1065	if (length < ETH_ZLEN) {
1066		if (skb_padto(skb, ETH_ZLEN))
1067			return NETDEV_TX_OK;
1068		length = ETH_ZLEN;
1069	}
1070	buf = skb->data;
1071
1072	netif_stop_queue(dev);
1073
1074	/* Turn off TX interrupts */
1075	outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1076
1077	/* We would be better doing the disable_irq tricks the 3c509 does,
1078	   that would make this suck a lot less */
1079
1080	spin_lock_irqsave(&lp->lock, flags);
1081
1082	if( (length + 2) > (lp->tx_buf_size - lp->tx_queue_len)) {
1083		if(eth16i_debug > 0)
1084			printk(KERN_WARNING "%s: Transmit buffer full.\n", dev->name);
1085	}
1086	else {
1087		outw(length, ioaddr + DATAPORT);
1088
1089		if( ioaddr < 0x1000 )
1090			outsw(ioaddr + DATAPORT, buf, (length + 1) >> 1);
1091		else {
1092			unsigned char frag = length % 4;
1093			outsl(ioaddr + DATAPORT, buf, length >> 2);
1094			if( frag != 0 ) {
1095				outsw(ioaddr + DATAPORT, (buf + (length & 0xFFFC)), 1);
1096				if( frag == 3 )
1097					outsw(ioaddr + DATAPORT,
1098					      (buf + (length & 0xFFFC) + 2), 1);
1099			}
1100		}
1101		lp->tx_buffered_packets++;
1102		lp->tx_buffered_bytes = length;
1103		lp->tx_queue++;
1104		lp->tx_queue_len += length + 2;
1105	}
1106	lp->tx_buf_busy = 0;
1107
1108	if(lp->tx_started == 0) {
1109		/* If the transmitter is idle..always trigger a transmit */
1110		outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1111		lp->tx_queue = 0;
1112		lp->tx_queue_len = 0;
1113		lp->tx_started = 1;
1114		netif_wake_queue(dev);
1115	}
1116	else if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1117		/* There is still more room for one more packet in tx buffer */
1118		netif_wake_queue(dev);
1119	}
1120
1121	spin_unlock_irqrestore(&lp->lock, flags);
1122
1123	outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1124	/* Turn TX interrupts back on */
1125	/* outb(TX_INTR_DONE | TX_INTR_16_COL, ioaddr + TX_INTR_REG); */
1126	status = 0;
1127	dev_kfree_skb(skb);
1128	return NETDEV_TX_OK;
1129}
1130
1131static void eth16i_rx(struct net_device *dev)
1132{
1133	int ioaddr = dev->base_addr;
1134	int boguscount = MAX_RX_LOOP;
1135
1136	/* Loop until all packets have been read */
1137	while( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) {
1138
1139		/* Read status byte from receive buffer */
1140		ushort status = inw(ioaddr + DATAPORT);
1141
1142		/* Get the size of the packet from receive buffer */
1143		ushort pkt_len = inw(ioaddr + DATAPORT);
1144
1145		if(eth16i_debug > 4)
1146			printk(KERN_DEBUG "%s: Receiving packet mode %02x status %04x.\n",
1147			       dev->name,
1148			       inb(ioaddr + RECEIVE_MODE_REG), status);
1149
1150		if( !(status & PKT_GOOD) ) {
1151			dev->stats.rx_errors++;
1152
1153			if( (pkt_len < ETH_ZLEN) || (pkt_len > ETH_FRAME_LEN) ) {
1154				dev->stats.rx_length_errors++;
1155				eth16i_reset(dev);
1156				return;
1157			}
1158			else {
1159				eth16i_skip_packet(dev);
1160				dev->stats.rx_dropped++;
1161			}
1162		}
1163		else {   /* Ok so now we should have a good packet */
1164			struct sk_buff *skb;
1165
1166			skb = netdev_alloc_skb(dev, pkt_len + 3);
1167			if( skb == NULL ) {
1168				printk(KERN_WARNING "%s: Could'n allocate memory for packet (len %d)\n",
1169				       dev->name, pkt_len);
1170				eth16i_skip_packet(dev);
1171				dev->stats.rx_dropped++;
1172				break;
1173			}
1174
1175			skb_reserve(skb,2);
1176
1177			/*
1178			   Now let's get the packet out of buffer.
1179			   size is (pkt_len + 1) >> 1, cause we are now reading words
1180			   and it have to be even aligned.
1181			   */
1182
1183			if(ioaddr < 0x1000)
1184				insw(ioaddr + DATAPORT, skb_put(skb, pkt_len),
1185				     (pkt_len + 1) >> 1);
1186			else {
1187				unsigned char *buf = skb_put(skb, pkt_len);
1188				unsigned char frag = pkt_len % 4;
1189
1190				insl(ioaddr + DATAPORT, buf, pkt_len >> 2);
1191
1192				if(frag != 0) {
1193					unsigned short rest[2];
1194					rest[0] = inw( ioaddr + DATAPORT );
1195					if(frag == 3)
1196						rest[1] = inw( ioaddr + DATAPORT );
1197
1198					memcpy(buf + (pkt_len & 0xfffc), (char *)rest, frag);
1199				}
1200			}
1201
1202			skb->protocol=eth_type_trans(skb, dev);
1203
1204			if( eth16i_debug > 5 ) {
1205				int i;
1206				printk(KERN_DEBUG "%s: Received packet of length %d.\n",
1207				       dev->name, pkt_len);
1208				for(i = 0; i < 14; i++)
1209					printk(KERN_DEBUG " %02x", skb->data[i]);
1210				printk(KERN_DEBUG ".\n");
1211			}
1212			netif_rx(skb);
1213			dev->stats.rx_packets++;
1214			dev->stats.rx_bytes += pkt_len;
1215
1216		} /* else */
1217
1218		if(--boguscount <= 0)
1219			break;
1220
1221	} /* while */
1222}
1223
1224static irqreturn_t eth16i_interrupt(int irq, void *dev_id)
1225{
1226	struct net_device *dev = dev_id;
1227	struct eth16i_local *lp;
1228	int ioaddr = 0, status;
1229	int handled = 0;
1230
1231	ioaddr = dev->base_addr;
1232	lp = netdev_priv(dev);
1233
1234	/* Turn off all interrupts from adapter */
1235	outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1236
1237	/* eth16i_tx won't be called */
1238	spin_lock(&lp->lock);
1239
1240	status = inw(ioaddr + TX_STATUS_REG);      /* Get the status */
1241	outw(status, ioaddr + TX_STATUS_REG);      /* Clear status bits */
1242
1243	if (status)
1244		handled = 1;
1245
1246	if(eth16i_debug > 3)
1247		printk(KERN_DEBUG "%s: Interrupt with status %04x.\n", dev->name, status);
1248
1249	if( status & 0x7f00 ) {
1250
1251		dev->stats.rx_errors++;
1252
1253		if(status & (BUS_RD_ERR << 8) )
1254			printk(KERN_WARNING "%s: Bus read error.\n",dev->name);
1255		if(status & (SHORT_PKT_ERR << 8) )   dev->stats.rx_length_errors++;
1256		if(status & (ALIGN_ERR << 8) )       dev->stats.rx_frame_errors++;
1257		if(status & (CRC_ERR << 8) )	    dev->stats.rx_crc_errors++;
1258		if(status & (RX_BUF_OVERFLOW << 8) ) dev->stats.rx_over_errors++;
1259	}
1260	if( status & 0x001a) {
1261
1262		dev->stats.tx_errors++;
1263
1264		if(status & CR_LOST) dev->stats.tx_carrier_errors++;
1265		if(status & TX_JABBER_ERR) dev->stats.tx_window_errors++;
1266
1267#if 0
1268		if(status & COLLISION) {
1269			dev->stats.collisions +=
1270				((inb(ioaddr+TRANSMIT_MODE_REG) & 0xF0) >> 4);
1271		}
1272#endif
1273		if(status & COLLISIONS_16) {
1274			if(lp->col_16 < MAX_COL_16) {
1275				lp->col_16++;
1276				dev->stats.collisions++;
1277				/* Resume transmitting, skip failed packet */
1278				outb(0x02, ioaddr + COL_16_REG);
1279			}
1280			else {
1281				printk(KERN_WARNING "%s: bailing out due to many consecutive 16-in-a-row collisions. Network cable problem?\n", dev->name);
1282			}
1283		}
1284	}
1285
1286	if( status & 0x00ff ) {          /* Let's check the transmit status reg */
1287
1288		if(status & TX_DONE) {         /* The transmit has been done */
1289			dev->stats.tx_packets = lp->tx_buffered_packets;
1290			dev->stats.tx_bytes += lp->tx_buffered_bytes;
1291			lp->col_16 = 0;
1292
1293			if(lp->tx_queue) {           /* Is there still packets ? */
1294				/* There was packet(s) so start transmitting and write also
1295				   how many packets there is to be sended */
1296				outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1297				lp->tx_queue = 0;
1298				lp->tx_queue_len = 0;
1299				lp->tx_started = 1;
1300			}
1301			else {
1302				lp->tx_started = 0;
1303			}
1304			netif_wake_queue(dev);
1305		}
1306	}
1307
1308	if( ( status & 0x8000 ) ||
1309	    ( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) ) {
1310		eth16i_rx(dev);  /* We have packet in receive buffer */
1311	}
1312
1313	/* Turn interrupts back on */
1314	outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1315
1316	if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1317		/* There is still more room for one more packet in tx buffer */
1318		netif_wake_queue(dev);
1319	}
1320
1321	spin_unlock(&lp->lock);
1322
1323	return IRQ_RETVAL(handled);
1324}
1325
1326static void eth16i_skip_packet(struct net_device *dev)
1327{
1328	int ioaddr = dev->base_addr;
1329
1330	inw(ioaddr + DATAPORT);
1331	inw(ioaddr + DATAPORT);
1332	inw(ioaddr + DATAPORT);
1333
1334	outb(SKIP_RX_PACKET, ioaddr + FILTER_SELF_RX_REG);
1335	while( inb( ioaddr + FILTER_SELF_RX_REG ) != 0);
1336}
1337
1338static void eth16i_reset(struct net_device *dev)
1339{
1340	struct eth16i_local *lp = netdev_priv(dev);
1341	int ioaddr = dev->base_addr;
1342
1343	if(eth16i_debug > 1)
1344		printk(KERN_DEBUG "%s: Resetting device.\n", dev->name);
1345
1346	BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
1347	outw(0xffff, ioaddr + TX_STATUS_REG);
1348	eth16i_select_regbank(2, ioaddr);
1349
1350	lp->tx_started = 0;
1351	lp->tx_buf_busy = 0;
1352	lp->tx_queue = 0;
1353	lp->tx_queue_len = 0;
1354	BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
1355}
1356
1357static void eth16i_multicast(struct net_device *dev)
1358{
1359	int ioaddr = dev->base_addr;
1360
1361	if (!netdev_mc_empty(dev) || dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
1362	{
1363		outb(3, ioaddr + RECEIVE_MODE_REG);
1364	} else {
1365		outb(2, ioaddr + RECEIVE_MODE_REG);
1366	}
1367}
1368
1369static void eth16i_select_regbank(unsigned char banknbr, int ioaddr)
1370{
1371	unsigned char data;
1372
1373	data = inb(ioaddr + CONFIG_REG_1);
1374	outb( ((data & 0xF3) | ( (banknbr & 0x03) << 2)), ioaddr + CONFIG_REG_1);
1375}
1376
1377#ifdef MODULE
1378
1379static ushort eth16i_parse_mediatype(const char* s)
1380{
1381	if(!s)
1382		return E_PORT_FROM_EPROM;
1383
1384        if (!strncmp(s, "bnc", 3))
1385		return E_PORT_BNC;
1386        else if (!strncmp(s, "tp", 2))
1387                return E_PORT_TP;
1388        else if (!strncmp(s, "dix", 3))
1389                return E_PORT_DIX;
1390        else if (!strncmp(s, "auto", 4))
1391		return E_PORT_AUTO;
1392	else
1393		return E_PORT_FROM_EPROM;
1394}
1395
1396#define MAX_ETH16I_CARDS 4  /* Max number of Eth16i cards per module */
1397
1398static struct net_device *dev_eth16i[MAX_ETH16I_CARDS];
1399static int io[MAX_ETH16I_CARDS];
1400#if 0
1401static int irq[MAX_ETH16I_CARDS];
1402#endif
1403static char* mediatype[MAX_ETH16I_CARDS];
1404static int debug = -1;
1405
1406MODULE_AUTHOR("Mika Kuoppala <miku@iki.fi>");
1407MODULE_DESCRIPTION("ICL EtherTeam 16i/32 driver");
1408MODULE_LICENSE("GPL");
1409
1410
1411module_param_array(io, int, NULL, 0);
1412MODULE_PARM_DESC(io, "eth16i I/O base address(es)");
1413
1414#if 0
1415module_param_array(irq, int, NULL, 0);
1416MODULE_PARM_DESC(irq, "eth16i interrupt request number");
1417#endif
1418
1419module_param_array(mediatype, charp, NULL, 0);
1420MODULE_PARM_DESC(mediatype, "eth16i media type of interface(s) (bnc,tp,dix,auto,eprom)");
1421
1422module_param(debug, int, 0);
1423MODULE_PARM_DESC(debug, "eth16i debug level (0-6)");
1424
1425int __init init_module(void)
1426{
1427	int this_dev, found = 0;
1428	struct net_device *dev;
1429
1430	for (this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1431		dev = alloc_etherdev(sizeof(struct eth16i_local));
1432		if (!dev)
1433			break;
1434
1435		dev->base_addr = io[this_dev];
1436
1437	        if(debug != -1)
1438			eth16i_debug = debug;
1439
1440		if(eth16i_debug > 1)
1441			printk(KERN_NOTICE "eth16i(%d): interface type %s\n", this_dev, mediatype[this_dev] ? mediatype[this_dev] : "none" );
1442
1443		dev->if_port = eth16i_parse_mediatype(mediatype[this_dev]);
1444
1445		if(io[this_dev] == 0) {
1446			if (this_dev != 0) { /* Only autoprobe 1st one */
1447				free_netdev(dev);
1448				break;
1449			}
1450
1451			printk(KERN_NOTICE "eth16i.c: Presently autoprobing (not recommended) for a single card.\n");
1452		}
1453
1454		if (do_eth16i_probe(dev) == 0) {
1455			dev_eth16i[found++] = dev;
1456			continue;
1457		}
1458		printk(KERN_WARNING "eth16i.c No Eth16i card found (i/o = 0x%x).\n",
1459		       io[this_dev]);
1460		free_netdev(dev);
1461		break;
1462	}
1463	if (found)
1464		return 0;
1465	return -ENXIO;
1466}
1467
1468void __exit cleanup_module(void)
1469{
1470	int this_dev;
1471
1472	for(this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1473		struct net_device *dev = dev_eth16i[this_dev];
1474
1475		if (netdev_priv(dev)) {
1476			unregister_netdev(dev);
1477			free_irq(dev->irq, dev);
1478			release_region(dev->base_addr, ETH16I_IO_EXTENT);
1479			free_netdev(dev);
1480		}
1481	}
1482}
1483#endif /* MODULE */
1484