1/* 2 * Copyright (C) 2003 - 2009 NetXen, Inc. 3 * Copyright (C) 2009 - QLogic Corporation. 4 * All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, 19 * MA 02111-1307, USA. 20 * 21 * The full GNU General Public License is included in this distribution 22 * in the file called "COPYING". 23 * 24 */ 25 26#include <linux/netdevice.h> 27#include <linux/delay.h> 28#include <linux/slab.h> 29#include <linux/if_vlan.h> 30#include "netxen_nic.h" 31#include "netxen_nic_hw.h" 32 33struct crb_addr_pair { 34 u32 addr; 35 u32 data; 36}; 37 38#define NETXEN_MAX_CRB_XFORM 60 39static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; 40#define NETXEN_ADDR_ERROR (0xffffffff) 41 42#define crb_addr_transform(name) \ 43 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \ 44 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20 45 46#define NETXEN_NIC_XDMA_RESET 0x8000ff 47 48static void 49netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 50 struct nx_host_rds_ring *rds_ring); 51static int netxen_p3_has_mn(struct netxen_adapter *adapter); 52 53static void crb_addr_transform_setup(void) 54{ 55 crb_addr_transform(XDMA); 56 crb_addr_transform(TIMR); 57 crb_addr_transform(SRE); 58 crb_addr_transform(SQN3); 59 crb_addr_transform(SQN2); 60 crb_addr_transform(SQN1); 61 crb_addr_transform(SQN0); 62 crb_addr_transform(SQS3); 63 crb_addr_transform(SQS2); 64 crb_addr_transform(SQS1); 65 crb_addr_transform(SQS0); 66 crb_addr_transform(RPMX7); 67 crb_addr_transform(RPMX6); 68 crb_addr_transform(RPMX5); 69 crb_addr_transform(RPMX4); 70 crb_addr_transform(RPMX3); 71 crb_addr_transform(RPMX2); 72 crb_addr_transform(RPMX1); 73 crb_addr_transform(RPMX0); 74 crb_addr_transform(ROMUSB); 75 crb_addr_transform(SN); 76 crb_addr_transform(QMN); 77 crb_addr_transform(QMS); 78 crb_addr_transform(PGNI); 79 crb_addr_transform(PGND); 80 crb_addr_transform(PGN3); 81 crb_addr_transform(PGN2); 82 crb_addr_transform(PGN1); 83 crb_addr_transform(PGN0); 84 crb_addr_transform(PGSI); 85 crb_addr_transform(PGSD); 86 crb_addr_transform(PGS3); 87 crb_addr_transform(PGS2); 88 crb_addr_transform(PGS1); 89 crb_addr_transform(PGS0); 90 crb_addr_transform(PS); 91 crb_addr_transform(PH); 92 crb_addr_transform(NIU); 93 crb_addr_transform(I2Q); 94 crb_addr_transform(EG); 95 crb_addr_transform(MN); 96 crb_addr_transform(MS); 97 crb_addr_transform(CAS2); 98 crb_addr_transform(CAS1); 99 crb_addr_transform(CAS0); 100 crb_addr_transform(CAM); 101 crb_addr_transform(C2C1); 102 crb_addr_transform(C2C0); 103 crb_addr_transform(SMB); 104 crb_addr_transform(OCM0); 105 crb_addr_transform(I2C0); 106} 107 108void netxen_release_rx_buffers(struct netxen_adapter *adapter) 109{ 110 struct netxen_recv_context *recv_ctx; 111 struct nx_host_rds_ring *rds_ring; 112 struct netxen_rx_buffer *rx_buf; 113 int i, ring; 114 115 recv_ctx = &adapter->recv_ctx; 116 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 117 rds_ring = &recv_ctx->rds_rings[ring]; 118 for (i = 0; i < rds_ring->num_desc; ++i) { 119 rx_buf = &(rds_ring->rx_buf_arr[i]); 120 if (rx_buf->state == NETXEN_BUFFER_FREE) 121 continue; 122 pci_unmap_single(adapter->pdev, 123 rx_buf->dma, 124 rds_ring->dma_size, 125 PCI_DMA_FROMDEVICE); 126 if (rx_buf->skb != NULL) 127 dev_kfree_skb_any(rx_buf->skb); 128 } 129 } 130} 131 132void netxen_release_tx_buffers(struct netxen_adapter *adapter) 133{ 134 struct netxen_cmd_buffer *cmd_buf; 135 struct netxen_skb_frag *buffrag; 136 int i, j; 137 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 138 139 cmd_buf = tx_ring->cmd_buf_arr; 140 for (i = 0; i < tx_ring->num_desc; i++) { 141 buffrag = cmd_buf->frag_array; 142 if (buffrag->dma) { 143 pci_unmap_single(adapter->pdev, buffrag->dma, 144 buffrag->length, PCI_DMA_TODEVICE); 145 buffrag->dma = 0ULL; 146 } 147 for (j = 0; j < cmd_buf->frag_count; j++) { 148 buffrag++; 149 if (buffrag->dma) { 150 pci_unmap_page(adapter->pdev, buffrag->dma, 151 buffrag->length, 152 PCI_DMA_TODEVICE); 153 buffrag->dma = 0ULL; 154 } 155 } 156 if (cmd_buf->skb) { 157 dev_kfree_skb_any(cmd_buf->skb); 158 cmd_buf->skb = NULL; 159 } 160 cmd_buf++; 161 } 162} 163 164void netxen_free_sw_resources(struct netxen_adapter *adapter) 165{ 166 struct netxen_recv_context *recv_ctx; 167 struct nx_host_rds_ring *rds_ring; 168 struct nx_host_tx_ring *tx_ring; 169 int ring; 170 171 recv_ctx = &adapter->recv_ctx; 172 173 if (recv_ctx->rds_rings == NULL) 174 goto skip_rds; 175 176 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 177 rds_ring = &recv_ctx->rds_rings[ring]; 178 vfree(rds_ring->rx_buf_arr); 179 rds_ring->rx_buf_arr = NULL; 180 } 181 kfree(recv_ctx->rds_rings); 182 183skip_rds: 184 if (adapter->tx_ring == NULL) 185 return; 186 187 tx_ring = adapter->tx_ring; 188 vfree(tx_ring->cmd_buf_arr); 189 kfree(tx_ring); 190 adapter->tx_ring = NULL; 191} 192 193int netxen_alloc_sw_resources(struct netxen_adapter *adapter) 194{ 195 struct netxen_recv_context *recv_ctx; 196 struct nx_host_rds_ring *rds_ring; 197 struct nx_host_sds_ring *sds_ring; 198 struct nx_host_tx_ring *tx_ring; 199 struct netxen_rx_buffer *rx_buf; 200 int ring, i, size; 201 202 struct netxen_cmd_buffer *cmd_buf_arr; 203 struct net_device *netdev = adapter->netdev; 204 struct pci_dev *pdev = adapter->pdev; 205 206 size = sizeof(struct nx_host_tx_ring); 207 tx_ring = kzalloc(size, GFP_KERNEL); 208 if (tx_ring == NULL) { 209 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n", 210 netdev->name); 211 return -ENOMEM; 212 } 213 adapter->tx_ring = tx_ring; 214 215 tx_ring->num_desc = adapter->num_txd; 216 tx_ring->txq = netdev_get_tx_queue(netdev, 0); 217 218 cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring)); 219 if (cmd_buf_arr == NULL) { 220 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n", 221 netdev->name); 222 goto err_out; 223 } 224 tx_ring->cmd_buf_arr = cmd_buf_arr; 225 226 recv_ctx = &adapter->recv_ctx; 227 228 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring); 229 rds_ring = kzalloc(size, GFP_KERNEL); 230 if (rds_ring == NULL) { 231 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n", 232 netdev->name); 233 goto err_out; 234 } 235 recv_ctx->rds_rings = rds_ring; 236 237 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 238 rds_ring = &recv_ctx->rds_rings[ring]; 239 switch (ring) { 240 case RCV_RING_NORMAL: 241 rds_ring->num_desc = adapter->num_rxd; 242 if (adapter->ahw.cut_through) { 243 rds_ring->dma_size = 244 NX_CT_DEFAULT_RX_BUF_LEN; 245 rds_ring->skb_size = 246 NX_CT_DEFAULT_RX_BUF_LEN; 247 } else { 248 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 249 rds_ring->dma_size = 250 NX_P3_RX_BUF_MAX_LEN; 251 else 252 rds_ring->dma_size = 253 NX_P2_RX_BUF_MAX_LEN; 254 rds_ring->skb_size = 255 rds_ring->dma_size + NET_IP_ALIGN; 256 } 257 break; 258 259 case RCV_RING_JUMBO: 260 rds_ring->num_desc = adapter->num_jumbo_rxd; 261 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 262 rds_ring->dma_size = 263 NX_P3_RX_JUMBO_BUF_MAX_LEN; 264 else 265 rds_ring->dma_size = 266 NX_P2_RX_JUMBO_BUF_MAX_LEN; 267 268 if (adapter->capabilities & NX_CAP0_HW_LRO) 269 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA; 270 271 rds_ring->skb_size = 272 rds_ring->dma_size + NET_IP_ALIGN; 273 break; 274 275 case RCV_RING_LRO: 276 rds_ring->num_desc = adapter->num_lro_rxd; 277 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH; 278 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; 279 break; 280 281 } 282 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring)); 283 if (rds_ring->rx_buf_arr == NULL) 284 /* free whatever was already allocated */ 285 goto err_out; 286 287 INIT_LIST_HEAD(&rds_ring->free_list); 288 /* 289 * Now go through all of them, set reference handles 290 * and put them in the queues. 291 */ 292 rx_buf = rds_ring->rx_buf_arr; 293 for (i = 0; i < rds_ring->num_desc; i++) { 294 list_add_tail(&rx_buf->list, 295 &rds_ring->free_list); 296 rx_buf->ref_handle = i; 297 rx_buf->state = NETXEN_BUFFER_FREE; 298 rx_buf++; 299 } 300 spin_lock_init(&rds_ring->lock); 301 } 302 303 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 304 sds_ring = &recv_ctx->sds_rings[ring]; 305 sds_ring->irq = adapter->msix_entries[ring].vector; 306 sds_ring->adapter = adapter; 307 sds_ring->num_desc = adapter->num_rxd; 308 309 for (i = 0; i < NUM_RCV_DESC_RINGS; i++) 310 INIT_LIST_HEAD(&sds_ring->free_list[i]); 311 } 312 313 return 0; 314 315err_out: 316 netxen_free_sw_resources(adapter); 317 return -ENOMEM; 318} 319 320/* 321 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB 322 * address to external PCI CRB address. 323 */ 324static u32 netxen_decode_crb_addr(u32 addr) 325{ 326 int i; 327 u32 base_addr, offset, pci_base; 328 329 crb_addr_transform_setup(); 330 331 pci_base = NETXEN_ADDR_ERROR; 332 base_addr = addr & 0xfff00000; 333 offset = addr & 0x000fffff; 334 335 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) { 336 if (crb_addr_xform[i] == base_addr) { 337 pci_base = i << 20; 338 break; 339 } 340 } 341 if (pci_base == NETXEN_ADDR_ERROR) 342 return pci_base; 343 else 344 return pci_base + offset; 345} 346 347#define NETXEN_MAX_ROM_WAIT_USEC 100 348 349static int netxen_wait_rom_done(struct netxen_adapter *adapter) 350{ 351 long timeout = 0; 352 long done = 0; 353 354 cond_resched(); 355 356 while (done == 0) { 357 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS); 358 done &= 2; 359 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) { 360 dev_err(&adapter->pdev->dev, 361 "Timeout reached waiting for rom done"); 362 return -EIO; 363 } 364 udelay(1); 365 } 366 return 0; 367} 368 369static int do_rom_fast_read(struct netxen_adapter *adapter, 370 int addr, int *valp) 371{ 372 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); 373 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 374 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); 375 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); 376 if (netxen_wait_rom_done(adapter)) { 377 printk("Error waiting for rom done\n"); 378 return -EIO; 379 } 380 /* reset abyte_cnt and dummy_byte_cnt */ 381 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); 382 udelay(10); 383 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 384 385 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA); 386 return 0; 387} 388 389static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 390 u8 *bytes, size_t size) 391{ 392 int addridx; 393 int ret = 0; 394 395 for (addridx = addr; addridx < (addr + size); addridx += 4) { 396 int v; 397 ret = do_rom_fast_read(adapter, addridx, &v); 398 if (ret != 0) 399 break; 400 *(__le32 *)bytes = cpu_to_le32(v); 401 bytes += 4; 402 } 403 404 return ret; 405} 406 407int 408netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 409 u8 *bytes, size_t size) 410{ 411 int ret; 412 413 ret = netxen_rom_lock(adapter); 414 if (ret < 0) 415 return ret; 416 417 ret = do_rom_fast_read_words(adapter, addr, bytes, size); 418 419 netxen_rom_unlock(adapter); 420 return ret; 421} 422 423int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) 424{ 425 int ret; 426 427 if (netxen_rom_lock(adapter) != 0) 428 return -EIO; 429 430 ret = do_rom_fast_read(adapter, addr, valp); 431 netxen_rom_unlock(adapter); 432 return ret; 433} 434 435#define NETXEN_BOARDTYPE 0x4008 436#define NETXEN_BOARDNUM 0x400c 437#define NETXEN_CHIPNUM 0x4010 438 439int netxen_pinit_from_rom(struct netxen_adapter *adapter) 440{ 441 int addr, val; 442 int i, n, init_delay = 0; 443 struct crb_addr_pair *buf; 444 unsigned offset; 445 u32 off; 446 447 /* resetall */ 448 netxen_rom_lock(adapter); 449 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xfeffffff); 450 netxen_rom_unlock(adapter); 451 452 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 453 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 454 (n != 0xcafecafe) || 455 netxen_rom_fast_read(adapter, 4, &n) != 0) { 456 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 457 "n: %08x\n", netxen_nic_driver_name, n); 458 return -EIO; 459 } 460 offset = n & 0xffffU; 461 n = (n >> 16) & 0xffffU; 462 } else { 463 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 464 !(n & 0x80000000)) { 465 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 466 "n: %08x\n", netxen_nic_driver_name, n); 467 return -EIO; 468 } 469 offset = 1; 470 n &= ~0x80000000; 471 } 472 473 if (n >= 1024) { 474 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not" 475 " initialized.\n", __func__, n); 476 return -EIO; 477 } 478 479 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); 480 if (buf == NULL) 481 return -ENOMEM; 482 483 for (i = 0; i < n; i++) { 484 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 || 485 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) { 486 kfree(buf); 487 return -EIO; 488 } 489 490 buf[i].addr = addr; 491 buf[i].data = val; 492 493 } 494 495 for (i = 0; i < n; i++) { 496 497 off = netxen_decode_crb_addr(buf[i].addr); 498 if (off == NETXEN_ADDR_ERROR) { 499 printk(KERN_ERR"CRB init value out of range %x\n", 500 buf[i].addr); 501 continue; 502 } 503 off += NETXEN_PCI_CRBSPACE; 504 505 if (off & 1) 506 continue; 507 508 /* skipping cold reboot MAGIC */ 509 if (off == NETXEN_CAM_RAM(0x1fc)) 510 continue; 511 512 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 513 if (off == (NETXEN_CRB_I2C0 + 0x1c)) 514 continue; 515 /* do not reset PCI */ 516 if (off == (ROMUSB_GLB + 0xbc)) 517 continue; 518 if (off == (ROMUSB_GLB + 0xa8)) 519 continue; 520 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */ 521 continue; 522 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */ 523 continue; 524 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */ 525 continue; 526 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET) 527 continue; 528 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) && 529 !NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 530 buf[i].data = 0x1020; 531 /* skip the function enable register */ 532 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION)) 533 continue; 534 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2)) 535 continue; 536 if ((off & 0x0ff00000) == NETXEN_CRB_SMB) 537 continue; 538 } 539 540 init_delay = 1; 541 /* After writing this register, HW needs time for CRB */ 542 /* to quiet down (else crb_window returns 0xffffffff) */ 543 if (off == NETXEN_ROMUSB_GLB_SW_RESET) { 544 init_delay = 1000; 545 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 546 /* hold xdma in reset also */ 547 buf[i].data = NETXEN_NIC_XDMA_RESET; 548 buf[i].data = 0x8000ff; 549 } 550 } 551 552 NXWR32(adapter, off, buf[i].data); 553 554 msleep(init_delay); 555 } 556 kfree(buf); 557 558 /* disable_peg_cache_all */ 559 560 /* unreset_net_cache */ 561 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 562 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET); 563 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f)); 564 } 565 566 /* p2dn replyCount */ 567 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e); 568 /* disable_peg_cache 0 */ 569 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8); 570 /* disable_peg_cache 1 */ 571 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8); 572 573 /* peg_clr_all */ 574 575 /* peg_clr 0 */ 576 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0); 577 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0); 578 /* peg_clr 1 */ 579 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0); 580 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0); 581 /* peg_clr 2 */ 582 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0); 583 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0); 584 /* peg_clr 3 */ 585 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0); 586 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0); 587 return 0; 588} 589 590static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section) 591{ 592 uint32_t i; 593 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 594 __le32 entries = cpu_to_le32(directory->num_entries); 595 596 for (i = 0; i < entries; i++) { 597 598 __le32 offs = cpu_to_le32(directory->findex) + 599 (i * cpu_to_le32(directory->entry_size)); 600 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8)); 601 602 if (tab_type == section) 603 return (struct uni_table_desc *) &unirom[offs]; 604 } 605 606 return NULL; 607} 608 609#define QLCNIC_FILEHEADER_SIZE (14 * 4) 610 611static int 612netxen_nic_validate_header(struct netxen_adapter *adapter) 613 { 614 const u8 *unirom = adapter->fw->data; 615 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 616 u32 fw_file_size = adapter->fw->size; 617 u32 tab_size; 618 __le32 entries; 619 __le32 entry_size; 620 621 if (fw_file_size < QLCNIC_FILEHEADER_SIZE) 622 return -EINVAL; 623 624 entries = cpu_to_le32(directory->num_entries); 625 entry_size = cpu_to_le32(directory->entry_size); 626 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size); 627 628 if (fw_file_size < tab_size) 629 return -EINVAL; 630 631 return 0; 632} 633 634static int 635netxen_nic_validate_bootld(struct netxen_adapter *adapter) 636{ 637 struct uni_table_desc *tab_desc; 638 struct uni_data_desc *descr; 639 const u8 *unirom = adapter->fw->data; 640 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 641 NX_UNI_BOOTLD_IDX_OFF)); 642 u32 offs; 643 u32 tab_size; 644 u32 data_size; 645 646 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_BOOTLD); 647 648 if (!tab_desc) 649 return -EINVAL; 650 651 tab_size = cpu_to_le32(tab_desc->findex) + 652 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 653 654 if (adapter->fw->size < tab_size) 655 return -EINVAL; 656 657 offs = cpu_to_le32(tab_desc->findex) + 658 (cpu_to_le32(tab_desc->entry_size) * (idx)); 659 descr = (struct uni_data_desc *)&unirom[offs]; 660 661 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 662 663 if (adapter->fw->size < data_size) 664 return -EINVAL; 665 666 return 0; 667} 668 669static int 670netxen_nic_validate_fw(struct netxen_adapter *adapter) 671{ 672 struct uni_table_desc *tab_desc; 673 struct uni_data_desc *descr; 674 const u8 *unirom = adapter->fw->data; 675 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 676 NX_UNI_FIRMWARE_IDX_OFF)); 677 u32 offs; 678 u32 tab_size; 679 u32 data_size; 680 681 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_FW); 682 683 if (!tab_desc) 684 return -EINVAL; 685 686 tab_size = cpu_to_le32(tab_desc->findex) + 687 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 688 689 if (adapter->fw->size < tab_size) 690 return -EINVAL; 691 692 offs = cpu_to_le32(tab_desc->findex) + 693 (cpu_to_le32(tab_desc->entry_size) * (idx)); 694 descr = (struct uni_data_desc *)&unirom[offs]; 695 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 696 697 if (adapter->fw->size < data_size) 698 return -EINVAL; 699 700 return 0; 701} 702 703 704static int 705netxen_nic_validate_product_offs(struct netxen_adapter *adapter) 706{ 707 struct uni_table_desc *ptab_descr; 708 const u8 *unirom = adapter->fw->data; 709 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ? 710 1 : netxen_p3_has_mn(adapter); 711 __le32 entries; 712 __le32 entry_size; 713 u32 tab_size; 714 u32 i; 715 716 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL); 717 if (ptab_descr == NULL) 718 return -EINVAL; 719 720 entries = cpu_to_le32(ptab_descr->num_entries); 721 entry_size = cpu_to_le32(ptab_descr->entry_size); 722 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size); 723 724 if (adapter->fw->size < tab_size) 725 return -EINVAL; 726 727nomn: 728 for (i = 0; i < entries; i++) { 729 730 __le32 flags, file_chiprev, offs; 731 u8 chiprev = adapter->ahw.revision_id; 732 uint32_t flagbit; 733 734 offs = cpu_to_le32(ptab_descr->findex) + 735 (i * cpu_to_le32(ptab_descr->entry_size)); 736 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF)); 737 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] + 738 NX_UNI_CHIP_REV_OFF)); 739 740 flagbit = mn_present ? 1 : 2; 741 742 if ((chiprev == file_chiprev) && 743 ((1ULL << flagbit) & flags)) { 744 adapter->file_prd_off = offs; 745 return 0; 746 } 747 } 748 749 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 750 mn_present = 0; 751 goto nomn; 752 } 753 754 return -EINVAL; 755} 756 757static int 758netxen_nic_validate_unified_romimage(struct netxen_adapter *adapter) 759{ 760 if (netxen_nic_validate_header(adapter)) { 761 dev_err(&adapter->pdev->dev, 762 "unified image: header validation failed\n"); 763 return -EINVAL; 764 } 765 766 if (netxen_nic_validate_product_offs(adapter)) { 767 dev_err(&adapter->pdev->dev, 768 "unified image: product validation failed\n"); 769 return -EINVAL; 770 } 771 772 if (netxen_nic_validate_bootld(adapter)) { 773 dev_err(&adapter->pdev->dev, 774 "unified image: bootld validation failed\n"); 775 return -EINVAL; 776 } 777 778 if (netxen_nic_validate_fw(adapter)) { 779 dev_err(&adapter->pdev->dev, 780 "unified image: firmware validation failed\n"); 781 return -EINVAL; 782 } 783 784 return 0; 785} 786 787static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter, 788 u32 section, u32 idx_offset) 789{ 790 const u8 *unirom = adapter->fw->data; 791 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 792 idx_offset)); 793 struct uni_table_desc *tab_desc; 794 __le32 offs; 795 796 tab_desc = nx_get_table_desc(unirom, section); 797 798 if (tab_desc == NULL) 799 return NULL; 800 801 offs = cpu_to_le32(tab_desc->findex) + 802 (cpu_to_le32(tab_desc->entry_size) * idx); 803 804 return (struct uni_data_desc *)&unirom[offs]; 805} 806 807static u8 * 808nx_get_bootld_offs(struct netxen_adapter *adapter) 809{ 810 u32 offs = NETXEN_BOOTLD_START; 811 812 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 813 offs = cpu_to_le32((nx_get_data_desc(adapter, 814 NX_UNI_DIR_SECT_BOOTLD, 815 NX_UNI_BOOTLD_IDX_OFF))->findex); 816 817 return (u8 *)&adapter->fw->data[offs]; 818} 819 820static u8 * 821nx_get_fw_offs(struct netxen_adapter *adapter) 822{ 823 u32 offs = NETXEN_IMAGE_START; 824 825 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 826 offs = cpu_to_le32((nx_get_data_desc(adapter, 827 NX_UNI_DIR_SECT_FW, 828 NX_UNI_FIRMWARE_IDX_OFF))->findex); 829 830 return (u8 *)&adapter->fw->data[offs]; 831} 832 833static __le32 834nx_get_fw_size(struct netxen_adapter *adapter) 835{ 836 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 837 return cpu_to_le32((nx_get_data_desc(adapter, 838 NX_UNI_DIR_SECT_FW, 839 NX_UNI_FIRMWARE_IDX_OFF))->size); 840 else 841 return cpu_to_le32( 842 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]); 843} 844 845static __le32 846nx_get_fw_version(struct netxen_adapter *adapter) 847{ 848 struct uni_data_desc *fw_data_desc; 849 const struct firmware *fw = adapter->fw; 850 __le32 major, minor, sub; 851 const u8 *ver_str; 852 int i, ret = 0; 853 854 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 855 856 fw_data_desc = nx_get_data_desc(adapter, 857 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF); 858 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) + 859 cpu_to_le32(fw_data_desc->size) - 17; 860 861 for (i = 0; i < 12; i++) { 862 if (!strncmp(&ver_str[i], "REV=", 4)) { 863 ret = sscanf(&ver_str[i+4], "%u.%u.%u ", 864 &major, &minor, &sub); 865 break; 866 } 867 } 868 869 if (ret != 3) 870 return 0; 871 872 return major + (minor << 8) + (sub << 16); 873 874 } else 875 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]); 876} 877 878static __le32 879nx_get_bios_version(struct netxen_adapter *adapter) 880{ 881 const struct firmware *fw = adapter->fw; 882 __le32 bios_ver, prd_off = adapter->file_prd_off; 883 884 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 885 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off]) 886 + NX_UNI_BIOS_VERSION_OFF)); 887 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + 888 (bios_ver >> 24); 889 } else 890 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]); 891 892} 893 894int 895netxen_need_fw_reset(struct netxen_adapter *adapter) 896{ 897 u32 count, old_count; 898 u32 val, version, major, minor, build; 899 int i, timeout; 900 u8 fw_type; 901 902 /* NX2031 firmware doesn't support heartbit */ 903 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 904 return 1; 905 906 if (adapter->need_fw_reset) 907 return 1; 908 909 /* last attempt had failed */ 910 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED) 911 return 1; 912 913 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 914 915 for (i = 0; i < 10; i++) { 916 917 timeout = msleep_interruptible(200); 918 if (timeout) { 919 NXWR32(adapter, CRB_CMDPEG_STATE, 920 PHAN_INITIALIZE_FAILED); 921 return -EINTR; 922 } 923 924 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 925 if (count != old_count) 926 break; 927 } 928 929 /* firmware is dead */ 930 if (count == old_count) 931 return 1; 932 933 /* check if we have got newer or different file firmware */ 934 if (adapter->fw) { 935 936 val = nx_get_fw_version(adapter); 937 938 version = NETXEN_DECODE_VERSION(val); 939 940 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR); 941 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR); 942 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB); 943 944 if (version > NETXEN_VERSION_CODE(major, minor, build)) 945 return 1; 946 947 if (version == NETXEN_VERSION_CODE(major, minor, build) && 948 adapter->fw_type != NX_UNIFIED_ROMIMAGE) { 949 950 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL); 951 fw_type = (val & 0x4) ? 952 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE; 953 954 if (adapter->fw_type != fw_type) 955 return 1; 956 } 957 } 958 959 return 0; 960} 961 962#define NETXEN_MIN_P3_FW_SUPP NETXEN_VERSION_CODE(4, 0, 505) 963 964int 965netxen_check_flash_fw_compatibility(struct netxen_adapter *adapter) 966{ 967 u32 flash_fw_ver, min_fw_ver; 968 969 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 970 return 0; 971 972 if (netxen_rom_fast_read(adapter, 973 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) { 974 dev_err(&adapter->pdev->dev, "Unable to read flash fw" 975 "version\n"); 976 return -EIO; 977 } 978 979 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver); 980 min_fw_ver = NETXEN_MIN_P3_FW_SUPP; 981 if (flash_fw_ver >= min_fw_ver) 982 return 0; 983 984 dev_info(&adapter->pdev->dev, "Flash fw[%d.%d.%d] is < min fw supported" 985 "[4.0.505]. Please update firmware on flash\n", 986 _major(flash_fw_ver), _minor(flash_fw_ver), 987 _build(flash_fw_ver)); 988 return -EINVAL; 989} 990 991static char *fw_name[] = { 992 NX_P2_MN_ROMIMAGE_NAME, 993 NX_P3_CT_ROMIMAGE_NAME, 994 NX_P3_MN_ROMIMAGE_NAME, 995 NX_UNIFIED_ROMIMAGE_NAME, 996 NX_FLASH_ROMIMAGE_NAME, 997}; 998 999int 1000netxen_load_firmware(struct netxen_adapter *adapter) 1001{ 1002 u64 *ptr64; 1003 u32 i, flashaddr, size; 1004 const struct firmware *fw = adapter->fw; 1005 struct pci_dev *pdev = adapter->pdev; 1006 1007 dev_info(&pdev->dev, "loading firmware from %s\n", 1008 fw_name[adapter->fw_type]); 1009 1010 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1011 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1); 1012 1013 if (fw) { 1014 __le64 data; 1015 1016 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 1017 1018 ptr64 = (u64 *)nx_get_bootld_offs(adapter); 1019 flashaddr = NETXEN_BOOTLD_START; 1020 1021 for (i = 0; i < size; i++) { 1022 data = cpu_to_le64(ptr64[i]); 1023 1024 if (adapter->pci_mem_write(adapter, flashaddr, data)) 1025 return -EIO; 1026 1027 flashaddr += 8; 1028 } 1029 1030 size = (__force u32)nx_get_fw_size(adapter) / 8; 1031 1032 ptr64 = (u64 *)nx_get_fw_offs(adapter); 1033 flashaddr = NETXEN_IMAGE_START; 1034 1035 for (i = 0; i < size; i++) { 1036 data = cpu_to_le64(ptr64[i]); 1037 1038 if (adapter->pci_mem_write(adapter, 1039 flashaddr, data)) 1040 return -EIO; 1041 1042 flashaddr += 8; 1043 } 1044 1045 size = (__force u32)nx_get_fw_size(adapter) % 8; 1046 if (size) { 1047 data = cpu_to_le64(ptr64[i]); 1048 1049 if (adapter->pci_mem_write(adapter, 1050 flashaddr, data)) 1051 return -EIO; 1052 } 1053 1054 } else { 1055 u64 data; 1056 u32 hi, lo; 1057 1058 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 1059 flashaddr = NETXEN_BOOTLD_START; 1060 1061 for (i = 0; i < size; i++) { 1062 if (netxen_rom_fast_read(adapter, 1063 flashaddr, (int *)&lo) != 0) 1064 return -EIO; 1065 if (netxen_rom_fast_read(adapter, 1066 flashaddr + 4, (int *)&hi) != 0) 1067 return -EIO; 1068 1069 /* hi, lo are already in host endian byteorder */ 1070 data = (((u64)hi << 32) | lo); 1071 1072 if (adapter->pci_mem_write(adapter, 1073 flashaddr, data)) 1074 return -EIO; 1075 1076 flashaddr += 8; 1077 } 1078 } 1079 msleep(1); 1080 1081 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) { 1082 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020); 1083 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e); 1084 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1085 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d); 1086 else { 1087 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff); 1088 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0); 1089 } 1090 1091 return 0; 1092} 1093 1094static int 1095netxen_validate_firmware(struct netxen_adapter *adapter) 1096{ 1097 __le32 val; 1098 __le32 flash_fw_ver; 1099 u32 file_fw_ver, min_ver, bios; 1100 struct pci_dev *pdev = adapter->pdev; 1101 const struct firmware *fw = adapter->fw; 1102 u8 fw_type = adapter->fw_type; 1103 u32 crbinit_fix_fw; 1104 1105 if (fw_type == NX_UNIFIED_ROMIMAGE) { 1106 if (netxen_nic_validate_unified_romimage(adapter)) 1107 return -EINVAL; 1108 } else { 1109 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]); 1110 if ((__force u32)val != NETXEN_BDINFO_MAGIC) 1111 return -EINVAL; 1112 1113 if (fw->size < NX_FW_MIN_SIZE) 1114 return -EINVAL; 1115 } 1116 1117 val = nx_get_fw_version(adapter); 1118 1119 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1120 min_ver = NETXEN_MIN_P3_FW_SUPP; 1121 else 1122 min_ver = NETXEN_VERSION_CODE(3, 4, 216); 1123 1124 file_fw_ver = NETXEN_DECODE_VERSION(val); 1125 1126 if ((_major(file_fw_ver) > _NETXEN_NIC_LINUX_MAJOR) || 1127 (file_fw_ver < min_ver)) { 1128 dev_err(&pdev->dev, 1129 "%s: firmware version %d.%d.%d unsupported\n", 1130 fw_name[fw_type], _major(file_fw_ver), _minor(file_fw_ver), 1131 _build(file_fw_ver)); 1132 return -EINVAL; 1133 } 1134 1135 val = nx_get_bios_version(adapter); 1136 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios); 1137 if ((__force u32)val != bios) { 1138 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n", 1139 fw_name[fw_type]); 1140 return -EINVAL; 1141 } 1142 1143 if (netxen_rom_fast_read(adapter, 1144 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) { 1145 dev_err(&pdev->dev, "Unable to read flash fw version\n"); 1146 return -EIO; 1147 } 1148 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver); 1149 1150 /* New fw from file is not allowed, if fw on flash is < 4.0.554 */ 1151 crbinit_fix_fw = NETXEN_VERSION_CODE(4, 0, 554); 1152 if (file_fw_ver >= crbinit_fix_fw && flash_fw_ver < crbinit_fix_fw && 1153 NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 1154 dev_err(&pdev->dev, "Incompatibility detected between driver " 1155 "and firmware version on flash. This configuration " 1156 "is not recommended. Please update the firmware on " 1157 "flash immediately\n"); 1158 return -EINVAL; 1159 } 1160 1161 /* check if flashed firmware is newer only for no-mn and P2 case*/ 1162 if (!netxen_p3_has_mn(adapter) || 1163 NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1164 if (flash_fw_ver > file_fw_ver) { 1165 dev_info(&pdev->dev, "%s: firmware is older than flash\n", 1166 fw_name[fw_type]); 1167 return -EINVAL; 1168 } 1169 } 1170 1171 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC); 1172 return 0; 1173} 1174 1175static void 1176nx_get_next_fwtype(struct netxen_adapter *adapter) 1177{ 1178 u8 fw_type; 1179 1180 switch (adapter->fw_type) { 1181 case NX_UNKNOWN_ROMIMAGE: 1182 fw_type = NX_UNIFIED_ROMIMAGE; 1183 break; 1184 1185 case NX_UNIFIED_ROMIMAGE: 1186 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 1187 fw_type = NX_FLASH_ROMIMAGE; 1188 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1189 fw_type = NX_P2_MN_ROMIMAGE; 1190 else if (netxen_p3_has_mn(adapter)) 1191 fw_type = NX_P3_MN_ROMIMAGE; 1192 else 1193 fw_type = NX_P3_CT_ROMIMAGE; 1194 break; 1195 1196 case NX_P3_MN_ROMIMAGE: 1197 fw_type = NX_P3_CT_ROMIMAGE; 1198 break; 1199 1200 case NX_P2_MN_ROMIMAGE: 1201 case NX_P3_CT_ROMIMAGE: 1202 default: 1203 fw_type = NX_FLASH_ROMIMAGE; 1204 break; 1205 } 1206 1207 adapter->fw_type = fw_type; 1208} 1209 1210static int 1211netxen_p3_has_mn(struct netxen_adapter *adapter) 1212{ 1213 u32 capability, flashed_ver; 1214 capability = 0; 1215 1216 /* NX2031 always had MN */ 1217 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1218 return 1; 1219 1220 netxen_rom_fast_read(adapter, 1221 NX_FW_VERSION_OFFSET, (int *)&flashed_ver); 1222 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver); 1223 1224 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) { 1225 1226 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY); 1227 if (capability & NX_PEG_TUNE_MN_PRESENT) 1228 return 1; 1229 } 1230 return 0; 1231} 1232 1233void netxen_request_firmware(struct netxen_adapter *adapter) 1234{ 1235 struct pci_dev *pdev = adapter->pdev; 1236 int rc = 0; 1237 1238 adapter->fw_type = NX_UNKNOWN_ROMIMAGE; 1239 1240next: 1241 nx_get_next_fwtype(adapter); 1242 1243 if (adapter->fw_type == NX_FLASH_ROMIMAGE) { 1244 adapter->fw = NULL; 1245 } else { 1246 rc = request_firmware(&adapter->fw, 1247 fw_name[adapter->fw_type], &pdev->dev); 1248 if (rc != 0) 1249 goto next; 1250 1251 rc = netxen_validate_firmware(adapter); 1252 if (rc != 0) { 1253 release_firmware(adapter->fw); 1254 msleep(1); 1255 goto next; 1256 } 1257 } 1258} 1259 1260 1261void 1262netxen_release_firmware(struct netxen_adapter *adapter) 1263{ 1264 if (adapter->fw) 1265 release_firmware(adapter->fw); 1266 adapter->fw = NULL; 1267} 1268 1269int netxen_init_dummy_dma(struct netxen_adapter *adapter) 1270{ 1271 u64 addr; 1272 u32 hi, lo; 1273 1274 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1275 return 0; 1276 1277 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev, 1278 NETXEN_HOST_DUMMY_DMA_SIZE, 1279 &adapter->dummy_dma.phys_addr); 1280 if (adapter->dummy_dma.addr == NULL) { 1281 dev_err(&adapter->pdev->dev, 1282 "ERROR: Could not allocate dummy DMA memory\n"); 1283 return -ENOMEM; 1284 } 1285 1286 addr = (uint64_t) adapter->dummy_dma.phys_addr; 1287 hi = (addr >> 32) & 0xffffffff; 1288 lo = addr & 0xffffffff; 1289 1290 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi); 1291 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo); 1292 1293 return 0; 1294} 1295 1296/* 1297 * NetXen DMA watchdog control: 1298 * 1299 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive 1300 * Bit 1 : disable_request => 1 req disable dma watchdog 1301 * Bit 2 : enable_request => 1 req enable dma watchdog 1302 * Bit 3-31 : unused 1303 */ 1304void netxen_free_dummy_dma(struct netxen_adapter *adapter) 1305{ 1306 int i = 100; 1307 u32 ctrl; 1308 1309 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1310 return; 1311 1312 if (!adapter->dummy_dma.addr) 1313 return; 1314 1315 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1316 if ((ctrl & 0x1) != 0) { 1317 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2)); 1318 1319 while ((ctrl & 0x1) != 0) { 1320 1321 msleep(50); 1322 1323 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1324 1325 if (--i == 0) 1326 break; 1327 } 1328 } 1329 1330 if (i) { 1331 pci_free_consistent(adapter->pdev, 1332 NETXEN_HOST_DUMMY_DMA_SIZE, 1333 adapter->dummy_dma.addr, 1334 adapter->dummy_dma.phys_addr); 1335 adapter->dummy_dma.addr = NULL; 1336 } else 1337 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n"); 1338} 1339 1340int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val) 1341{ 1342 u32 val = 0; 1343 int retries = 60; 1344 1345 if (pegtune_val) 1346 return 0; 1347 1348 do { 1349 val = NXRD32(adapter, CRB_CMDPEG_STATE); 1350 switch (val) { 1351 case PHAN_INITIALIZE_COMPLETE: 1352 case PHAN_INITIALIZE_ACK: 1353 return 0; 1354 case PHAN_INITIALIZE_FAILED: 1355 goto out_err; 1356 default: 1357 break; 1358 } 1359 1360 msleep(500); 1361 1362 } while (--retries); 1363 1364 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); 1365 1366out_err: 1367 dev_warn(&adapter->pdev->dev, "firmware init failed\n"); 1368 return -EIO; 1369} 1370 1371static int 1372netxen_receive_peg_ready(struct netxen_adapter *adapter) 1373{ 1374 u32 val = 0; 1375 int retries = 2000; 1376 1377 do { 1378 val = NXRD32(adapter, CRB_RCVPEG_STATE); 1379 1380 if (val == PHAN_PEG_RCV_INITIALIZED) 1381 return 0; 1382 1383 msleep(10); 1384 1385 } while (--retries); 1386 1387 if (!retries) { 1388 printk(KERN_ERR "Receive Peg initialization not " 1389 "complete, state: 0x%x.\n", val); 1390 return -EIO; 1391 } 1392 1393 return 0; 1394} 1395 1396int netxen_init_firmware(struct netxen_adapter *adapter) 1397{ 1398 int err; 1399 1400 err = netxen_receive_peg_ready(adapter); 1401 if (err) 1402 return err; 1403 1404 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT); 1405 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE); 1406 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK); 1407 1408 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1409 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC); 1410 1411 return err; 1412} 1413 1414static void 1415netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg) 1416{ 1417 u32 cable_OUI; 1418 u16 cable_len; 1419 u16 link_speed; 1420 u8 link_status, module, duplex, autoneg; 1421 struct net_device *netdev = adapter->netdev; 1422 1423 adapter->has_link_events = 1; 1424 1425 cable_OUI = msg->body[1] & 0xffffffff; 1426 cable_len = (msg->body[1] >> 32) & 0xffff; 1427 link_speed = (msg->body[1] >> 48) & 0xffff; 1428 1429 link_status = msg->body[2] & 0xff; 1430 duplex = (msg->body[2] >> 16) & 0xff; 1431 autoneg = (msg->body[2] >> 24) & 0xff; 1432 1433 module = (msg->body[2] >> 8) & 0xff; 1434 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) { 1435 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n", 1436 netdev->name, cable_OUI, cable_len); 1437 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) { 1438 printk(KERN_INFO "%s: unsupported cable length %d\n", 1439 netdev->name, cable_len); 1440 } 1441 1442 netxen_advert_link_change(adapter, link_status); 1443 1444 /* update link parameters */ 1445 if (duplex == LINKEVENT_FULL_DUPLEX) 1446 adapter->link_duplex = DUPLEX_FULL; 1447 else 1448 adapter->link_duplex = DUPLEX_HALF; 1449 adapter->module_type = module; 1450 adapter->link_autoneg = autoneg; 1451 adapter->link_speed = link_speed; 1452} 1453 1454static void 1455netxen_handle_fw_message(int desc_cnt, int index, 1456 struct nx_host_sds_ring *sds_ring) 1457{ 1458 nx_fw_msg_t msg; 1459 struct status_desc *desc; 1460 int i = 0, opcode; 1461 1462 while (desc_cnt > 0 && i < 8) { 1463 desc = &sds_ring->desc_head[index]; 1464 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]); 1465 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]); 1466 1467 index = get_next_index(index, sds_ring->num_desc); 1468 desc_cnt--; 1469 } 1470 1471 opcode = netxen_get_nic_msg_opcode(msg.body[0]); 1472 switch (opcode) { 1473 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE: 1474 netxen_handle_linkevent(sds_ring->adapter, &msg); 1475 break; 1476 default: 1477 break; 1478 } 1479} 1480 1481static int 1482netxen_alloc_rx_skb(struct netxen_adapter *adapter, 1483 struct nx_host_rds_ring *rds_ring, 1484 struct netxen_rx_buffer *buffer) 1485{ 1486 struct sk_buff *skb; 1487 dma_addr_t dma; 1488 struct pci_dev *pdev = adapter->pdev; 1489 1490 buffer->skb = netdev_alloc_skb(adapter->netdev, rds_ring->skb_size); 1491 if (!buffer->skb) 1492 return 1; 1493 1494 skb = buffer->skb; 1495 1496 if (!adapter->ahw.cut_through) 1497 skb_reserve(skb, 2); 1498 1499 dma = pci_map_single(pdev, skb->data, 1500 rds_ring->dma_size, PCI_DMA_FROMDEVICE); 1501 1502 if (pci_dma_mapping_error(pdev, dma)) { 1503 dev_kfree_skb_any(skb); 1504 buffer->skb = NULL; 1505 return 1; 1506 } 1507 1508 buffer->skb = skb; 1509 buffer->dma = dma; 1510 buffer->state = NETXEN_BUFFER_BUSY; 1511 1512 return 0; 1513} 1514 1515static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter, 1516 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum) 1517{ 1518 struct netxen_rx_buffer *buffer; 1519 struct sk_buff *skb; 1520 1521 buffer = &rds_ring->rx_buf_arr[index]; 1522 1523 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size, 1524 PCI_DMA_FROMDEVICE); 1525 1526 skb = buffer->skb; 1527 if (!skb) 1528 goto no_skb; 1529 1530 if (likely((adapter->netdev->features & NETIF_F_RXCSUM) 1531 && cksum == STATUS_CKSUM_OK)) { 1532 adapter->stats.csummed++; 1533 skb->ip_summed = CHECKSUM_UNNECESSARY; 1534 } else 1535 skb->ip_summed = CHECKSUM_NONE; 1536 1537 skb->dev = adapter->netdev; 1538 1539 buffer->skb = NULL; 1540no_skb: 1541 buffer->state = NETXEN_BUFFER_FREE; 1542 return skb; 1543} 1544 1545static struct netxen_rx_buffer * 1546netxen_process_rcv(struct netxen_adapter *adapter, 1547 struct nx_host_sds_ring *sds_ring, 1548 int ring, u64 sts_data0) 1549{ 1550 struct net_device *netdev = adapter->netdev; 1551 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1552 struct netxen_rx_buffer *buffer; 1553 struct sk_buff *skb; 1554 struct nx_host_rds_ring *rds_ring; 1555 int index, length, cksum, pkt_offset; 1556 1557 if (unlikely(ring >= adapter->max_rds_rings)) 1558 return NULL; 1559 1560 rds_ring = &recv_ctx->rds_rings[ring]; 1561 1562 index = netxen_get_sts_refhandle(sts_data0); 1563 if (unlikely(index >= rds_ring->num_desc)) 1564 return NULL; 1565 1566 buffer = &rds_ring->rx_buf_arr[index]; 1567 1568 length = netxen_get_sts_totallength(sts_data0); 1569 cksum = netxen_get_sts_status(sts_data0); 1570 pkt_offset = netxen_get_sts_pkt_offset(sts_data0); 1571 1572 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum); 1573 if (!skb) 1574 return buffer; 1575 1576 if (length > rds_ring->skb_size) 1577 skb_put(skb, rds_ring->skb_size); 1578 else 1579 skb_put(skb, length); 1580 1581 1582 if (pkt_offset) 1583 skb_pull(skb, pkt_offset); 1584 1585 skb->protocol = eth_type_trans(skb, netdev); 1586 1587 napi_gro_receive(&sds_ring->napi, skb); 1588 1589 adapter->stats.rx_pkts++; 1590 adapter->stats.rxbytes += length; 1591 1592 return buffer; 1593} 1594 1595#define TCP_HDR_SIZE 20 1596#define TCP_TS_OPTION_SIZE 12 1597#define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE) 1598 1599static struct netxen_rx_buffer * 1600netxen_process_lro(struct netxen_adapter *adapter, 1601 struct nx_host_sds_ring *sds_ring, 1602 int ring, u64 sts_data0, u64 sts_data1) 1603{ 1604 struct net_device *netdev = adapter->netdev; 1605 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1606 struct netxen_rx_buffer *buffer; 1607 struct sk_buff *skb; 1608 struct nx_host_rds_ring *rds_ring; 1609 struct iphdr *iph; 1610 struct tcphdr *th; 1611 bool push, timestamp; 1612 int l2_hdr_offset, l4_hdr_offset; 1613 int index; 1614 u16 lro_length, length, data_offset; 1615 u32 seq_number; 1616 u8 vhdr_len = 0; 1617 1618 if (unlikely(ring > adapter->max_rds_rings)) 1619 return NULL; 1620 1621 rds_ring = &recv_ctx->rds_rings[ring]; 1622 1623 index = netxen_get_lro_sts_refhandle(sts_data0); 1624 if (unlikely(index > rds_ring->num_desc)) 1625 return NULL; 1626 1627 buffer = &rds_ring->rx_buf_arr[index]; 1628 1629 timestamp = netxen_get_lro_sts_timestamp(sts_data0); 1630 lro_length = netxen_get_lro_sts_length(sts_data0); 1631 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0); 1632 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0); 1633 push = netxen_get_lro_sts_push_flag(sts_data0); 1634 seq_number = netxen_get_lro_sts_seq_number(sts_data1); 1635 1636 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK); 1637 if (!skb) 1638 return buffer; 1639 1640 if (timestamp) 1641 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE; 1642 else 1643 data_offset = l4_hdr_offset + TCP_HDR_SIZE; 1644 1645 skb_put(skb, lro_length + data_offset); 1646 1647 skb_pull(skb, l2_hdr_offset); 1648 skb->protocol = eth_type_trans(skb, netdev); 1649 1650 if (skb->protocol == htons(ETH_P_8021Q)) 1651 vhdr_len = VLAN_HLEN; 1652 iph = (struct iphdr *)(skb->data + vhdr_len); 1653 th = (struct tcphdr *)((skb->data + vhdr_len) + (iph->ihl << 2)); 1654 1655 length = (iph->ihl << 2) + (th->doff << 2) + lro_length; 1656 iph->tot_len = htons(length); 1657 iph->check = 0; 1658 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl); 1659 th->psh = push; 1660 th->seq = htonl(seq_number); 1661 1662 length = skb->len; 1663 1664 netif_receive_skb(skb); 1665 1666 adapter->stats.lro_pkts++; 1667 adapter->stats.rxbytes += length; 1668 1669 return buffer; 1670} 1671 1672#define netxen_merge_rx_buffers(list, head) \ 1673 do { list_splice_tail_init(list, head); } while (0); 1674 1675int 1676netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max) 1677{ 1678 struct netxen_adapter *adapter = sds_ring->adapter; 1679 1680 struct list_head *cur; 1681 1682 struct status_desc *desc; 1683 struct netxen_rx_buffer *rxbuf; 1684 1685 u32 consumer = sds_ring->consumer; 1686 1687 int count = 0; 1688 u64 sts_data0, sts_data1; 1689 int opcode, ring = 0, desc_cnt; 1690 1691 while (count < max) { 1692 desc = &sds_ring->desc_head[consumer]; 1693 sts_data0 = le64_to_cpu(desc->status_desc_data[0]); 1694 1695 if (!(sts_data0 & STATUS_OWNER_HOST)) 1696 break; 1697 1698 desc_cnt = netxen_get_sts_desc_cnt(sts_data0); 1699 1700 opcode = netxen_get_sts_opcode(sts_data0); 1701 1702 switch (opcode) { 1703 case NETXEN_NIC_RXPKT_DESC: 1704 case NETXEN_OLD_RXPKT_DESC: 1705 case NETXEN_NIC_SYN_OFFLOAD: 1706 ring = netxen_get_sts_type(sts_data0); 1707 rxbuf = netxen_process_rcv(adapter, sds_ring, 1708 ring, sts_data0); 1709 break; 1710 case NETXEN_NIC_LRO_DESC: 1711 ring = netxen_get_lro_sts_type(sts_data0); 1712 sts_data1 = le64_to_cpu(desc->status_desc_data[1]); 1713 rxbuf = netxen_process_lro(adapter, sds_ring, 1714 ring, sts_data0, sts_data1); 1715 break; 1716 case NETXEN_NIC_RESPONSE_DESC: 1717 netxen_handle_fw_message(desc_cnt, consumer, sds_ring); 1718 default: 1719 goto skip; 1720 } 1721 1722 WARN_ON(desc_cnt > 1); 1723 1724 if (rxbuf) 1725 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]); 1726 1727skip: 1728 for (; desc_cnt > 0; desc_cnt--) { 1729 desc = &sds_ring->desc_head[consumer]; 1730 desc->status_desc_data[0] = 1731 cpu_to_le64(STATUS_OWNER_PHANTOM); 1732 consumer = get_next_index(consumer, sds_ring->num_desc); 1733 } 1734 count++; 1735 } 1736 1737 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 1738 struct nx_host_rds_ring *rds_ring = 1739 &adapter->recv_ctx.rds_rings[ring]; 1740 1741 if (!list_empty(&sds_ring->free_list[ring])) { 1742 list_for_each(cur, &sds_ring->free_list[ring]) { 1743 rxbuf = list_entry(cur, 1744 struct netxen_rx_buffer, list); 1745 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf); 1746 } 1747 spin_lock(&rds_ring->lock); 1748 netxen_merge_rx_buffers(&sds_ring->free_list[ring], 1749 &rds_ring->free_list); 1750 spin_unlock(&rds_ring->lock); 1751 } 1752 1753 netxen_post_rx_buffers_nodb(adapter, rds_ring); 1754 } 1755 1756 if (count) { 1757 sds_ring->consumer = consumer; 1758 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer); 1759 } 1760 1761 return count; 1762} 1763 1764/* Process Command status ring */ 1765int netxen_process_cmd_ring(struct netxen_adapter *adapter) 1766{ 1767 u32 sw_consumer, hw_consumer; 1768 int count = 0, i; 1769 struct netxen_cmd_buffer *buffer; 1770 struct pci_dev *pdev = adapter->pdev; 1771 struct net_device *netdev = adapter->netdev; 1772 struct netxen_skb_frag *frag; 1773 int done = 0; 1774 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 1775 1776 if (!spin_trylock(&adapter->tx_clean_lock)) 1777 return 1; 1778 1779 sw_consumer = tx_ring->sw_consumer; 1780 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1781 1782 while (sw_consumer != hw_consumer) { 1783 buffer = &tx_ring->cmd_buf_arr[sw_consumer]; 1784 if (buffer->skb) { 1785 frag = &buffer->frag_array[0]; 1786 pci_unmap_single(pdev, frag->dma, frag->length, 1787 PCI_DMA_TODEVICE); 1788 frag->dma = 0ULL; 1789 for (i = 1; i < buffer->frag_count; i++) { 1790 frag++; /* Get the next frag */ 1791 pci_unmap_page(pdev, frag->dma, frag->length, 1792 PCI_DMA_TODEVICE); 1793 frag->dma = 0ULL; 1794 } 1795 1796 adapter->stats.xmitfinished++; 1797 dev_kfree_skb_any(buffer->skb); 1798 buffer->skb = NULL; 1799 } 1800 1801 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc); 1802 if (++count >= MAX_STATUS_HANDLE) 1803 break; 1804 } 1805 1806 if (count && netif_running(netdev)) { 1807 tx_ring->sw_consumer = sw_consumer; 1808 1809 smp_mb(); 1810 1811 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) 1812 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH) 1813 netif_wake_queue(netdev); 1814 adapter->tx_timeo_cnt = 0; 1815 } 1816 /* 1817 * If everything is freed up to consumer then check if the ring is full 1818 * If the ring is full then check if more needs to be freed and 1819 * schedule the call back again. 1820 * 1821 * This happens when there are 2 CPUs. One could be freeing and the 1822 * other filling it. If the ring is full when we get out of here and 1823 * the card has already interrupted the host then the host can miss the 1824 * interrupt. 1825 * 1826 * There is still a possible race condition and the host could miss an 1827 * interrupt. The card has to take care of this. 1828 */ 1829 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1830 done = (sw_consumer == hw_consumer); 1831 spin_unlock(&adapter->tx_clean_lock); 1832 1833 return done; 1834} 1835 1836void 1837netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid, 1838 struct nx_host_rds_ring *rds_ring) 1839{ 1840 struct rcv_desc *pdesc; 1841 struct netxen_rx_buffer *buffer; 1842 int producer, count = 0; 1843 netxen_ctx_msg msg = 0; 1844 struct list_head *head; 1845 1846 producer = rds_ring->producer; 1847 1848 head = &rds_ring->free_list; 1849 while (!list_empty(head)) { 1850 1851 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1852 1853 if (!buffer->skb) { 1854 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1855 break; 1856 } 1857 1858 count++; 1859 list_del(&buffer->list); 1860 1861 /* make a rcv descriptor */ 1862 pdesc = &rds_ring->desc_head[producer]; 1863 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1864 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1865 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1866 1867 producer = get_next_index(producer, rds_ring->num_desc); 1868 } 1869 1870 if (count) { 1871 rds_ring->producer = producer; 1872 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1873 (producer-1) & (rds_ring->num_desc-1)); 1874 1875 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1876 /* 1877 * Write a doorbell msg to tell phanmon of change in 1878 * receive ring producer 1879 * Only for firmware version < 4.0.0 1880 */ 1881 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID); 1882 netxen_set_msg_privid(msg); 1883 netxen_set_msg_count(msg, 1884 ((producer - 1) & 1885 (rds_ring->num_desc - 1))); 1886 netxen_set_msg_ctxid(msg, adapter->portnum); 1887 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid)); 1888 NXWRIO(adapter, DB_NORMALIZE(adapter, 1889 NETXEN_RCV_PRODUCER_OFFSET), msg); 1890 } 1891 } 1892} 1893 1894static void 1895netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 1896 struct nx_host_rds_ring *rds_ring) 1897{ 1898 struct rcv_desc *pdesc; 1899 struct netxen_rx_buffer *buffer; 1900 int producer, count = 0; 1901 struct list_head *head; 1902 1903 if (!spin_trylock(&rds_ring->lock)) 1904 return; 1905 1906 producer = rds_ring->producer; 1907 1908 head = &rds_ring->free_list; 1909 while (!list_empty(head)) { 1910 1911 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1912 1913 if (!buffer->skb) { 1914 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1915 break; 1916 } 1917 1918 count++; 1919 list_del(&buffer->list); 1920 1921 /* make a rcv descriptor */ 1922 pdesc = &rds_ring->desc_head[producer]; 1923 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1924 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1925 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1926 1927 producer = get_next_index(producer, rds_ring->num_desc); 1928 } 1929 1930 if (count) { 1931 rds_ring->producer = producer; 1932 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1933 (producer - 1) & (rds_ring->num_desc - 1)); 1934 } 1935 spin_unlock(&rds_ring->lock); 1936} 1937 1938void netxen_nic_clear_stats(struct netxen_adapter *adapter) 1939{ 1940 memset(&adapter->stats, 0, sizeof(adapter->stats)); 1941} 1942 1943