1/* 2 * smc911x.c 3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices. 4 * 5 * Copyright (C) 2005 Sensoria Corp 6 * Derived from the unified SMC91x driver by Nicolas Pitre 7 * and the smsc911x.c reference driver by SMSC 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * 23 * Arguments: 24 * watchdog = TX watchdog timeout 25 * tx_fifo_kb = Size of TX FIFO in KB 26 * 27 * History: 28 * 04/16/05 Dustin McIntire Initial version 29 */ 30static const char version[] = 31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n"; 32 33/* Debugging options */ 34#define ENABLE_SMC_DEBUG_RX 0 35#define ENABLE_SMC_DEBUG_TX 0 36#define ENABLE_SMC_DEBUG_DMA 0 37#define ENABLE_SMC_DEBUG_PKTS 0 38#define ENABLE_SMC_DEBUG_MISC 0 39#define ENABLE_SMC_DEBUG_FUNC 0 40 41#define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0) 42#define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1) 43#define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2) 44#define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3) 45#define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4) 46#define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5) 47 48#ifndef SMC_DEBUG 49#define SMC_DEBUG ( SMC_DEBUG_RX | \ 50 SMC_DEBUG_TX | \ 51 SMC_DEBUG_DMA | \ 52 SMC_DEBUG_PKTS | \ 53 SMC_DEBUG_MISC | \ 54 SMC_DEBUG_FUNC \ 55 ) 56#endif 57 58#include <linux/init.h> 59#include <linux/module.h> 60#include <linux/kernel.h> 61#include <linux/sched.h> 62#include <linux/delay.h> 63#include <linux/interrupt.h> 64#include <linux/errno.h> 65#include <linux/ioport.h> 66#include <linux/crc32.h> 67#include <linux/device.h> 68#include <linux/platform_device.h> 69#include <linux/spinlock.h> 70#include <linux/ethtool.h> 71#include <linux/mii.h> 72#include <linux/workqueue.h> 73 74#include <linux/netdevice.h> 75#include <linux/etherdevice.h> 76#include <linux/skbuff.h> 77 78#include <asm/io.h> 79 80#include "smc911x.h" 81 82/* 83 * Transmit timeout, default 5 seconds. 84 */ 85static int watchdog = 5000; 86module_param(watchdog, int, 0400); 87MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); 88 89static int tx_fifo_kb=8; 90module_param(tx_fifo_kb, int, 0400); 91MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)"); 92 93MODULE_LICENSE("GPL"); 94MODULE_ALIAS("platform:smc911x"); 95 96/* 97 * The internal workings of the driver. If you are changing anything 98 * here with the SMC stuff, you should have the datasheet and know 99 * what you are doing. 100 */ 101#define CARDNAME "smc911x" 102 103/* 104 * Use power-down feature of the chip 105 */ 106#define POWER_DOWN 1 107 108#if SMC_DEBUG > 0 109#define DBG(n, args...) \ 110 do { \ 111 if (SMC_DEBUG & (n)) \ 112 printk(args); \ 113 } while (0) 114 115#define PRINTK(args...) printk(args) 116#else 117#define DBG(n, args...) do { } while (0) 118#define PRINTK(args...) printk(KERN_DEBUG args) 119#endif 120 121#if SMC_DEBUG_PKTS > 0 122static void PRINT_PKT(u_char *buf, int length) 123{ 124 int i; 125 int remainder; 126 int lines; 127 128 lines = length / 16; 129 remainder = length % 16; 130 131 for (i = 0; i < lines ; i ++) { 132 int cur; 133 for (cur = 0; cur < 8; cur++) { 134 u_char a, b; 135 a = *buf++; 136 b = *buf++; 137 printk("%02x%02x ", a, b); 138 } 139 printk("\n"); 140 } 141 for (i = 0; i < remainder/2 ; i++) { 142 u_char a, b; 143 a = *buf++; 144 b = *buf++; 145 printk("%02x%02x ", a, b); 146 } 147 printk("\n"); 148} 149#else 150#define PRINT_PKT(x...) do { } while (0) 151#endif 152 153 154/* this enables an interrupt in the interrupt mask register */ 155#define SMC_ENABLE_INT(lp, x) do { \ 156 unsigned int __mask; \ 157 __mask = SMC_GET_INT_EN((lp)); \ 158 __mask |= (x); \ 159 SMC_SET_INT_EN((lp), __mask); \ 160} while (0) 161 162/* this disables an interrupt from the interrupt mask register */ 163#define SMC_DISABLE_INT(lp, x) do { \ 164 unsigned int __mask; \ 165 __mask = SMC_GET_INT_EN((lp)); \ 166 __mask &= ~(x); \ 167 SMC_SET_INT_EN((lp), __mask); \ 168} while (0) 169 170/* 171 * this does a soft reset on the device 172 */ 173static void smc911x_reset(struct net_device *dev) 174{ 175 struct smc911x_local *lp = netdev_priv(dev); 176 unsigned int reg, timeout=0, resets=1, irq_cfg; 177 unsigned long flags; 178 179 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 180 181 /* Take out of PM setting first */ 182 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) { 183 /* Write to the bytetest will take out of powerdown */ 184 SMC_SET_BYTE_TEST(lp, 0); 185 timeout=10; 186 do { 187 udelay(10); 188 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_; 189 } while (--timeout && !reg); 190 if (timeout == 0) { 191 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name); 192 return; 193 } 194 } 195 196 /* Disable all interrupts */ 197 spin_lock_irqsave(&lp->lock, flags); 198 SMC_SET_INT_EN(lp, 0); 199 spin_unlock_irqrestore(&lp->lock, flags); 200 201 while (resets--) { 202 SMC_SET_HW_CFG(lp, HW_CFG_SRST_); 203 timeout=10; 204 do { 205 udelay(10); 206 reg = SMC_GET_HW_CFG(lp); 207 /* If chip indicates reset timeout then try again */ 208 if (reg & HW_CFG_SRST_TO_) { 209 PRINTK("%s: chip reset timeout, retrying...\n", dev->name); 210 resets++; 211 break; 212 } 213 } while (--timeout && (reg & HW_CFG_SRST_)); 214 } 215 if (timeout == 0) { 216 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name); 217 return; 218 } 219 220 /* make sure EEPROM has finished loading before setting GPIO_CFG */ 221 timeout=1000; 222 while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_)) 223 udelay(10); 224 225 if (timeout == 0){ 226 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name); 227 return; 228 } 229 230 /* Initialize interrupts */ 231 SMC_SET_INT_EN(lp, 0); 232 SMC_ACK_INT(lp, -1); 233 234 /* Reset the FIFO level and flow control settings */ 235 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16); 236//TODO: Figure out what appropriate pause time is 237 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_); 238 SMC_SET_AFC_CFG(lp, lp->afc_cfg); 239 240 241 /* Set to LED outputs */ 242 SMC_SET_GPIO_CFG(lp, 0x70070000); 243 244 /* 245 * Deassert IRQ for 1*10us for edge type interrupts 246 * and drive IRQ pin push-pull 247 */ 248 irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_; 249#ifdef SMC_DYNAMIC_BUS_CONFIG 250 if (lp->cfg.irq_polarity) 251 irq_cfg |= INT_CFG_IRQ_POL_; 252#endif 253 SMC_SET_IRQ_CFG(lp, irq_cfg); 254 255 /* clear anything saved */ 256 if (lp->pending_tx_skb != NULL) { 257 dev_kfree_skb (lp->pending_tx_skb); 258 lp->pending_tx_skb = NULL; 259 dev->stats.tx_errors++; 260 dev->stats.tx_aborted_errors++; 261 } 262} 263 264/* 265 * Enable Interrupts, Receive, and Transmit 266 */ 267static void smc911x_enable(struct net_device *dev) 268{ 269 struct smc911x_local *lp = netdev_priv(dev); 270 unsigned mask, cfg, cr; 271 unsigned long flags; 272 273 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 274 275 spin_lock_irqsave(&lp->lock, flags); 276 277 SMC_SET_MAC_ADDR(lp, dev->dev_addr); 278 279 /* Enable TX */ 280 cfg = SMC_GET_HW_CFG(lp); 281 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF; 282 cfg |= HW_CFG_SF_; 283 SMC_SET_HW_CFG(lp, cfg); 284 SMC_SET_FIFO_TDA(lp, 0xFF); 285 /* Update TX stats on every 64 packets received or every 1 sec */ 286 SMC_SET_FIFO_TSL(lp, 64); 287 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000); 288 289 SMC_GET_MAC_CR(lp, cr); 290 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_; 291 SMC_SET_MAC_CR(lp, cr); 292 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_); 293 294 /* Add 2 byte padding to start of packets */ 295 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_); 296 297 /* Turn on receiver and enable RX */ 298 if (cr & MAC_CR_RXEN_) 299 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name); 300 301 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_); 302 303 /* Interrupt on every received packet */ 304 SMC_SET_FIFO_RSA(lp, 0x01); 305 SMC_SET_FIFO_RSL(lp, 0x00); 306 307 /* now, enable interrupts */ 308 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ | 309 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ | 310 INT_EN_PHY_INT_EN_; 311 if (IS_REV_A(lp->revision)) 312 mask|=INT_EN_RDFL_EN_; 313 else { 314 mask|=INT_EN_RDFO_EN_; 315 } 316 SMC_ENABLE_INT(lp, mask); 317 318 spin_unlock_irqrestore(&lp->lock, flags); 319} 320 321/* 322 * this puts the device in an inactive state 323 */ 324static void smc911x_shutdown(struct net_device *dev) 325{ 326 struct smc911x_local *lp = netdev_priv(dev); 327 unsigned cr; 328 unsigned long flags; 329 330 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __func__); 331 332 /* Disable IRQ's */ 333 SMC_SET_INT_EN(lp, 0); 334 335 /* Turn of Rx and TX */ 336 spin_lock_irqsave(&lp->lock, flags); 337 SMC_GET_MAC_CR(lp, cr); 338 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); 339 SMC_SET_MAC_CR(lp, cr); 340 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_); 341 spin_unlock_irqrestore(&lp->lock, flags); 342} 343 344static inline void smc911x_drop_pkt(struct net_device *dev) 345{ 346 struct smc911x_local *lp = netdev_priv(dev); 347 unsigned int fifo_count, timeout, reg; 348 349 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __func__); 350 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF; 351 if (fifo_count <= 4) { 352 /* Manually dump the packet data */ 353 while (fifo_count--) 354 SMC_GET_RX_FIFO(lp); 355 } else { 356 /* Fast forward through the bad packet */ 357 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_); 358 timeout=50; 359 do { 360 udelay(10); 361 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_; 362 } while (--timeout && reg); 363 if (timeout == 0) { 364 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name); 365 } 366 } 367} 368 369/* 370 * This is the procedure to handle the receipt of a packet. 371 * It should be called after checking for packet presence in 372 * the RX status FIFO. It must be called with the spin lock 373 * already held. 374 */ 375static inline void smc911x_rcv(struct net_device *dev) 376{ 377 struct smc911x_local *lp = netdev_priv(dev); 378 unsigned int pkt_len, status; 379 struct sk_buff *skb; 380 unsigned char *data; 381 382 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", 383 dev->name, __func__); 384 status = SMC_GET_RX_STS_FIFO(lp); 385 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x\n", 386 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff); 387 pkt_len = (status & RX_STS_PKT_LEN_) >> 16; 388 if (status & RX_STS_ES_) { 389 /* Deal with a bad packet */ 390 dev->stats.rx_errors++; 391 if (status & RX_STS_CRC_ERR_) 392 dev->stats.rx_crc_errors++; 393 else { 394 if (status & RX_STS_LEN_ERR_) 395 dev->stats.rx_length_errors++; 396 if (status & RX_STS_MCAST_) 397 dev->stats.multicast++; 398 } 399 /* Remove the bad packet data from the RX FIFO */ 400 smc911x_drop_pkt(dev); 401 } else { 402 /* Receive a valid packet */ 403 /* Alloc a buffer with extra room for DMA alignment */ 404 skb = netdev_alloc_skb(dev, pkt_len+32); 405 if (unlikely(skb == NULL)) { 406 PRINTK( "%s: Low memory, rcvd packet dropped.\n", 407 dev->name); 408 dev->stats.rx_dropped++; 409 smc911x_drop_pkt(dev); 410 return; 411 } 412 /* Align IP header to 32 bits 413 * Note that the device is configured to add a 2 414 * byte padding to the packet start, so we really 415 * want to write to the orignal data pointer */ 416 data = skb->data; 417 skb_reserve(skb, 2); 418 skb_put(skb,pkt_len-4); 419#ifdef SMC_USE_DMA 420 { 421 unsigned int fifo; 422 /* Lower the FIFO threshold if possible */ 423 fifo = SMC_GET_FIFO_INT(lp); 424 if (fifo & 0xFF) fifo--; 425 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n", 426 dev->name, fifo & 0xff); 427 SMC_SET_FIFO_INT(lp, fifo); 428 /* Setup RX DMA */ 429 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_)); 430 lp->rxdma_active = 1; 431 lp->current_rx_skb = skb; 432 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15); 433 /* Packet processing deferred to DMA RX interrupt */ 434 } 435#else 436 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_)); 437 SMC_PULL_DATA(lp, data, pkt_len+2+3); 438 439 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name); 440 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64); 441 skb->protocol = eth_type_trans(skb, dev); 442 netif_rx(skb); 443 dev->stats.rx_packets++; 444 dev->stats.rx_bytes += pkt_len-4; 445#endif 446 } 447} 448 449/* 450 * This is called to actually send a packet to the chip. 451 */ 452static void smc911x_hardware_send_pkt(struct net_device *dev) 453{ 454 struct smc911x_local *lp = netdev_priv(dev); 455 struct sk_buff *skb; 456 unsigned int cmdA, cmdB, len; 457 unsigned char *buf; 458 459 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __func__); 460 BUG_ON(lp->pending_tx_skb == NULL); 461 462 skb = lp->pending_tx_skb; 463 lp->pending_tx_skb = NULL; 464 465 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */ 466 /* cmdB {31:16] pkt tag [10:0] length */ 467#ifdef SMC_USE_DMA 468 /* 16 byte buffer alignment mode */ 469 buf = (char*)((u32)(skb->data) & ~0xF); 470 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF; 471 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) | 472 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ | 473 skb->len; 474#else 475 buf = (char*)((u32)skb->data & ~0x3); 476 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3; 477 cmdA = (((u32)skb->data & 0x3) << 16) | 478 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ | 479 skb->len; 480#endif 481 /* tag is packet length so we can use this in stats update later */ 482 cmdB = (skb->len << 16) | (skb->len & 0x7FF); 483 484 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n", 485 dev->name, len, len, buf, cmdA, cmdB); 486 SMC_SET_TX_FIFO(lp, cmdA); 487 SMC_SET_TX_FIFO(lp, cmdB); 488 489 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name); 490 PRINT_PKT(buf, len <= 64 ? len : 64); 491 492 /* Send pkt via PIO or DMA */ 493#ifdef SMC_USE_DMA 494 lp->current_tx_skb = skb; 495 SMC_PUSH_DATA(lp, buf, len); 496 /* DMA complete IRQ will free buffer and set jiffies */ 497#else 498 SMC_PUSH_DATA(lp, buf, len); 499 dev->trans_start = jiffies; 500 dev_kfree_skb_irq(skb); 501#endif 502 if (!lp->tx_throttle) { 503 netif_wake_queue(dev); 504 } 505 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_); 506} 507 508/* 509 * Since I am not sure if I will have enough room in the chip's ram 510 * to store the packet, I call this routine which either sends it 511 * now, or set the card to generates an interrupt when ready 512 * for the packet. 513 */ 514static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) 515{ 516 struct smc911x_local *lp = netdev_priv(dev); 517 unsigned int free; 518 unsigned long flags; 519 520 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", 521 dev->name, __func__); 522 523 spin_lock_irqsave(&lp->lock, flags); 524 525 BUG_ON(lp->pending_tx_skb != NULL); 526 527 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_; 528 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free); 529 530 /* Turn off the flow when running out of space in FIFO */ 531 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) { 532 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n", 533 dev->name, free); 534 /* Reenable when at least 1 packet of size MTU present */ 535 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64); 536 lp->tx_throttle = 1; 537 netif_stop_queue(dev); 538 } 539 540 /* Drop packets when we run out of space in TX FIFO 541 * Account for overhead required for: 542 * 543 * Tx command words 8 bytes 544 * Start offset 15 bytes 545 * End padding 15 bytes 546 */ 547 if (unlikely(free < (skb->len + 8 + 15 + 15))) { 548 printk("%s: No Tx free space %d < %d\n", 549 dev->name, free, skb->len); 550 lp->pending_tx_skb = NULL; 551 dev->stats.tx_errors++; 552 dev->stats.tx_dropped++; 553 spin_unlock_irqrestore(&lp->lock, flags); 554 dev_kfree_skb(skb); 555 return NETDEV_TX_OK; 556 } 557 558#ifdef SMC_USE_DMA 559 { 560 /* If the DMA is already running then defer this packet Tx until 561 * the DMA IRQ starts it 562 */ 563 if (lp->txdma_active) { 564 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name); 565 lp->pending_tx_skb = skb; 566 netif_stop_queue(dev); 567 spin_unlock_irqrestore(&lp->lock, flags); 568 return NETDEV_TX_OK; 569 } else { 570 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name); 571 lp->txdma_active = 1; 572 } 573 } 574#endif 575 lp->pending_tx_skb = skb; 576 smc911x_hardware_send_pkt(dev); 577 spin_unlock_irqrestore(&lp->lock, flags); 578 579 return NETDEV_TX_OK; 580} 581 582/* 583 * This handles a TX status interrupt, which is only called when: 584 * - a TX error occurred, or 585 * - TX of a packet completed. 586 */ 587static void smc911x_tx(struct net_device *dev) 588{ 589 struct smc911x_local *lp = netdev_priv(dev); 590 unsigned int tx_status; 591 592 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", 593 dev->name, __func__); 594 595 /* Collect the TX status */ 596 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) { 597 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n", 598 dev->name, 599 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16); 600 tx_status = SMC_GET_TX_STS_FIFO(lp); 601 dev->stats.tx_packets++; 602 dev->stats.tx_bytes+=tx_status>>16; 603 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n", 604 dev->name, (tx_status & 0xffff0000) >> 16, 605 tx_status & 0x0000ffff); 606 /* count Tx errors, but ignore lost carrier errors when in 607 * full-duplex mode */ 608 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx && 609 !(tx_status & 0x00000306))) { 610 dev->stats.tx_errors++; 611 } 612 if (tx_status & TX_STS_MANY_COLL_) { 613 dev->stats.collisions+=16; 614 dev->stats.tx_aborted_errors++; 615 } else { 616 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3; 617 } 618 /* carrier error only has meaning for half-duplex communication */ 619 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) && 620 !lp->ctl_rfduplx) { 621 dev->stats.tx_carrier_errors++; 622 } 623 if (tx_status & TX_STS_LATE_COLL_) { 624 dev->stats.collisions++; 625 dev->stats.tx_aborted_errors++; 626 } 627 } 628} 629 630 631/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/ 632/* 633 * Reads a register from the MII Management serial interface 634 */ 635 636static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg) 637{ 638 struct smc911x_local *lp = netdev_priv(dev); 639 unsigned int phydata; 640 641 SMC_GET_MII(lp, phyreg, phyaddr, phydata); 642 643 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n", 644 __func__, phyaddr, phyreg, phydata); 645 return phydata; 646} 647 648 649/* 650 * Writes a register to the MII Management serial interface 651 */ 652static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg, 653 int phydata) 654{ 655 struct smc911x_local *lp = netdev_priv(dev); 656 657 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n", 658 __func__, phyaddr, phyreg, phydata); 659 660 SMC_SET_MII(lp, phyreg, phyaddr, phydata); 661} 662 663/* 664 * Finds and reports the PHY address (115 and 117 have external 665 * PHY interface 118 has internal only 666 */ 667static void smc911x_phy_detect(struct net_device *dev) 668{ 669 struct smc911x_local *lp = netdev_priv(dev); 670 int phyaddr; 671 unsigned int cfg, id1, id2; 672 673 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 674 675 lp->phy_type = 0; 676 677 /* 678 * Scan all 32 PHY addresses if necessary, starting at 679 * PHY#1 to PHY#31, and then PHY#0 last. 680 */ 681 switch(lp->version) { 682 case CHIP_9115: 683 case CHIP_9117: 684 case CHIP_9215: 685 case CHIP_9217: 686 cfg = SMC_GET_HW_CFG(lp); 687 if (cfg & HW_CFG_EXT_PHY_DET_) { 688 cfg &= ~HW_CFG_PHY_CLK_SEL_; 689 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; 690 SMC_SET_HW_CFG(lp, cfg); 691 udelay(10); /* Wait for clocks to stop */ 692 693 cfg |= HW_CFG_EXT_PHY_EN_; 694 SMC_SET_HW_CFG(lp, cfg); 695 udelay(10); /* Wait for clocks to stop */ 696 697 cfg &= ~HW_CFG_PHY_CLK_SEL_; 698 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; 699 SMC_SET_HW_CFG(lp, cfg); 700 udelay(10); /* Wait for clocks to stop */ 701 702 cfg |= HW_CFG_SMI_SEL_; 703 SMC_SET_HW_CFG(lp, cfg); 704 705 for (phyaddr = 1; phyaddr < 32; ++phyaddr) { 706 707 /* Read the PHY identifiers */ 708 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1); 709 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2); 710 711 /* Make sure it is a valid identifier */ 712 if (id1 != 0x0000 && id1 != 0xffff && 713 id1 != 0x8000 && id2 != 0x0000 && 714 id2 != 0xffff && id2 != 0x8000) { 715 /* Save the PHY's address */ 716 lp->mii.phy_id = phyaddr & 31; 717 lp->phy_type = id1 << 16 | id2; 718 break; 719 } 720 } 721 if (phyaddr < 32) 722 /* Found an external PHY */ 723 break; 724 } 725 default: 726 /* Internal media only */ 727 SMC_GET_PHY_ID1(lp, 1, id1); 728 SMC_GET_PHY_ID2(lp, 1, id2); 729 /* Save the PHY's address */ 730 lp->mii.phy_id = 1; 731 lp->phy_type = id1 << 16 | id2; 732 } 733 734 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n", 735 dev->name, id1, id2, lp->mii.phy_id); 736} 737 738/* 739 * Sets the PHY to a configuration as determined by the user. 740 * Called with spin_lock held. 741 */ 742static int smc911x_phy_fixed(struct net_device *dev) 743{ 744 struct smc911x_local *lp = netdev_priv(dev); 745 int phyaddr = lp->mii.phy_id; 746 int bmcr; 747 748 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 749 750 /* Enter Link Disable state */ 751 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr); 752 bmcr |= BMCR_PDOWN; 753 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); 754 755 /* 756 * Set our fixed capabilities 757 * Disable auto-negotiation 758 */ 759 bmcr &= ~BMCR_ANENABLE; 760 if (lp->ctl_rfduplx) 761 bmcr |= BMCR_FULLDPLX; 762 763 if (lp->ctl_rspeed == 100) 764 bmcr |= BMCR_SPEED100; 765 766 /* Write our capabilities to the phy control register */ 767 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); 768 769 /* Re-Configure the Receive/Phy Control register */ 770 bmcr &= ~BMCR_PDOWN; 771 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); 772 773 return 1; 774} 775 776/* 777 * smc911x_phy_reset - reset the phy 778 * @dev: net device 779 * @phy: phy address 780 * 781 * Issue a software reset for the specified PHY and 782 * wait up to 100ms for the reset to complete. We should 783 * not access the PHY for 50ms after issuing the reset. 784 * 785 * The time to wait appears to be dependent on the PHY. 786 * 787 */ 788static int smc911x_phy_reset(struct net_device *dev, int phy) 789{ 790 struct smc911x_local *lp = netdev_priv(dev); 791 int timeout; 792 unsigned long flags; 793 unsigned int reg; 794 795 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__); 796 797 spin_lock_irqsave(&lp->lock, flags); 798 reg = SMC_GET_PMT_CTRL(lp); 799 reg &= ~0xfffff030; 800 reg |= PMT_CTRL_PHY_RST_; 801 SMC_SET_PMT_CTRL(lp, reg); 802 spin_unlock_irqrestore(&lp->lock, flags); 803 for (timeout = 2; timeout; timeout--) { 804 msleep(50); 805 spin_lock_irqsave(&lp->lock, flags); 806 reg = SMC_GET_PMT_CTRL(lp); 807 spin_unlock_irqrestore(&lp->lock, flags); 808 if (!(reg & PMT_CTRL_PHY_RST_)) { 809 /* extra delay required because the phy may 810 * not be completed with its reset 811 * when PHY_BCR_RESET_ is cleared. 256us 812 * should suffice, but use 500us to be safe 813 */ 814 udelay(500); 815 break; 816 } 817 } 818 819 return reg & PMT_CTRL_PHY_RST_; 820} 821 822/* 823 * smc911x_phy_powerdown - powerdown phy 824 * @dev: net device 825 * @phy: phy address 826 * 827 * Power down the specified PHY 828 */ 829static void smc911x_phy_powerdown(struct net_device *dev, int phy) 830{ 831 struct smc911x_local *lp = netdev_priv(dev); 832 unsigned int bmcr; 833 834 /* Enter Link Disable state */ 835 SMC_GET_PHY_BMCR(lp, phy, bmcr); 836 bmcr |= BMCR_PDOWN; 837 SMC_SET_PHY_BMCR(lp, phy, bmcr); 838} 839 840/* 841 * smc911x_phy_check_media - check the media status and adjust BMCR 842 * @dev: net device 843 * @init: set true for initialisation 844 * 845 * Select duplex mode depending on negotiation state. This 846 * also updates our carrier state. 847 */ 848static void smc911x_phy_check_media(struct net_device *dev, int init) 849{ 850 struct smc911x_local *lp = netdev_priv(dev); 851 int phyaddr = lp->mii.phy_id; 852 unsigned int bmcr, cr; 853 854 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 855 856 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) { 857 /* duplex state has changed */ 858 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr); 859 SMC_GET_MAC_CR(lp, cr); 860 if (lp->mii.full_duplex) { 861 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name); 862 bmcr |= BMCR_FULLDPLX; 863 cr |= MAC_CR_RCVOWN_; 864 } else { 865 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name); 866 bmcr &= ~BMCR_FULLDPLX; 867 cr &= ~MAC_CR_RCVOWN_; 868 } 869 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); 870 SMC_SET_MAC_CR(lp, cr); 871 } 872} 873 874/* 875 * Configures the specified PHY through the MII management interface 876 * using Autonegotiation. 877 * Calls smc911x_phy_fixed() if the user has requested a certain config. 878 * If RPC ANEG bit is set, the media selection is dependent purely on 879 * the selection by the MII (either in the MII BMCR reg or the result 880 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection 881 * is controlled by the RPC SPEED and RPC DPLX bits. 882 */ 883static void smc911x_phy_configure(struct work_struct *work) 884{ 885 struct smc911x_local *lp = container_of(work, struct smc911x_local, 886 phy_configure); 887 struct net_device *dev = lp->netdev; 888 int phyaddr = lp->mii.phy_id; 889 int my_phy_caps; /* My PHY capabilities */ 890 int my_ad_caps; /* My Advertised capabilities */ 891 int status; 892 unsigned long flags; 893 894 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__); 895 896 /* 897 * We should not be called if phy_type is zero. 898 */ 899 if (lp->phy_type == 0) 900 return; 901 902 if (smc911x_phy_reset(dev, phyaddr)) { 903 printk("%s: PHY reset timed out\n", dev->name); 904 return; 905 } 906 spin_lock_irqsave(&lp->lock, flags); 907 908 /* 909 * Enable PHY Interrupts (for register 18) 910 * Interrupts listed here are enabled 911 */ 912 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ | 913 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ | 914 PHY_INT_MASK_LINK_DOWN_); 915 916 /* If the user requested no auto neg, then go set his request */ 917 if (lp->mii.force_media) { 918 smc911x_phy_fixed(dev); 919 goto smc911x_phy_configure_exit; 920 } 921 922 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */ 923 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps); 924 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) { 925 printk(KERN_INFO "Auto negotiation NOT supported\n"); 926 smc911x_phy_fixed(dev); 927 goto smc911x_phy_configure_exit; 928 } 929 930 /* CSMA capable w/ both pauses */ 931 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; 932 933 if (my_phy_caps & BMSR_100BASE4) 934 my_ad_caps |= ADVERTISE_100BASE4; 935 if (my_phy_caps & BMSR_100FULL) 936 my_ad_caps |= ADVERTISE_100FULL; 937 if (my_phy_caps & BMSR_100HALF) 938 my_ad_caps |= ADVERTISE_100HALF; 939 if (my_phy_caps & BMSR_10FULL) 940 my_ad_caps |= ADVERTISE_10FULL; 941 if (my_phy_caps & BMSR_10HALF) 942 my_ad_caps |= ADVERTISE_10HALF; 943 944 /* Disable capabilities not selected by our user */ 945 if (lp->ctl_rspeed != 100) 946 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF); 947 948 if (!lp->ctl_rfduplx) 949 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL); 950 951 /* Update our Auto-Neg Advertisement Register */ 952 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps); 953 lp->mii.advertising = my_ad_caps; 954 955 /* 956 * Read the register back. Without this, it appears that when 957 * auto-negotiation is restarted, sometimes it isn't ready and 958 * the link does not come up. 959 */ 960 udelay(10); 961 SMC_GET_PHY_MII_ADV(lp, phyaddr, status); 962 963 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps); 964 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps); 965 966 /* Restart auto-negotiation process in order to advertise my caps */ 967 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART); 968 969 smc911x_phy_check_media(dev, 1); 970 971smc911x_phy_configure_exit: 972 spin_unlock_irqrestore(&lp->lock, flags); 973} 974 975/* 976 * smc911x_phy_interrupt 977 * 978 * Purpose: Handle interrupts relating to PHY register 18. This is 979 * called from the "hard" interrupt handler under our private spinlock. 980 */ 981static void smc911x_phy_interrupt(struct net_device *dev) 982{ 983 struct smc911x_local *lp = netdev_priv(dev); 984 int phyaddr = lp->mii.phy_id; 985 int status; 986 987 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 988 989 if (lp->phy_type == 0) 990 return; 991 992 smc911x_phy_check_media(dev, 0); 993 /* read to clear status bits */ 994 SMC_GET_PHY_INT_SRC(lp, phyaddr,status); 995 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n", 996 dev->name, status & 0xffff); 997 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n", 998 dev->name, SMC_GET_AFC_CFG(lp)); 999} 1000 1001/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/ 1002 1003/* 1004 * This is the main routine of the driver, to handle the device when 1005 * it needs some attention. 1006 */ 1007static irqreturn_t smc911x_interrupt(int irq, void *dev_id) 1008{ 1009 struct net_device *dev = dev_id; 1010 struct smc911x_local *lp = netdev_priv(dev); 1011 unsigned int status, mask, timeout; 1012 unsigned int rx_overrun=0, cr, pkts; 1013 unsigned long flags; 1014 1015 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 1016 1017 spin_lock_irqsave(&lp->lock, flags); 1018 1019 /* Spurious interrupt check */ 1020 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) != 1021 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) { 1022 spin_unlock_irqrestore(&lp->lock, flags); 1023 return IRQ_NONE; 1024 } 1025 1026 mask = SMC_GET_INT_EN(lp); 1027 SMC_SET_INT_EN(lp, 0); 1028 1029 /* set a timeout value, so I don't stay here forever */ 1030 timeout = 8; 1031 1032 1033 do { 1034 status = SMC_GET_INT(lp); 1035 1036 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n", 1037 dev->name, status, mask, status & ~mask); 1038 1039 status &= mask; 1040 if (!status) 1041 break; 1042 1043 /* Handle SW interrupt condition */ 1044 if (status & INT_STS_SW_INT_) { 1045 SMC_ACK_INT(lp, INT_STS_SW_INT_); 1046 mask &= ~INT_EN_SW_INT_EN_; 1047 } 1048 /* Handle various error conditions */ 1049 if (status & INT_STS_RXE_) { 1050 SMC_ACK_INT(lp, INT_STS_RXE_); 1051 dev->stats.rx_errors++; 1052 } 1053 if (status & INT_STS_RXDFH_INT_) { 1054 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_); 1055 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp); 1056 } 1057 /* Undocumented interrupt-what is the right thing to do here? */ 1058 if (status & INT_STS_RXDF_INT_) { 1059 SMC_ACK_INT(lp, INT_STS_RXDF_INT_); 1060 } 1061 1062 /* Rx Data FIFO exceeds set level */ 1063 if (status & INT_STS_RDFL_) { 1064 if (IS_REV_A(lp->revision)) { 1065 rx_overrun=1; 1066 SMC_GET_MAC_CR(lp, cr); 1067 cr &= ~MAC_CR_RXEN_; 1068 SMC_SET_MAC_CR(lp, cr); 1069 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name); 1070 dev->stats.rx_errors++; 1071 dev->stats.rx_fifo_errors++; 1072 } 1073 SMC_ACK_INT(lp, INT_STS_RDFL_); 1074 } 1075 if (status & INT_STS_RDFO_) { 1076 if (!IS_REV_A(lp->revision)) { 1077 SMC_GET_MAC_CR(lp, cr); 1078 cr &= ~MAC_CR_RXEN_; 1079 SMC_SET_MAC_CR(lp, cr); 1080 rx_overrun=1; 1081 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name); 1082 dev->stats.rx_errors++; 1083 dev->stats.rx_fifo_errors++; 1084 } 1085 SMC_ACK_INT(lp, INT_STS_RDFO_); 1086 } 1087 /* Handle receive condition */ 1088 if ((status & INT_STS_RSFL_) || rx_overrun) { 1089 unsigned int fifo; 1090 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name); 1091 fifo = SMC_GET_RX_FIFO_INF(lp); 1092 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16; 1093 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n", 1094 dev->name, pkts, fifo & 0xFFFF ); 1095 if (pkts != 0) { 1096#ifdef SMC_USE_DMA 1097 unsigned int fifo; 1098 if (lp->rxdma_active){ 1099 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, 1100 "%s: RX DMA active\n", dev->name); 1101 /* The DMA is already running so up the IRQ threshold */ 1102 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF; 1103 fifo |= pkts & 0xFF; 1104 DBG(SMC_DEBUG_RX, 1105 "%s: Setting RX stat FIFO threshold to %d\n", 1106 dev->name, fifo & 0xff); 1107 SMC_SET_FIFO_INT(lp, fifo); 1108 } else 1109#endif 1110 smc911x_rcv(dev); 1111 } 1112 SMC_ACK_INT(lp, INT_STS_RSFL_); 1113 } 1114 /* Handle transmit FIFO available */ 1115 if (status & INT_STS_TDFA_) { 1116 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name); 1117 SMC_SET_FIFO_TDA(lp, 0xFF); 1118 lp->tx_throttle = 0; 1119#ifdef SMC_USE_DMA 1120 if (!lp->txdma_active) 1121#endif 1122 netif_wake_queue(dev); 1123 SMC_ACK_INT(lp, INT_STS_TDFA_); 1124 } 1125 /* Handle transmit done condition */ 1126#if 1 1127 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) { 1128 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, 1129 "%s: Tx stat FIFO limit (%d) /GPT irq\n", 1130 dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16); 1131 smc911x_tx(dev); 1132 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000); 1133 SMC_ACK_INT(lp, INT_STS_TSFL_); 1134 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_); 1135 } 1136#else 1137 if (status & INT_STS_TSFL_) { 1138 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq\n", dev->name, ); 1139 smc911x_tx(dev); 1140 SMC_ACK_INT(lp, INT_STS_TSFL_); 1141 } 1142 1143 if (status & INT_STS_GPT_INT_) { 1144 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n", 1145 dev->name, 1146 SMC_GET_IRQ_CFG(lp), 1147 SMC_GET_FIFO_INT(lp), 1148 SMC_GET_RX_CFG(lp)); 1149 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x " 1150 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n", 1151 dev->name, 1152 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16, 1153 SMC_GET_RX_FIFO_INF(lp) & 0xffff, 1154 SMC_GET_RX_STS_FIFO_PEEK(lp)); 1155 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000); 1156 SMC_ACK_INT(lp, INT_STS_GPT_INT_); 1157 } 1158#endif 1159 1160 /* Handle PHY interrupt condition */ 1161 if (status & INT_STS_PHY_INT_) { 1162 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name); 1163 smc911x_phy_interrupt(dev); 1164 SMC_ACK_INT(lp, INT_STS_PHY_INT_); 1165 } 1166 } while (--timeout); 1167 1168 /* restore mask state */ 1169 SMC_SET_INT_EN(lp, mask); 1170 1171 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n", 1172 dev->name, 8-timeout); 1173 1174 spin_unlock_irqrestore(&lp->lock, flags); 1175 1176 return IRQ_HANDLED; 1177} 1178 1179#ifdef SMC_USE_DMA 1180static void 1181smc911x_tx_dma_irq(int dma, void *data) 1182{ 1183 struct net_device *dev = (struct net_device *)data; 1184 struct smc911x_local *lp = netdev_priv(dev); 1185 struct sk_buff *skb = lp->current_tx_skb; 1186 unsigned long flags; 1187 1188 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 1189 1190 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name); 1191 /* Clear the DMA interrupt sources */ 1192 SMC_DMA_ACK_IRQ(dev, dma); 1193 BUG_ON(skb == NULL); 1194 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE); 1195 dev->trans_start = jiffies; 1196 dev_kfree_skb_irq(skb); 1197 lp->current_tx_skb = NULL; 1198 if (lp->pending_tx_skb != NULL) 1199 smc911x_hardware_send_pkt(dev); 1200 else { 1201 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, 1202 "%s: No pending Tx packets. DMA disabled\n", dev->name); 1203 spin_lock_irqsave(&lp->lock, flags); 1204 lp->txdma_active = 0; 1205 if (!lp->tx_throttle) { 1206 netif_wake_queue(dev); 1207 } 1208 spin_unlock_irqrestore(&lp->lock, flags); 1209 } 1210 1211 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, 1212 "%s: TX DMA irq completed\n", dev->name); 1213} 1214static void 1215smc911x_rx_dma_irq(int dma, void *data) 1216{ 1217 struct net_device *dev = (struct net_device *)data; 1218 unsigned long ioaddr = dev->base_addr; 1219 struct smc911x_local *lp = netdev_priv(dev); 1220 struct sk_buff *skb = lp->current_rx_skb; 1221 unsigned long flags; 1222 unsigned int pkts; 1223 1224 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 1225 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name); 1226 /* Clear the DMA interrupt sources */ 1227 SMC_DMA_ACK_IRQ(dev, dma); 1228 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE); 1229 BUG_ON(skb == NULL); 1230 lp->current_rx_skb = NULL; 1231 PRINT_PKT(skb->data, skb->len); 1232 skb->protocol = eth_type_trans(skb, dev); 1233 dev->stats.rx_packets++; 1234 dev->stats.rx_bytes += skb->len; 1235 netif_rx(skb); 1236 1237 spin_lock_irqsave(&lp->lock, flags); 1238 pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16; 1239 if (pkts != 0) { 1240 smc911x_rcv(dev); 1241 }else { 1242 lp->rxdma_active = 0; 1243 } 1244 spin_unlock_irqrestore(&lp->lock, flags); 1245 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, 1246 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n", 1247 dev->name, pkts); 1248} 1249#endif /* SMC_USE_DMA */ 1250 1251#ifdef CONFIG_NET_POLL_CONTROLLER 1252/* 1253 * Polling receive - used by netconsole and other diagnostic tools 1254 * to allow network i/o with interrupts disabled. 1255 */ 1256static void smc911x_poll_controller(struct net_device *dev) 1257{ 1258 disable_irq(dev->irq); 1259 smc911x_interrupt(dev->irq, dev); 1260 enable_irq(dev->irq); 1261} 1262#endif 1263 1264/* Our watchdog timed out. Called by the networking layer */ 1265static void smc911x_timeout(struct net_device *dev) 1266{ 1267 struct smc911x_local *lp = netdev_priv(dev); 1268 int status, mask; 1269 unsigned long flags; 1270 1271 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 1272 1273 spin_lock_irqsave(&lp->lock, flags); 1274 status = SMC_GET_INT(lp); 1275 mask = SMC_GET_INT_EN(lp); 1276 spin_unlock_irqrestore(&lp->lock, flags); 1277 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x\n", 1278 dev->name, status, mask); 1279 1280 /* Dump the current TX FIFO contents and restart */ 1281 mask = SMC_GET_TX_CFG(lp); 1282 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_); 1283 /* 1284 * Reconfiguring the PHY doesn't seem like a bad idea here, but 1285 * smc911x_phy_configure() calls msleep() which calls schedule_timeout() 1286 * which calls schedule(). Hence we use a work queue. 1287 */ 1288 if (lp->phy_type != 0) 1289 schedule_work(&lp->phy_configure); 1290 1291 /* We can accept TX packets again */ 1292 dev->trans_start = jiffies; /* prevent tx timeout */ 1293 netif_wake_queue(dev); 1294} 1295 1296/* 1297 * This routine will, depending on the values passed to it, 1298 * either make it accept multicast packets, go into 1299 * promiscuous mode (for TCPDUMP and cousins) or accept 1300 * a select set of multicast packets 1301 */ 1302static void smc911x_set_multicast_list(struct net_device *dev) 1303{ 1304 struct smc911x_local *lp = netdev_priv(dev); 1305 unsigned int multicast_table[2]; 1306 unsigned int mcr, update_multicast = 0; 1307 unsigned long flags; 1308 1309 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 1310 1311 spin_lock_irqsave(&lp->lock, flags); 1312 SMC_GET_MAC_CR(lp, mcr); 1313 spin_unlock_irqrestore(&lp->lock, flags); 1314 1315 if (dev->flags & IFF_PROMISC) { 1316 1317 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name); 1318 mcr |= MAC_CR_PRMS_; 1319 } 1320 /* 1321 * Here, I am setting this to accept all multicast packets. 1322 * I don't need to zero the multicast table, because the flag is 1323 * checked before the table is 1324 */ 1325 else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) { 1326 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name); 1327 mcr |= MAC_CR_MCPAS_; 1328 } 1329 1330 /* 1331 * This sets the internal hardware table to filter out unwanted 1332 * multicast packets before they take up memory. 1333 * 1334 * The SMC chip uses a hash table where the high 6 bits of the CRC of 1335 * address are the offset into the table. If that bit is 1, then the 1336 * multicast packet is accepted. Otherwise, it's dropped silently. 1337 * 1338 * To use the 6 bits as an offset into the table, the high 1 bit is 1339 * the number of the 32 bit register, while the low 5 bits are the bit 1340 * within that register. 1341 */ 1342 else if (!netdev_mc_empty(dev)) { 1343 struct netdev_hw_addr *ha; 1344 1345 /* Set the Hash perfec mode */ 1346 mcr |= MAC_CR_HPFILT_; 1347 1348 /* start with a table of all zeros: reject all */ 1349 memset(multicast_table, 0, sizeof(multicast_table)); 1350 1351 netdev_for_each_mc_addr(ha, dev) { 1352 u32 position; 1353 1354 /* upper 6 bits are used as hash index */ 1355 position = ether_crc(ETH_ALEN, ha->addr)>>26; 1356 1357 multicast_table[position>>5] |= 1 << (position&0x1f); 1358 } 1359 1360 /* be sure I get rid of flags I might have set */ 1361 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); 1362 1363 /* now, the table can be loaded into the chipset */ 1364 update_multicast = 1; 1365 } else { 1366 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n", 1367 dev->name); 1368 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); 1369 1370 /* 1371 * since I'm disabling all multicast entirely, I need to 1372 * clear the multicast list 1373 */ 1374 memset(multicast_table, 0, sizeof(multicast_table)); 1375 update_multicast = 1; 1376 } 1377 1378 spin_lock_irqsave(&lp->lock, flags); 1379 SMC_SET_MAC_CR(lp, mcr); 1380 if (update_multicast) { 1381 DBG(SMC_DEBUG_MISC, 1382 "%s: update mcast hash table 0x%08x 0x%08x\n", 1383 dev->name, multicast_table[0], multicast_table[1]); 1384 SMC_SET_HASHL(lp, multicast_table[0]); 1385 SMC_SET_HASHH(lp, multicast_table[1]); 1386 } 1387 spin_unlock_irqrestore(&lp->lock, flags); 1388} 1389 1390 1391/* 1392 * Open and Initialize the board 1393 * 1394 * Set up everything, reset the card, etc.. 1395 */ 1396static int 1397smc911x_open(struct net_device *dev) 1398{ 1399 struct smc911x_local *lp = netdev_priv(dev); 1400 1401 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 1402 1403 /* 1404 * Check that the address is valid. If its not, refuse 1405 * to bring the device up. The user must specify an 1406 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx 1407 */ 1408 if (!is_valid_ether_addr(dev->dev_addr)) { 1409 PRINTK("%s: no valid ethernet hw addr\n", __func__); 1410 return -EINVAL; 1411 } 1412 1413 /* reset the hardware */ 1414 smc911x_reset(dev); 1415 1416 /* Configure the PHY, initialize the link state */ 1417 smc911x_phy_configure(&lp->phy_configure); 1418 1419 /* Turn on Tx + Rx */ 1420 smc911x_enable(dev); 1421 1422 netif_start_queue(dev); 1423 1424 return 0; 1425} 1426 1427/* 1428 * smc911x_close 1429 * 1430 * this makes the board clean up everything that it can 1431 * and not talk to the outside world. Caused by 1432 * an 'ifconfig ethX down' 1433 */ 1434static int smc911x_close(struct net_device *dev) 1435{ 1436 struct smc911x_local *lp = netdev_priv(dev); 1437 1438 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 1439 1440 netif_stop_queue(dev); 1441 netif_carrier_off(dev); 1442 1443 /* clear everything */ 1444 smc911x_shutdown(dev); 1445 1446 if (lp->phy_type != 0) { 1447 /* We need to ensure that no calls to 1448 * smc911x_phy_configure are pending. 1449 */ 1450 cancel_work_sync(&lp->phy_configure); 1451 smc911x_phy_powerdown(dev, lp->mii.phy_id); 1452 } 1453 1454 if (lp->pending_tx_skb) { 1455 dev_kfree_skb(lp->pending_tx_skb); 1456 lp->pending_tx_skb = NULL; 1457 } 1458 1459 return 0; 1460} 1461 1462/* 1463 * Ethtool support 1464 */ 1465static int 1466smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1467{ 1468 struct smc911x_local *lp = netdev_priv(dev); 1469 int ret, status; 1470 unsigned long flags; 1471 1472 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 1473 cmd->maxtxpkt = 1; 1474 cmd->maxrxpkt = 1; 1475 1476 if (lp->phy_type != 0) { 1477 spin_lock_irqsave(&lp->lock, flags); 1478 ret = mii_ethtool_gset(&lp->mii, cmd); 1479 spin_unlock_irqrestore(&lp->lock, flags); 1480 } else { 1481 cmd->supported = SUPPORTED_10baseT_Half | 1482 SUPPORTED_10baseT_Full | 1483 SUPPORTED_TP | SUPPORTED_AUI; 1484 1485 if (lp->ctl_rspeed == 10) 1486 ethtool_cmd_speed_set(cmd, SPEED_10); 1487 else if (lp->ctl_rspeed == 100) 1488 ethtool_cmd_speed_set(cmd, SPEED_100); 1489 1490 cmd->autoneg = AUTONEG_DISABLE; 1491 if (lp->mii.phy_id==1) 1492 cmd->transceiver = XCVR_INTERNAL; 1493 else 1494 cmd->transceiver = XCVR_EXTERNAL; 1495 cmd->port = 0; 1496 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status); 1497 cmd->duplex = 1498 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ? 1499 DUPLEX_FULL : DUPLEX_HALF; 1500 ret = 0; 1501 } 1502 1503 return ret; 1504} 1505 1506static int 1507smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1508{ 1509 struct smc911x_local *lp = netdev_priv(dev); 1510 int ret; 1511 unsigned long flags; 1512 1513 if (lp->phy_type != 0) { 1514 spin_lock_irqsave(&lp->lock, flags); 1515 ret = mii_ethtool_sset(&lp->mii, cmd); 1516 spin_unlock_irqrestore(&lp->lock, flags); 1517 } else { 1518 if (cmd->autoneg != AUTONEG_DISABLE || 1519 cmd->speed != SPEED_10 || 1520 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) || 1521 (cmd->port != PORT_TP && cmd->port != PORT_AUI)) 1522 return -EINVAL; 1523 1524 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL; 1525 1526 ret = 0; 1527 } 1528 1529 return ret; 1530} 1531 1532static void 1533smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1534{ 1535 strncpy(info->driver, CARDNAME, sizeof(info->driver)); 1536 strncpy(info->version, version, sizeof(info->version)); 1537 strncpy(info->bus_info, dev_name(dev->dev.parent), sizeof(info->bus_info)); 1538} 1539 1540static int smc911x_ethtool_nwayreset(struct net_device *dev) 1541{ 1542 struct smc911x_local *lp = netdev_priv(dev); 1543 int ret = -EINVAL; 1544 unsigned long flags; 1545 1546 if (lp->phy_type != 0) { 1547 spin_lock_irqsave(&lp->lock, flags); 1548 ret = mii_nway_restart(&lp->mii); 1549 spin_unlock_irqrestore(&lp->lock, flags); 1550 } 1551 1552 return ret; 1553} 1554 1555static u32 smc911x_ethtool_getmsglevel(struct net_device *dev) 1556{ 1557 struct smc911x_local *lp = netdev_priv(dev); 1558 return lp->msg_enable; 1559} 1560 1561static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) 1562{ 1563 struct smc911x_local *lp = netdev_priv(dev); 1564 lp->msg_enable = level; 1565} 1566 1567static int smc911x_ethtool_getregslen(struct net_device *dev) 1568{ 1569 /* System regs + MAC regs + PHY regs */ 1570 return (((E2P_CMD - ID_REV)/4 + 1) + 1571 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32); 1572} 1573 1574static void smc911x_ethtool_getregs(struct net_device *dev, 1575 struct ethtool_regs* regs, void *buf) 1576{ 1577 struct smc911x_local *lp = netdev_priv(dev); 1578 unsigned long flags; 1579 u32 reg,i,j=0; 1580 u32 *data = (u32*)buf; 1581 1582 regs->version = lp->version; 1583 for(i=ID_REV;i<=E2P_CMD;i+=4) { 1584 data[j++] = SMC_inl(lp, i); 1585 } 1586 for(i=MAC_CR;i<=WUCSR;i++) { 1587 spin_lock_irqsave(&lp->lock, flags); 1588 SMC_GET_MAC_CSR(lp, i, reg); 1589 spin_unlock_irqrestore(&lp->lock, flags); 1590 data[j++] = reg; 1591 } 1592 for(i=0;i<=31;i++) { 1593 spin_lock_irqsave(&lp->lock, flags); 1594 SMC_GET_MII(lp, i, lp->mii.phy_id, reg); 1595 spin_unlock_irqrestore(&lp->lock, flags); 1596 data[j++] = reg & 0xFFFF; 1597 } 1598} 1599 1600static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev) 1601{ 1602 struct smc911x_local *lp = netdev_priv(dev); 1603 unsigned int timeout; 1604 int e2p_cmd; 1605 1606 e2p_cmd = SMC_GET_E2P_CMD(lp); 1607 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) { 1608 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) { 1609 PRINTK("%s: %s timeout waiting for EEPROM to respond\n", 1610 dev->name, __func__); 1611 return -EFAULT; 1612 } 1613 mdelay(1); 1614 e2p_cmd = SMC_GET_E2P_CMD(lp); 1615 } 1616 if (timeout == 0) { 1617 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n", 1618 dev->name, __func__); 1619 return -ETIMEDOUT; 1620 } 1621 return 0; 1622} 1623 1624static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev, 1625 int cmd, int addr) 1626{ 1627 struct smc911x_local *lp = netdev_priv(dev); 1628 int ret; 1629 1630 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) 1631 return ret; 1632 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ | 1633 ((cmd) & (0x7<<28)) | 1634 ((addr) & 0xFF)); 1635 return 0; 1636} 1637 1638static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev, 1639 u8 *data) 1640{ 1641 struct smc911x_local *lp = netdev_priv(dev); 1642 int ret; 1643 1644 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) 1645 return ret; 1646 *data = SMC_GET_E2P_DATA(lp); 1647 return 0; 1648} 1649 1650static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev, 1651 u8 data) 1652{ 1653 struct smc911x_local *lp = netdev_priv(dev); 1654 int ret; 1655 1656 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) 1657 return ret; 1658 SMC_SET_E2P_DATA(lp, data); 1659 return 0; 1660} 1661 1662static int smc911x_ethtool_geteeprom(struct net_device *dev, 1663 struct ethtool_eeprom *eeprom, u8 *data) 1664{ 1665 u8 eebuf[SMC911X_EEPROM_LEN]; 1666 int i, ret; 1667 1668 for(i=0;i<SMC911X_EEPROM_LEN;i++) { 1669 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0) 1670 return ret; 1671 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0) 1672 return ret; 1673 } 1674 memcpy(data, eebuf+eeprom->offset, eeprom->len); 1675 return 0; 1676} 1677 1678static int smc911x_ethtool_seteeprom(struct net_device *dev, 1679 struct ethtool_eeprom *eeprom, u8 *data) 1680{ 1681 int i, ret; 1682 1683 /* Enable erase */ 1684 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0) 1685 return ret; 1686 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) { 1687 /* erase byte */ 1688 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0) 1689 return ret; 1690 /* write byte */ 1691 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0) 1692 return ret; 1693 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0) 1694 return ret; 1695 } 1696 return 0; 1697} 1698 1699static int smc911x_ethtool_geteeprom_len(struct net_device *dev) 1700{ 1701 return SMC911X_EEPROM_LEN; 1702} 1703 1704static const struct ethtool_ops smc911x_ethtool_ops = { 1705 .get_settings = smc911x_ethtool_getsettings, 1706 .set_settings = smc911x_ethtool_setsettings, 1707 .get_drvinfo = smc911x_ethtool_getdrvinfo, 1708 .get_msglevel = smc911x_ethtool_getmsglevel, 1709 .set_msglevel = smc911x_ethtool_setmsglevel, 1710 .nway_reset = smc911x_ethtool_nwayreset, 1711 .get_link = ethtool_op_get_link, 1712 .get_regs_len = smc911x_ethtool_getregslen, 1713 .get_regs = smc911x_ethtool_getregs, 1714 .get_eeprom_len = smc911x_ethtool_geteeprom_len, 1715 .get_eeprom = smc911x_ethtool_geteeprom, 1716 .set_eeprom = smc911x_ethtool_seteeprom, 1717}; 1718 1719/* 1720 * smc911x_findirq 1721 * 1722 * This routine has a simple purpose -- make the SMC chip generate an 1723 * interrupt, so an auto-detect routine can detect it, and find the IRQ, 1724 */ 1725static int __devinit smc911x_findirq(struct net_device *dev) 1726{ 1727 struct smc911x_local *lp = netdev_priv(dev); 1728 int timeout = 20; 1729 unsigned long cookie; 1730 1731 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__); 1732 1733 cookie = probe_irq_on(); 1734 1735 /* 1736 * Force a SW interrupt 1737 */ 1738 1739 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_); 1740 1741 /* 1742 * Wait until positive that the interrupt has been generated 1743 */ 1744 do { 1745 int int_status; 1746 udelay(10); 1747 int_status = SMC_GET_INT_EN(lp); 1748 if (int_status & INT_EN_SW_INT_EN_) 1749 break; /* got the interrupt */ 1750 } while (--timeout); 1751 1752 /* 1753 * there is really nothing that I can do here if timeout fails, 1754 * as autoirq_report will return a 0 anyway, which is what I 1755 * want in this case. Plus, the clean up is needed in both 1756 * cases. 1757 */ 1758 1759 /* and disable all interrupts again */ 1760 SMC_SET_INT_EN(lp, 0); 1761 1762 /* and return what I found */ 1763 return probe_irq_off(cookie); 1764} 1765 1766static const struct net_device_ops smc911x_netdev_ops = { 1767 .ndo_open = smc911x_open, 1768 .ndo_stop = smc911x_close, 1769 .ndo_start_xmit = smc911x_hard_start_xmit, 1770 .ndo_tx_timeout = smc911x_timeout, 1771 .ndo_set_rx_mode = smc911x_set_multicast_list, 1772 .ndo_change_mtu = eth_change_mtu, 1773 .ndo_validate_addr = eth_validate_addr, 1774 .ndo_set_mac_address = eth_mac_addr, 1775#ifdef CONFIG_NET_POLL_CONTROLLER 1776 .ndo_poll_controller = smc911x_poll_controller, 1777#endif 1778}; 1779 1780/* 1781 * Function: smc911x_probe(unsigned long ioaddr) 1782 * 1783 * Purpose: 1784 * Tests to see if a given ioaddr points to an SMC911x chip. 1785 * Returns a 0 on success 1786 * 1787 * Algorithm: 1788 * (1) see if the endian word is OK 1789 * (1) see if I recognize the chip ID in the appropriate register 1790 * 1791 * Here I do typical initialization tasks. 1792 * 1793 * o Initialize the structure if needed 1794 * o print out my vanity message if not done so already 1795 * o print out what type of hardware is detected 1796 * o print out the ethernet address 1797 * o find the IRQ 1798 * o set up my private data 1799 * o configure the dev structure with my subroutines 1800 * o actually GRAB the irq. 1801 * o GRAB the region 1802 */ 1803static int __devinit smc911x_probe(struct net_device *dev) 1804{ 1805 struct smc911x_local *lp = netdev_priv(dev); 1806 int i, retval; 1807 unsigned int val, chip_id, revision; 1808 const char *version_string; 1809 unsigned long irq_flags; 1810 1811 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__); 1812 1813 /* First, see if the endian word is recognized */ 1814 val = SMC_GET_BYTE_TEST(lp); 1815 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val); 1816 if (val != 0x87654321) { 1817 printk(KERN_ERR "Invalid chip endian 0x%08x\n",val); 1818 retval = -ENODEV; 1819 goto err_out; 1820 } 1821 1822 /* 1823 * check if the revision register is something that I 1824 * recognize. These might need to be added to later, 1825 * as future revisions could be added. 1826 */ 1827 chip_id = SMC_GET_PN(lp); 1828 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id); 1829 for(i=0;chip_ids[i].id != 0; i++) { 1830 if (chip_ids[i].id == chip_id) break; 1831 } 1832 if (!chip_ids[i].id) { 1833 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id); 1834 retval = -ENODEV; 1835 goto err_out; 1836 } 1837 version_string = chip_ids[i].name; 1838 1839 revision = SMC_GET_REV(lp); 1840 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision); 1841 1842 /* At this point I'll assume that the chip is an SMC911x. */ 1843 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name); 1844 1845 /* Validate the TX FIFO size requested */ 1846 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) { 1847 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb); 1848 retval = -EINVAL; 1849 goto err_out; 1850 } 1851 1852 /* fill in some of the fields */ 1853 lp->version = chip_ids[i].id; 1854 lp->revision = revision; 1855 lp->tx_fifo_kb = tx_fifo_kb; 1856 /* Reverse calculate the RX FIFO size from the TX */ 1857 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512; 1858 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15; 1859 1860 /* Set the automatic flow control values */ 1861 switch(lp->tx_fifo_kb) { 1862 /* 1863 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64 1864 * AFC_LO is AFC_HI/2 1865 * BACK_DUR is about 5uS*(AFC_LO) rounded down 1866 */ 1867 case 2:/* 13440 Rx Data Fifo Size */ 1868 lp->afc_cfg=0x008C46AF;break; 1869 case 3:/* 12480 Rx Data Fifo Size */ 1870 lp->afc_cfg=0x0082419F;break; 1871 case 4:/* 11520 Rx Data Fifo Size */ 1872 lp->afc_cfg=0x00783C9F;break; 1873 case 5:/* 10560 Rx Data Fifo Size */ 1874 lp->afc_cfg=0x006E374F;break; 1875 case 6:/* 9600 Rx Data Fifo Size */ 1876 lp->afc_cfg=0x0064328F;break; 1877 case 7:/* 8640 Rx Data Fifo Size */ 1878 lp->afc_cfg=0x005A2D7F;break; 1879 case 8:/* 7680 Rx Data Fifo Size */ 1880 lp->afc_cfg=0x0050287F;break; 1881 case 9:/* 6720 Rx Data Fifo Size */ 1882 lp->afc_cfg=0x0046236F;break; 1883 case 10:/* 5760 Rx Data Fifo Size */ 1884 lp->afc_cfg=0x003C1E6F;break; 1885 case 11:/* 4800 Rx Data Fifo Size */ 1886 lp->afc_cfg=0x0032195F;break; 1887 /* 1888 * AFC_HI is ~1520 bytes less than RX Data Fifo Size 1889 * AFC_LO is AFC_HI/2 1890 * BACK_DUR is about 5uS*(AFC_LO) rounded down 1891 */ 1892 case 12:/* 3840 Rx Data Fifo Size */ 1893 lp->afc_cfg=0x0024124F;break; 1894 case 13:/* 2880 Rx Data Fifo Size */ 1895 lp->afc_cfg=0x0015073F;break; 1896 case 14:/* 1920 Rx Data Fifo Size */ 1897 lp->afc_cfg=0x0006032F;break; 1898 default: 1899 PRINTK("%s: ERROR -- no AFC_CFG setting found", 1900 dev->name); 1901 break; 1902 } 1903 1904 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, 1905 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME, 1906 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg); 1907 1908 spin_lock_init(&lp->lock); 1909 1910 /* Get the MAC address */ 1911 SMC_GET_MAC_ADDR(lp, dev->dev_addr); 1912 1913 /* now, reset the chip, and put it into a known state */ 1914 smc911x_reset(dev); 1915 1916 /* 1917 * If dev->irq is 0, then the device has to be banged on to see 1918 * what the IRQ is. 1919 * 1920 * Specifying an IRQ is done with the assumption that the user knows 1921 * what (s)he is doing. No checking is done!!!! 1922 */ 1923 if (dev->irq < 1) { 1924 int trials; 1925 1926 trials = 3; 1927 while (trials--) { 1928 dev->irq = smc911x_findirq(dev); 1929 if (dev->irq) 1930 break; 1931 /* kick the card and try again */ 1932 smc911x_reset(dev); 1933 } 1934 } 1935 if (dev->irq == 0) { 1936 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n", 1937 dev->name); 1938 retval = -ENODEV; 1939 goto err_out; 1940 } 1941 dev->irq = irq_canonicalize(dev->irq); 1942 1943 /* Fill in the fields of the device structure with ethernet values. */ 1944 ether_setup(dev); 1945 1946 dev->netdev_ops = &smc911x_netdev_ops; 1947 dev->watchdog_timeo = msecs_to_jiffies(watchdog); 1948 dev->ethtool_ops = &smc911x_ethtool_ops; 1949 1950 INIT_WORK(&lp->phy_configure, smc911x_phy_configure); 1951 lp->mii.phy_id_mask = 0x1f; 1952 lp->mii.reg_num_mask = 0x1f; 1953 lp->mii.force_media = 0; 1954 lp->mii.full_duplex = 0; 1955 lp->mii.dev = dev; 1956 lp->mii.mdio_read = smc911x_phy_read; 1957 lp->mii.mdio_write = smc911x_phy_write; 1958 1959 /* 1960 * Locate the phy, if any. 1961 */ 1962 smc911x_phy_detect(dev); 1963 1964 /* Set default parameters */ 1965 lp->msg_enable = NETIF_MSG_LINK; 1966 lp->ctl_rfduplx = 1; 1967 lp->ctl_rspeed = 100; 1968 1969#ifdef SMC_DYNAMIC_BUS_CONFIG 1970 irq_flags = lp->cfg.irq_flags; 1971#else 1972 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE; 1973#endif 1974 1975 /* Grab the IRQ */ 1976 retval = request_irq(dev->irq, smc911x_interrupt, 1977 irq_flags, dev->name, dev); 1978 if (retval) 1979 goto err_out; 1980 1981#ifdef SMC_USE_DMA 1982 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq); 1983 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq); 1984 lp->rxdma_active = 0; 1985 lp->txdma_active = 0; 1986 dev->dma = lp->rxdma; 1987#endif 1988 1989 retval = register_netdev(dev); 1990 if (retval == 0) { 1991 /* now, print out the card info, in a short format.. */ 1992 printk("%s: %s (rev %d) at %#lx IRQ %d", 1993 dev->name, version_string, lp->revision, 1994 dev->base_addr, dev->irq); 1995 1996#ifdef SMC_USE_DMA 1997 if (lp->rxdma != -1) 1998 printk(" RXDMA %d ", lp->rxdma); 1999 2000 if (lp->txdma != -1) 2001 printk("TXDMA %d", lp->txdma); 2002#endif 2003 printk("\n"); 2004 if (!is_valid_ether_addr(dev->dev_addr)) { 2005 printk("%s: Invalid ethernet MAC address. Please " 2006 "set using ifconfig\n", dev->name); 2007 } else { 2008 /* Print the Ethernet address */ 2009 printk("%s: Ethernet addr: %pM\n", 2010 dev->name, dev->dev_addr); 2011 } 2012 2013 if (lp->phy_type == 0) { 2014 PRINTK("%s: No PHY found\n", dev->name); 2015 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) { 2016 PRINTK("%s: LAN911x Internal PHY\n", dev->name); 2017 } else { 2018 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type); 2019 } 2020 } 2021 2022err_out: 2023#ifdef SMC_USE_DMA 2024 if (retval) { 2025 if (lp->rxdma != -1) { 2026 SMC_DMA_FREE(dev, lp->rxdma); 2027 } 2028 if (lp->txdma != -1) { 2029 SMC_DMA_FREE(dev, lp->txdma); 2030 } 2031 } 2032#endif 2033 return retval; 2034} 2035 2036/* 2037 * smc911x_init(void) 2038 * 2039 * Output: 2040 * 0 --> there is a device 2041 * anything else, error 2042 */ 2043static int __devinit smc911x_drv_probe(struct platform_device *pdev) 2044{ 2045 struct net_device *ndev; 2046 struct resource *res; 2047 struct smc911x_local *lp; 2048 unsigned int *addr; 2049 int ret; 2050 2051 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__); 2052 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2053 if (!res) { 2054 ret = -ENODEV; 2055 goto out; 2056 } 2057 2058 /* 2059 * Request the regions. 2060 */ 2061 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) { 2062 ret = -EBUSY; 2063 goto out; 2064 } 2065 2066 ndev = alloc_etherdev(sizeof(struct smc911x_local)); 2067 if (!ndev) { 2068 ret = -ENOMEM; 2069 goto release_1; 2070 } 2071 SET_NETDEV_DEV(ndev, &pdev->dev); 2072 2073 ndev->dma = (unsigned char)-1; 2074 ndev->irq = platform_get_irq(pdev, 0); 2075 lp = netdev_priv(ndev); 2076 lp->netdev = ndev; 2077#ifdef SMC_DYNAMIC_BUS_CONFIG 2078 { 2079 struct smc911x_platdata *pd = pdev->dev.platform_data; 2080 if (!pd) { 2081 ret = -EINVAL; 2082 goto release_both; 2083 } 2084 memcpy(&lp->cfg, pd, sizeof(lp->cfg)); 2085 } 2086#endif 2087 2088 addr = ioremap(res->start, SMC911X_IO_EXTENT); 2089 if (!addr) { 2090 ret = -ENOMEM; 2091 goto release_both; 2092 } 2093 2094 platform_set_drvdata(pdev, ndev); 2095 lp->base = addr; 2096 ndev->base_addr = res->start; 2097 ret = smc911x_probe(ndev); 2098 if (ret != 0) { 2099 platform_set_drvdata(pdev, NULL); 2100 iounmap(addr); 2101release_both: 2102 free_netdev(ndev); 2103release_1: 2104 release_mem_region(res->start, SMC911X_IO_EXTENT); 2105out: 2106 printk("%s: not found (%d).\n", CARDNAME, ret); 2107 } 2108#ifdef SMC_USE_DMA 2109 else { 2110 lp->physaddr = res->start; 2111 lp->dev = &pdev->dev; 2112 } 2113#endif 2114 2115 return ret; 2116} 2117 2118static int __devexit smc911x_drv_remove(struct platform_device *pdev) 2119{ 2120 struct net_device *ndev = platform_get_drvdata(pdev); 2121 struct smc911x_local *lp = netdev_priv(ndev); 2122 struct resource *res; 2123 2124 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__); 2125 platform_set_drvdata(pdev, NULL); 2126 2127 unregister_netdev(ndev); 2128 2129 free_irq(ndev->irq, ndev); 2130 2131#ifdef SMC_USE_DMA 2132 { 2133 if (lp->rxdma != -1) { 2134 SMC_DMA_FREE(dev, lp->rxdma); 2135 } 2136 if (lp->txdma != -1) { 2137 SMC_DMA_FREE(dev, lp->txdma); 2138 } 2139 } 2140#endif 2141 iounmap(lp->base); 2142 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2143 release_mem_region(res->start, SMC911X_IO_EXTENT); 2144 2145 free_netdev(ndev); 2146 return 0; 2147} 2148 2149static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state) 2150{ 2151 struct net_device *ndev = platform_get_drvdata(dev); 2152 struct smc911x_local *lp = netdev_priv(ndev); 2153 2154 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__); 2155 if (ndev) { 2156 if (netif_running(ndev)) { 2157 netif_device_detach(ndev); 2158 smc911x_shutdown(ndev); 2159#if POWER_DOWN 2160 /* Set D2 - Energy detect only setting */ 2161 SMC_SET_PMT_CTRL(lp, 2<<12); 2162#endif 2163 } 2164 } 2165 return 0; 2166} 2167 2168static int smc911x_drv_resume(struct platform_device *dev) 2169{ 2170 struct net_device *ndev = platform_get_drvdata(dev); 2171 2172 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__); 2173 if (ndev) { 2174 struct smc911x_local *lp = netdev_priv(ndev); 2175 2176 if (netif_running(ndev)) { 2177 smc911x_reset(ndev); 2178 if (lp->phy_type != 0) 2179 smc911x_phy_configure(&lp->phy_configure); 2180 smc911x_enable(ndev); 2181 netif_device_attach(ndev); 2182 } 2183 } 2184 return 0; 2185} 2186 2187static struct platform_driver smc911x_driver = { 2188 .probe = smc911x_drv_probe, 2189 .remove = __devexit_p(smc911x_drv_remove), 2190 .suspend = smc911x_drv_suspend, 2191 .resume = smc911x_drv_resume, 2192 .driver = { 2193 .name = CARDNAME, 2194 .owner = THIS_MODULE, 2195 }, 2196}; 2197 2198module_platform_driver(smc911x_driver); 2199