1/* 2 * madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card. 3 * 4 * Written 2000 by Adam Fritzler 5 * 6 * This software may be used and distributed according to the terms 7 * of the GNU General Public License, incorporated herein by reference. 8 * 9 * This driver module supports the following cards: 10 * - Madge Smart 16/4 Ringnode MC16 11 * - Madge Smart 16/4 Ringnode MC32 (??) 12 * 13 * Maintainer(s): 14 * AF Adam Fritzler 15 * 16 * Modification History: 17 * 16-Jan-00 AF Created 18 * 19 */ 20static const char version[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n"; 21 22#include <linux/module.h> 23#include <linux/mca.h> 24#include <linux/slab.h> 25#include <linux/kernel.h> 26#include <linux/errno.h> 27#include <linux/init.h> 28#include <linux/netdevice.h> 29#include <linux/trdevice.h> 30 31#include <asm/io.h> 32#include <asm/irq.h> 33 34#include "tms380tr.h" 35#include "madgemc.h" /* Madge-specific constants */ 36 37#define MADGEMC_IO_EXTENT 32 38#define MADGEMC_SIF_OFFSET 0x08 39 40struct card_info { 41 /* 42 * These are read from the BIA ROM. 43 */ 44 unsigned int manid; 45 unsigned int cardtype; 46 unsigned int cardrev; 47 unsigned int ramsize; 48 49 /* 50 * These are read from the MCA POS registers. 51 */ 52 unsigned int burstmode:2; 53 unsigned int fairness:1; /* 0 = Fair, 1 = Unfair */ 54 unsigned int arblevel:4; 55 unsigned int ringspeed:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */ 56 unsigned int cabletype:1; /* 0 = RJ45, 1 = DB9 */ 57}; 58 59static int madgemc_open(struct net_device *dev); 60static int madgemc_close(struct net_device *dev); 61static int madgemc_chipset_init(struct net_device *dev); 62static void madgemc_read_rom(struct net_device *dev, struct card_info *card); 63static unsigned short madgemc_setnselout_pins(struct net_device *dev); 64static void madgemc_setcabletype(struct net_device *dev, int type); 65 66static int madgemc_mcaproc(char *buf, int slot, void *d); 67 68static void madgemc_setregpage(struct net_device *dev, int page); 69static void madgemc_setsifsel(struct net_device *dev, int val); 70static void madgemc_setint(struct net_device *dev, int val); 71 72static irqreturn_t madgemc_interrupt(int irq, void *dev_id); 73 74/* 75 * These work around paging, however they don't guarantee you're on the 76 * right page. 77 */ 78#define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 79#define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 80#define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 81#define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 82 83/* 84 * Read a byte-length value from the register. 85 */ 86static unsigned short madgemc_sifreadb(struct net_device *dev, unsigned short reg) 87{ 88 unsigned short ret; 89 if (reg<0x8) 90 ret = SIFREADB(reg); 91 else { 92 madgemc_setregpage(dev, 1); 93 ret = SIFREADB(reg); 94 madgemc_setregpage(dev, 0); 95 } 96 return ret; 97} 98 99/* 100 * Write a byte-length value to a register. 101 */ 102static void madgemc_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg) 103{ 104 if (reg<0x8) 105 SIFWRITEB(val, reg); 106 else { 107 madgemc_setregpage(dev, 1); 108 SIFWRITEB(val, reg); 109 madgemc_setregpage(dev, 0); 110 } 111} 112 113/* 114 * Read a word-length value from a register 115 */ 116static unsigned short madgemc_sifreadw(struct net_device *dev, unsigned short reg) 117{ 118 unsigned short ret; 119 if (reg<0x8) 120 ret = SIFREADW(reg); 121 else { 122 madgemc_setregpage(dev, 1); 123 ret = SIFREADW(reg); 124 madgemc_setregpage(dev, 0); 125 } 126 return ret; 127} 128 129/* 130 * Write a word-length value to a register. 131 */ 132static void madgemc_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg) 133{ 134 if (reg<0x8) 135 SIFWRITEW(val, reg); 136 else { 137 madgemc_setregpage(dev, 1); 138 SIFWRITEW(val, reg); 139 madgemc_setregpage(dev, 0); 140 } 141} 142 143static struct net_device_ops madgemc_netdev_ops __read_mostly; 144 145static int __devinit madgemc_probe(struct device *device) 146{ 147 static int versionprinted; 148 struct net_device *dev; 149 struct net_local *tp; 150 struct card_info *card; 151 struct mca_device *mdev = to_mca_device(device); 152 int ret = 0; 153 154 if (versionprinted++ == 0) 155 printk("%s", version); 156 157 if(mca_device_claimed(mdev)) 158 return -EBUSY; 159 mca_device_set_claim(mdev, 1); 160 161 dev = alloc_trdev(sizeof(struct net_local)); 162 if (!dev) { 163 printk("madgemc: unable to allocate dev space\n"); 164 mca_device_set_claim(mdev, 0); 165 ret = -ENOMEM; 166 goto getout; 167 } 168 169 dev->netdev_ops = &madgemc_netdev_ops; 170 171 card = kmalloc(sizeof(struct card_info), GFP_KERNEL); 172 if (card==NULL) { 173 ret = -ENOMEM; 174 goto getout1; 175 } 176 177 /* 178 * Parse configuration information. This all comes 179 * directly from the publicly available @002d.ADF. 180 * Get it from Madge or your local ADF library. 181 */ 182 183 /* 184 * Base address 185 */ 186 dev->base_addr = 0x0a20 + 187 ((mdev->pos[2] & MC16_POS2_ADDR2)?0x0400:0) + 188 ((mdev->pos[0] & MC16_POS0_ADDR1)?0x1000:0) + 189 ((mdev->pos[3] & MC16_POS3_ADDR3)?0x2000:0); 190 191 /* 192 * Interrupt line 193 */ 194 switch(mdev->pos[0] >> 6) { /* upper two bits */ 195 case 0x1: dev->irq = 3; break; 196 case 0x2: dev->irq = 9; break; /* IRQ 2 = IRQ 9 */ 197 case 0x3: dev->irq = 10; break; 198 default: dev->irq = 0; break; 199 } 200 201 if (dev->irq == 0) { 202 printk("%s: invalid IRQ\n", dev->name); 203 ret = -EBUSY; 204 goto getout2; 205 } 206 207 if (!request_region(dev->base_addr, MADGEMC_IO_EXTENT, 208 "madgemc")) { 209 printk(KERN_INFO "madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", mdev->slot, dev->base_addr); 210 dev->base_addr += MADGEMC_SIF_OFFSET; 211 ret = -EBUSY; 212 goto getout2; 213 } 214 dev->base_addr += MADGEMC_SIF_OFFSET; 215 216 /* 217 * Arbitration Level 218 */ 219 card->arblevel = ((mdev->pos[0] >> 1) & 0x7) + 8; 220 221 /* 222 * Burst mode and Fairness 223 */ 224 card->burstmode = ((mdev->pos[2] >> 6) & 0x3); 225 card->fairness = ((mdev->pos[2] >> 4) & 0x1); 226 227 /* 228 * Ring Speed 229 */ 230 if ((mdev->pos[1] >> 2)&0x1) 231 card->ringspeed = 2; /* not selected */ 232 else if ((mdev->pos[2] >> 5) & 0x1) 233 card->ringspeed = 1; /* 16Mb */ 234 else 235 card->ringspeed = 0; /* 4Mb */ 236 237 /* 238 * Cable type 239 */ 240 if ((mdev->pos[1] >> 6)&0x1) 241 card->cabletype = 1; /* STP/DB9 */ 242 else 243 card->cabletype = 0; /* UTP/RJ-45 */ 244 245 246 /* 247 * ROM Info. This requires us to actually twiddle 248 * bits on the card, so we must ensure above that 249 * the base address is free of conflict (request_region above). 250 */ 251 madgemc_read_rom(dev, card); 252 253 if (card->manid != 0x4d) { /* something went wrong */ 254 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev->name, card->manid); 255 goto getout3; 256 } 257 258 if ((card->cardtype != 0x08) && (card->cardtype != 0x0d)) { 259 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev->name, card->cardtype); 260 ret = -EIO; 261 goto getout3; 262 } 263 264 /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */ 265 if ((card->cardtype == 0x08) && (card->cardrev <= 0x01)) 266 card->ramsize = 128; 267 else 268 card->ramsize = 256; 269 270 printk("%s: %s Rev %d at 0x%04lx IRQ %d\n", 271 dev->name, 272 (card->cardtype == 0x08)?MADGEMC16_CARDNAME: 273 MADGEMC32_CARDNAME, card->cardrev, 274 dev->base_addr, dev->irq); 275 276 if (card->cardtype == 0x0d) 277 printk("%s: Warning: MC32 support is experimental and highly untested\n", dev->name); 278 279 if (card->ringspeed==2) { /* Unknown */ 280 printk("%s: Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev->name); 281 card->ringspeed = 1; /* default to 16mb */ 282 } 283 284 printk("%s: RAM Size: %dKB\n", dev->name, card->ramsize); 285 286 printk("%s: Ring Speed: %dMb/sec on %s\n", dev->name, 287 (card->ringspeed)?16:4, 288 card->cabletype?"STP/DB9":"UTP/RJ-45"); 289 printk("%s: Arbitration Level: %d\n", dev->name, 290 card->arblevel); 291 292 printk("%s: Burst Mode: ", dev->name); 293 switch(card->burstmode) { 294 case 0: printk("Cycle steal"); break; 295 case 1: printk("Limited burst"); break; 296 case 2: printk("Delayed release"); break; 297 case 3: printk("Immediate release"); break; 298 } 299 printk(" (%s)\n", (card->fairness)?"Unfair":"Fair"); 300 301 302 /* 303 * Enable SIF before we assign the interrupt handler, 304 * just in case we get spurious interrupts that need 305 * handling. 306 */ 307 outb(0, dev->base_addr + MC_CONTROL_REG0); /* sanity */ 308 madgemc_setsifsel(dev, 1); 309 if (request_irq(dev->irq, madgemc_interrupt, IRQF_SHARED, 310 "madgemc", dev)) { 311 ret = -EBUSY; 312 goto getout3; 313 } 314 315 madgemc_chipset_init(dev); /* enables interrupts! */ 316 madgemc_setcabletype(dev, card->cabletype); 317 318 /* Setup MCA structures */ 319 mca_device_set_name(mdev, (card->cardtype == 0x08)?MADGEMC16_CARDNAME:MADGEMC32_CARDNAME); 320 mca_set_adapter_procfn(mdev->slot, madgemc_mcaproc, dev); 321 322 printk("%s: Ring Station Address: %pM\n", 323 dev->name, dev->dev_addr); 324 325 if (tmsdev_init(dev, device)) { 326 printk("%s: unable to get memory for dev->priv.\n", 327 dev->name); 328 ret = -ENOMEM; 329 goto getout4; 330 } 331 tp = netdev_priv(dev); 332 333 /* 334 * The MC16 is physically a 32bit card. However, Madge 335 * insists on calling it 16bit, so I'll assume here that 336 * they know what they're talking about. Cut off DMA 337 * at 16mb. 338 */ 339 tp->setnselout = madgemc_setnselout_pins; 340 tp->sifwriteb = madgemc_sifwriteb; 341 tp->sifreadb = madgemc_sifreadb; 342 tp->sifwritew = madgemc_sifwritew; 343 tp->sifreadw = madgemc_sifreadw; 344 tp->DataRate = (card->ringspeed)?SPEED_16:SPEED_4; 345 346 memcpy(tp->ProductID, "Madge MCA 16/4 ", PROD_ID_SIZE + 1); 347 348 tp->tmspriv = card; 349 dev_set_drvdata(device, dev); 350 351 if (register_netdev(dev) == 0) 352 return 0; 353 354 dev_set_drvdata(device, NULL); 355 ret = -ENOMEM; 356getout4: 357 free_irq(dev->irq, dev); 358getout3: 359 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, 360 MADGEMC_IO_EXTENT); 361getout2: 362 kfree(card); 363getout1: 364 free_netdev(dev); 365getout: 366 mca_device_set_claim(mdev, 0); 367 return ret; 368} 369 370/* 371 * Handle interrupts generated by the card 372 * 373 * The MicroChannel Madge cards need slightly more handling 374 * after an interrupt than other TMS380 cards do. 375 * 376 * First we must make sure it was this card that generated the 377 * interrupt (since interrupt sharing is allowed). Then, 378 * because we're using level-triggered interrupts (as is 379 * standard on MCA), we must toggle the interrupt line 380 * on the card in order to claim and acknowledge the interrupt. 381 * Once that is done, the interrupt should be handlable in 382 * the normal tms380tr_interrupt() routine. 383 * 384 * There's two ways we can check to see if the interrupt is ours, 385 * both with their own disadvantages... 386 * 387 * 1) Read in the SIFSTS register from the TMS controller. This 388 * is guaranteed to be accurate, however, there's a fairly 389 * large performance penalty for doing so: the Madge chips 390 * must request the register from the Eagle, the Eagle must 391 * read them from its internal bus, and then take the route 392 * back out again, for a 16bit read. 393 * 394 * 2) Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs. 395 * The major disadvantage here is that the accuracy of the 396 * bit is in question. However, it cuts out the extra read 397 * cycles it takes to read the Eagle's SIF, as its only an 398 * 8bit read, and theoretically the Madge bit is directly 399 * connected to the interrupt latch coming out of the Eagle 400 * hardware (that statement is not verified). 401 * 402 * I can't determine which of these methods has the best win. For now, 403 * we make a compromise. Use the Madge way for the first interrupt, 404 * which should be the fast-path, and then once we hit the first 405 * interrupt, keep on trying using the SIF method until we've 406 * exhausted all contiguous interrupts. 407 * 408 */ 409static irqreturn_t madgemc_interrupt(int irq, void *dev_id) 410{ 411 int pending,reg1; 412 struct net_device *dev; 413 414 if (!dev_id) { 415 printk("madgemc_interrupt: was not passed a dev_id!\n"); 416 return IRQ_NONE; 417 } 418 419 dev = dev_id; 420 421 /* Make sure its really us. -- the Madge way */ 422 pending = inb(dev->base_addr + MC_CONTROL_REG0); 423 if (!(pending & MC_CONTROL_REG0_SINTR)) 424 return IRQ_NONE; /* not our interrupt */ 425 426 /* 427 * Since we're level-triggered, we may miss the rising edge 428 * of the next interrupt while we're off handling this one, 429 * so keep checking until the SIF verifies that it has nothing 430 * left for us to do. 431 */ 432 pending = STS_SYSTEM_IRQ; 433 do { 434 if (pending & STS_SYSTEM_IRQ) { 435 436 /* Toggle the interrupt to reset the latch on card */ 437 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 438 outb(reg1 ^ MC_CONTROL_REG1_SINTEN, 439 dev->base_addr + MC_CONTROL_REG1); 440 outb(reg1, dev->base_addr + MC_CONTROL_REG1); 441 442 /* Continue handling as normal */ 443 tms380tr_interrupt(irq, dev_id); 444 445 pending = SIFREADW(SIFSTS); /* restart - the SIF way */ 446 447 } else 448 return IRQ_HANDLED; 449 } while (1); 450 451 return IRQ_HANDLED; /* not reachable */ 452} 453 454/* 455 * Set the card to the preferred ring speed. 456 * 457 * Unlike newer cards, the MC16/32 have their speed selection 458 * circuit connected to the Madge ASICs and not to the TMS380 459 * NSELOUT pins. Set the ASIC bits correctly here, and return 460 * zero to leave the TMS NSELOUT bits unaffected. 461 * 462 */ 463static unsigned short madgemc_setnselout_pins(struct net_device *dev) 464{ 465 unsigned char reg1; 466 struct net_local *tp = netdev_priv(dev); 467 468 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 469 470 if(tp->DataRate == SPEED_16) 471 reg1 |= MC_CONTROL_REG1_SPEED_SEL; /* add for 16mb */ 472 else if (reg1 & MC_CONTROL_REG1_SPEED_SEL) 473 reg1 ^= MC_CONTROL_REG1_SPEED_SEL; /* remove for 4mb */ 474 outb(reg1, dev->base_addr + MC_CONTROL_REG1); 475 476 return 0; /* no change */ 477} 478 479/* 480 * Set the register page. This equates to the SRSX line 481 * on the TMS380Cx6. 482 * 483 * Register selection is normally done via three contiguous 484 * bits. However, some boards (such as the MC16/32) use only 485 * two bits, plus a separate bit in the glue chip. This 486 * sets the SRSX bit (the top bit). See page 4-17 in the 487 * Yellow Book for which registers are affected. 488 * 489 */ 490static void madgemc_setregpage(struct net_device *dev, int page) 491{ 492 static int reg1; 493 494 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 495 if ((page == 0) && (reg1 & MC_CONTROL_REG1_SRSX)) { 496 outb(reg1 ^ MC_CONTROL_REG1_SRSX, 497 dev->base_addr + MC_CONTROL_REG1); 498 } 499 else if (page == 1) { 500 outb(reg1 | MC_CONTROL_REG1_SRSX, 501 dev->base_addr + MC_CONTROL_REG1); 502 } 503 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 504} 505 506/* 507 * The SIF registers are not mapped into register space by default 508 * Set this to 1 to map them, 0 to map the BIA ROM. 509 * 510 */ 511static void madgemc_setsifsel(struct net_device *dev, int val) 512{ 513 unsigned int reg0; 514 515 reg0 = inb(dev->base_addr + MC_CONTROL_REG0); 516 if ((val == 0) && (reg0 & MC_CONTROL_REG0_SIFSEL)) { 517 outb(reg0 ^ MC_CONTROL_REG0_SIFSEL, 518 dev->base_addr + MC_CONTROL_REG0); 519 } else if (val == 1) { 520 outb(reg0 | MC_CONTROL_REG0_SIFSEL, 521 dev->base_addr + MC_CONTROL_REG0); 522 } 523 reg0 = inb(dev->base_addr + MC_CONTROL_REG0); 524} 525 526/* 527 * Enable SIF interrupts 528 * 529 * This does not enable interrupts in the SIF, but rather 530 * enables SIF interrupts to be passed onto the host. 531 * 532 */ 533static void madgemc_setint(struct net_device *dev, int val) 534{ 535 unsigned int reg1; 536 537 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 538 if ((val == 0) && (reg1 & MC_CONTROL_REG1_SINTEN)) { 539 outb(reg1 ^ MC_CONTROL_REG1_SINTEN, 540 dev->base_addr + MC_CONTROL_REG1); 541 } else if (val == 1) { 542 outb(reg1 | MC_CONTROL_REG1_SINTEN, 543 dev->base_addr + MC_CONTROL_REG1); 544 } 545} 546 547/* 548 * Cable type is set via control register 7. Bit zero high 549 * for UTP, low for STP. 550 */ 551static void madgemc_setcabletype(struct net_device *dev, int type) 552{ 553 outb((type==0)?MC_CONTROL_REG7_CABLEUTP:MC_CONTROL_REG7_CABLESTP, 554 dev->base_addr + MC_CONTROL_REG7); 555} 556 557/* 558 * Enable the functions of the Madge chipset needed for 559 * full working order. 560 */ 561static int madgemc_chipset_init(struct net_device *dev) 562{ 563 outb(0, dev->base_addr + MC_CONTROL_REG1); /* pull SRESET low */ 564 tms380tr_wait(100); /* wait for card to reset */ 565 566 /* bring back into normal operating mode */ 567 outb(MC_CONTROL_REG1_NSRESET, dev->base_addr + MC_CONTROL_REG1); 568 569 /* map SIF registers */ 570 madgemc_setsifsel(dev, 1); 571 572 /* enable SIF interrupts */ 573 madgemc_setint(dev, 1); 574 575 return 0; 576} 577 578/* 579 * Disable the board, and put back into power-up state. 580 */ 581static void madgemc_chipset_close(struct net_device *dev) 582{ 583 /* disable interrupts */ 584 madgemc_setint(dev, 0); 585 /* unmap SIF registers */ 586 madgemc_setsifsel(dev, 0); 587} 588 589/* 590 * Read the card type (MC16 or MC32) from the card. 591 * 592 * The configuration registers are stored in two separate 593 * pages. Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE) 594 * for page zero, or setting bit 3 for page one. 595 * 596 * Page zero contains the following data: 597 * Byte 0: Manufacturer ID (0x4D -- ASCII "M") 598 * Byte 1: Card type: 599 * 0x08 for MC16 600 * 0x0D for MC32 601 * Byte 2: Card revision 602 * Byte 3: Mirror of POS config register 0 603 * Byte 4: Mirror of POS 1 604 * Byte 5: Mirror of POS 2 605 * 606 * Page one contains the following data: 607 * Byte 0: Unused 608 * Byte 1-6: BIA, MSB to LSB. 609 * 610 * Note that to read the BIA, we must unmap the SIF registers 611 * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data 612 * will reside in the same logical location. For this reason, 613 * _never_ read the BIA while the Eagle processor is running! 614 * The SIF will be completely inaccessible until the BIA operation 615 * is complete. 616 * 617 */ 618static void madgemc_read_rom(struct net_device *dev, struct card_info *card) 619{ 620 unsigned long ioaddr; 621 unsigned char reg0, reg1, tmpreg0, i; 622 623 ioaddr = dev->base_addr; 624 625 reg0 = inb(ioaddr + MC_CONTROL_REG0); 626 reg1 = inb(ioaddr + MC_CONTROL_REG1); 627 628 /* Switch to page zero and unmap SIF */ 629 tmpreg0 = reg0 & ~(MC_CONTROL_REG0_PAGE + MC_CONTROL_REG0_SIFSEL); 630 outb(tmpreg0, ioaddr + MC_CONTROL_REG0); 631 632 card->manid = inb(ioaddr + MC_ROM_MANUFACTURERID); 633 card->cardtype = inb(ioaddr + MC_ROM_ADAPTERID); 634 card->cardrev = inb(ioaddr + MC_ROM_REVISION); 635 636 /* Switch to rom page one */ 637 outb(tmpreg0 | MC_CONTROL_REG0_PAGE, ioaddr + MC_CONTROL_REG0); 638 639 /* Read BIA */ 640 dev->addr_len = 6; 641 for (i = 0; i < 6; i++) 642 dev->dev_addr[i] = inb(ioaddr + MC_ROM_BIA_START + i); 643 644 /* Restore original register values */ 645 outb(reg0, ioaddr + MC_CONTROL_REG0); 646 outb(reg1, ioaddr + MC_CONTROL_REG1); 647} 648 649static int madgemc_open(struct net_device *dev) 650{ 651 /* 652 * Go ahead and reinitialize the chipset again, just to 653 * make sure we didn't get left in a bad state. 654 */ 655 madgemc_chipset_init(dev); 656 tms380tr_open(dev); 657 return 0; 658} 659 660static int madgemc_close(struct net_device *dev) 661{ 662 tms380tr_close(dev); 663 madgemc_chipset_close(dev); 664 return 0; 665} 666 667/* 668 * Give some details available from /proc/mca/slotX 669 */ 670static int madgemc_mcaproc(char *buf, int slot, void *d) 671{ 672 struct net_device *dev = (struct net_device *)d; 673 struct net_local *tp = netdev_priv(dev); 674 struct card_info *curcard = tp->tmspriv; 675 int len = 0; 676 677 len += sprintf(buf+len, "-------\n"); 678 if (curcard) { 679 len += sprintf(buf+len, "Card Revision: %d\n", curcard->cardrev); 680 len += sprintf(buf+len, "RAM Size: %dkb\n", curcard->ramsize); 681 len += sprintf(buf+len, "Cable type: %s\n", (curcard->cabletype)?"STP/DB9":"UTP/RJ-45"); 682 len += sprintf(buf+len, "Configured ring speed: %dMb/sec\n", (curcard->ringspeed)?16:4); 683 len += sprintf(buf+len, "Running ring speed: %dMb/sec\n", (tp->DataRate==SPEED_16)?16:4); 684 len += sprintf(buf+len, "Device: %s\n", dev->name); 685 len += sprintf(buf+len, "IO Port: 0x%04lx\n", dev->base_addr); 686 len += sprintf(buf+len, "IRQ: %d\n", dev->irq); 687 len += sprintf(buf+len, "Arbitration Level: %d\n", curcard->arblevel); 688 len += sprintf(buf+len, "Burst Mode: "); 689 switch(curcard->burstmode) { 690 case 0: len += sprintf(buf+len, "Cycle steal"); break; 691 case 1: len += sprintf(buf+len, "Limited burst"); break; 692 case 2: len += sprintf(buf+len, "Delayed release"); break; 693 case 3: len += sprintf(buf+len, "Immediate release"); break; 694 } 695 len += sprintf(buf+len, " (%s)\n", (curcard->fairness)?"Unfair":"Fair"); 696 697 len += sprintf(buf+len, "Ring Station Address: %pM\n", 698 dev->dev_addr); 699 } else 700 len += sprintf(buf+len, "Card not configured\n"); 701 702 return len; 703} 704 705static int __devexit madgemc_remove(struct device *device) 706{ 707 struct net_device *dev = dev_get_drvdata(device); 708 struct net_local *tp; 709 struct card_info *card; 710 711 BUG_ON(!dev); 712 713 tp = netdev_priv(dev); 714 card = tp->tmspriv; 715 kfree(card); 716 tp->tmspriv = NULL; 717 718 unregister_netdev(dev); 719 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, MADGEMC_IO_EXTENT); 720 free_irq(dev->irq, dev); 721 tmsdev_term(dev); 722 free_netdev(dev); 723 dev_set_drvdata(device, NULL); 724 725 return 0; 726} 727 728static short madgemc_adapter_ids[] __initdata = { 729 0x002d, 730 0x0000 731}; 732 733static struct mca_driver madgemc_driver = { 734 .id_table = madgemc_adapter_ids, 735 .driver = { 736 .name = "madgemc", 737 .bus = &mca_bus_type, 738 .probe = madgemc_probe, 739 .remove = __devexit_p(madgemc_remove), 740 }, 741}; 742 743static int __init madgemc_init (void) 744{ 745 madgemc_netdev_ops = tms380tr_netdev_ops; 746 madgemc_netdev_ops.ndo_open = madgemc_open; 747 madgemc_netdev_ops.ndo_stop = madgemc_close; 748 749 return mca_register_driver (&madgemc_driver); 750} 751 752static void __exit madgemc_exit (void) 753{ 754 mca_unregister_driver (&madgemc_driver); 755} 756 757module_init(madgemc_init); 758module_exit(madgemc_exit); 759 760MODULE_LICENSE("GPL"); 761 762