1/* 2 * Copyright (c) 2009-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <linux/export.h> 18#include "hw.h" 19 20enum ath_bt_mode { 21 ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */ 22 ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */ 23 ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */ 24 ATH_BT_COEX_MODE_DISABLED, /* coexistence disabled */ 25}; 26 27struct ath_btcoex_config { 28 u8 bt_time_extend; 29 bool bt_txstate_extend; 30 bool bt_txframe_extend; 31 enum ath_bt_mode bt_mode; /* coexistence mode */ 32 bool bt_quiet_collision; 33 bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/ 34 u8 bt_priority_time; 35 u8 bt_first_slot_time; 36 bool bt_hold_rx_clear; 37}; 38 39static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX] 40 [AR9300_NUM_WLAN_WEIGHTS] = { 41 { 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */ 42 { 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */ 43 { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */ 44}; 45 46static const u32 ar9462_wlan_weights[ATH_BTCOEX_STOMP_MAX] 47 [AR9300_NUM_WLAN_WEIGHTS] = { 48 { 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */ 49 { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */ 50 { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */ 51 { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */ 52}; 53 54void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum) 55{ 56 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 57 const struct ath_btcoex_config ath_bt_config = { 58 .bt_time_extend = 0, 59 .bt_txstate_extend = true, 60 .bt_txframe_extend = true, 61 .bt_mode = ATH_BT_COEX_MODE_SLOTTED, 62 .bt_quiet_collision = true, 63 .bt_rxclear_polarity = true, 64 .bt_priority_time = 2, 65 .bt_first_slot_time = 5, 66 .bt_hold_rx_clear = true, 67 }; 68 u32 i, idx; 69 bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity; 70 71 if (AR_SREV_9300_20_OR_LATER(ah)) 72 rxclear_polarity = !ath_bt_config.bt_rxclear_polarity; 73 74 btcoex_hw->bt_coex_mode = 75 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) | 76 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) | 77 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) | 78 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) | 79 SM(ath_bt_config.bt_mode, AR_BT_MODE) | 80 SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) | 81 SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) | 82 SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) | 83 SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) | 84 SM(qnum, AR_BT_QCU_THRESH); 85 86 btcoex_hw->bt_coex_mode2 = 87 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) | 88 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) | 89 AR_BT_DISABLE_BT_ANT; 90 91 for (i = 0; i < 32; i++) { 92 idx = (debruijn32 << i) >> 27; 93 ah->hw_gen_timers.gen_timer_index[idx] = i; 94 } 95} 96EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw); 97 98void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah) 99{ 100 struct ath_common *common = ath9k_hw_common(ah); 101 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 102 103 /* 104 * Check if BTCOEX is globally disabled. 105 */ 106 if (!common->btcoex_enabled) { 107 btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE; 108 return; 109 } 110 111 if (AR_SREV_9462(ah)) { 112 btcoex_hw->scheme = ATH_BTCOEX_CFG_MCI; 113 } else if (AR_SREV_9300_20_OR_LATER(ah)) { 114 btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE; 115 btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300; 116 btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300; 117 btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300; 118 } else if (AR_SREV_9280_20_OR_LATER(ah)) { 119 btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280; 120 btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280; 121 122 if (AR_SREV_9285(ah)) { 123 btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE; 124 btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285; 125 } else { 126 btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE; 127 } 128 } 129} 130EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme); 131 132void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah) 133{ 134 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 135 136 /* connect bt_active to baseband */ 137 REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL, 138 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF | 139 AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF)); 140 141 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, 142 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB); 143 144 /* Set input mux for bt_active to gpio pin */ 145 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, 146 AR_GPIO_INPUT_MUX1_BT_ACTIVE, 147 btcoex_hw->btactive_gpio); 148 149 /* Configure the desired gpio port for input */ 150 ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio); 151} 152EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire); 153 154void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah) 155{ 156 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 157 158 /* btcoex 3-wire */ 159 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, 160 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB | 161 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB)); 162 163 /* Set input mux for bt_prority_async and 164 * bt_active_async to GPIO pins */ 165 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, 166 AR_GPIO_INPUT_MUX1_BT_ACTIVE, 167 btcoex_hw->btactive_gpio); 168 169 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, 170 AR_GPIO_INPUT_MUX1_BT_PRIORITY, 171 btcoex_hw->btpriority_gpio); 172 173 /* Configure the desired GPIO ports for input */ 174 175 ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio); 176 ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio); 177} 178EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire); 179 180void ath9k_hw_btcoex_init_mci(struct ath_hw *ah) 181{ 182 ah->btcoex_hw.mci.ready = false; 183 ah->btcoex_hw.mci.bt_state = 0; 184 ah->btcoex_hw.mci.bt_ver_major = 3; 185 ah->btcoex_hw.mci.bt_ver_minor = 0; 186 ah->btcoex_hw.mci.bt_version_known = false; 187 ah->btcoex_hw.mci.update_2g5g = true; 188 ah->btcoex_hw.mci.is_2g = true; 189 ah->btcoex_hw.mci.wlan_channels_update = false; 190 ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000; 191 ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff; 192 ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff; 193 ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff; 194 ah->btcoex_hw.mci.query_bt = true; 195 ah->btcoex_hw.mci.unhalt_bt_gpm = true; 196 ah->btcoex_hw.mci.halted_bt_gpm = false; 197 ah->btcoex_hw.mci.need_flush_btinfo = false; 198 ah->btcoex_hw.mci.wlan_cal_seq = 0; 199 ah->btcoex_hw.mci.wlan_cal_done = 0; 200 ah->btcoex_hw.mci.config = 0x2201; 201} 202EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci); 203 204static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah) 205{ 206 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 207 208 /* Configure the desired GPIO port for TX_FRAME output */ 209 ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio, 210 AR_GPIO_OUTPUT_MUX_AS_TX_FRAME); 211} 212 213void ath9k_hw_btcoex_set_weight(struct ath_hw *ah, 214 u32 bt_weight, 215 u32 wlan_weight) 216{ 217 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 218 219 btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) | 220 SM(wlan_weight, AR_BTCOEX_WL_WGHT); 221} 222EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight); 223 224 225static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah) 226{ 227 struct ath_btcoex_hw *btcoex = &ah->btcoex_hw; 228 u32 val; 229 int i; 230 231 /* 232 * Program coex mode and weight registers to 233 * enable coex 3-wire 234 */ 235 REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode); 236 REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2); 237 238 239 if (AR_SREV_9300_20_OR_LATER(ah)) { 240 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]); 241 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]); 242 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) 243 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 244 btcoex->bt_weight[i]); 245 } else 246 REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights); 247 248 249 250 if (AR_SREV_9271(ah)) { 251 val = REG_READ(ah, 0x50040); 252 val &= 0xFFFFFEFF; 253 REG_WRITE(ah, 0x50040, val); 254 } 255 256 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); 257 REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0); 258 259 ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio, 260 AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL); 261} 262 263static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah) 264{ 265 struct ath_btcoex_hw *btcoex = &ah->btcoex_hw; 266 int i; 267 268 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) 269 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i), 270 btcoex->wlan_weight[i]); 271 272 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); 273 btcoex->enabled = true; 274} 275 276void ath9k_hw_btcoex_enable(struct ath_hw *ah) 277{ 278 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 279 280 switch (ath9k_hw_get_btcoex_scheme(ah)) { 281 case ATH_BTCOEX_CFG_NONE: 282 return; 283 case ATH_BTCOEX_CFG_2WIRE: 284 ath9k_hw_btcoex_enable_2wire(ah); 285 break; 286 case ATH_BTCOEX_CFG_3WIRE: 287 ath9k_hw_btcoex_enable_3wire(ah); 288 break; 289 case ATH_BTCOEX_CFG_MCI: 290 ath9k_hw_btcoex_enable_mci(ah); 291 return; 292 } 293 294 REG_RMW(ah, AR_GPIO_PDPU, 295 (0x2 << (btcoex_hw->btactive_gpio * 2)), 296 (0x3 << (btcoex_hw->btactive_gpio * 2))); 297 298 ah->btcoex_hw.enabled = true; 299} 300EXPORT_SYMBOL(ath9k_hw_btcoex_enable); 301 302void ath9k_hw_btcoex_disable(struct ath_hw *ah) 303{ 304 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 305 int i; 306 307 btcoex_hw->enabled = false; 308 if (btcoex_hw->scheme == ATH_BTCOEX_CFG_MCI) { 309 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE); 310 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) 311 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i), 312 btcoex_hw->wlan_weight[i]); 313 } 314 ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0); 315 316 ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio, 317 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 318 319 if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) { 320 REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE); 321 REG_WRITE(ah, AR_BT_COEX_MODE2, 0); 322 323 if (AR_SREV_9300_20_OR_LATER(ah)) { 324 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0); 325 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0); 326 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) 327 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0); 328 } else 329 REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0); 330 331 } 332} 333EXPORT_SYMBOL(ath9k_hw_btcoex_disable); 334 335static void ar9003_btcoex_bt_stomp(struct ath_hw *ah, 336 enum ath_stomp_type stomp_type) 337{ 338 struct ath_btcoex_hw *btcoex = &ah->btcoex_hw; 339 const u32 *weight = AR_SREV_9462(ah) ? ar9003_wlan_weights[stomp_type] : 340 ar9462_wlan_weights[stomp_type]; 341 int i; 342 343 for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) { 344 btcoex->bt_weight[i] = AR9300_BT_WGHT; 345 btcoex->wlan_weight[i] = weight[i]; 346 } 347} 348 349/* 350 * Configures appropriate weight based on stomp type. 351 */ 352void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah, 353 enum ath_stomp_type stomp_type) 354{ 355 if (AR_SREV_9300_20_OR_LATER(ah)) { 356 ar9003_btcoex_bt_stomp(ah, stomp_type); 357 return; 358 } 359 360 switch (stomp_type) { 361 case ATH_BTCOEX_STOMP_ALL: 362 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, 363 AR_STOMP_ALL_WLAN_WGHT); 364 break; 365 case ATH_BTCOEX_STOMP_LOW: 366 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, 367 AR_STOMP_LOW_WLAN_WGHT); 368 break; 369 case ATH_BTCOEX_STOMP_NONE: 370 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, 371 AR_STOMP_NONE_WLAN_WGHT); 372 break; 373 default: 374 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n"); 375 break; 376 } 377} 378EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp); 379