1/* 2 * 3 * Broadcom B43legacy wireless driver 4 * 5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de> 6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it> 7 * Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch> 8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org> 9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> 10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net> 11 * 12 * Some parts of the code in this file are derived from the ipw2200 13 * driver Copyright(c) 2003 - 2004 Intel Corporation. 14 15 * This program is free software; you can redistribute it and/or modify 16 * it under the terms of the GNU General Public License as published by 17 * the Free Software Foundation; either version 2 of the License, or 18 * (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; see the file COPYING. If not, write to 27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, 28 * Boston, MA 02110-1301, USA. 29 * 30 */ 31 32#include <linux/delay.h> 33#include <linux/init.h> 34#include <linux/module.h> 35#include <linux/if_arp.h> 36#include <linux/etherdevice.h> 37#include <linux/firmware.h> 38#include <linux/workqueue.h> 39#include <linux/sched.h> 40#include <linux/skbuff.h> 41#include <linux/dma-mapping.h> 42#include <linux/slab.h> 43#include <net/dst.h> 44#include <asm/unaligned.h> 45 46#include "b43legacy.h" 47#include "main.h" 48#include "debugfs.h" 49#include "phy.h" 50#include "dma.h" 51#include "pio.h" 52#include "sysfs.h" 53#include "xmit.h" 54#include "radio.h" 55 56 57MODULE_DESCRIPTION("Broadcom B43legacy wireless driver"); 58MODULE_AUTHOR("Martin Langer"); 59MODULE_AUTHOR("Stefano Brivio"); 60MODULE_AUTHOR("Michael Buesch"); 61MODULE_LICENSE("GPL"); 62 63MODULE_FIRMWARE("b43legacy/ucode2.fw"); 64MODULE_FIRMWARE("b43legacy/ucode4.fw"); 65 66#if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO) 67static int modparam_pio; 68module_param_named(pio, modparam_pio, int, 0444); 69MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode"); 70#elif defined(CONFIG_B43LEGACY_DMA) 71# define modparam_pio 0 72#elif defined(CONFIG_B43LEGACY_PIO) 73# define modparam_pio 1 74#endif 75 76static int modparam_bad_frames_preempt; 77module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444); 78MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames" 79 " Preemption"); 80 81static char modparam_fwpostfix[16]; 82module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444); 83MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load."); 84 85/* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */ 86static const struct ssb_device_id b43legacy_ssb_tbl[] = { 87 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2), 88 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4), 89 SSB_DEVTABLE_END 90}; 91MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl); 92 93 94/* Channel and ratetables are shared for all devices. 95 * They can't be const, because ieee80211 puts some precalculated 96 * data in there. This data is the same for all devices, so we don't 97 * get concurrency issues */ 98#define RATETAB_ENT(_rateid, _flags) \ 99 { \ 100 .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \ 101 .hw_value = (_rateid), \ 102 .flags = (_flags), \ 103 } 104/* 105 * NOTE: When changing this, sync with xmit.c's 106 * b43legacy_plcp_get_bitrate_idx_* functions! 107 */ 108static struct ieee80211_rate __b43legacy_ratetable[] = { 109 RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0), 110 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE), 111 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE), 112 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE), 113 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0), 114 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0), 115 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0), 116 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0), 117 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0), 118 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0), 119 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0), 120 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0), 121}; 122#define b43legacy_b_ratetable (__b43legacy_ratetable + 0) 123#define b43legacy_b_ratetable_size 4 124#define b43legacy_g_ratetable (__b43legacy_ratetable + 0) 125#define b43legacy_g_ratetable_size 12 126 127#define CHANTAB_ENT(_chanid, _freq) \ 128 { \ 129 .center_freq = (_freq), \ 130 .hw_value = (_chanid), \ 131 } 132static struct ieee80211_channel b43legacy_bg_chantable[] = { 133 CHANTAB_ENT(1, 2412), 134 CHANTAB_ENT(2, 2417), 135 CHANTAB_ENT(3, 2422), 136 CHANTAB_ENT(4, 2427), 137 CHANTAB_ENT(5, 2432), 138 CHANTAB_ENT(6, 2437), 139 CHANTAB_ENT(7, 2442), 140 CHANTAB_ENT(8, 2447), 141 CHANTAB_ENT(9, 2452), 142 CHANTAB_ENT(10, 2457), 143 CHANTAB_ENT(11, 2462), 144 CHANTAB_ENT(12, 2467), 145 CHANTAB_ENT(13, 2472), 146 CHANTAB_ENT(14, 2484), 147}; 148 149static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = { 150 .channels = b43legacy_bg_chantable, 151 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable), 152 .bitrates = b43legacy_b_ratetable, 153 .n_bitrates = b43legacy_b_ratetable_size, 154}; 155 156static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = { 157 .channels = b43legacy_bg_chantable, 158 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable), 159 .bitrates = b43legacy_g_ratetable, 160 .n_bitrates = b43legacy_g_ratetable_size, 161}; 162 163static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev); 164static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev); 165static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev); 166static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev); 167 168 169static int b43legacy_ratelimit(struct b43legacy_wl *wl) 170{ 171 if (!wl || !wl->current_dev) 172 return 1; 173 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED) 174 return 1; 175 /* We are up and running. 176 * Ratelimit the messages to avoid DoS over the net. */ 177 return net_ratelimit(); 178} 179 180void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...) 181{ 182 struct va_format vaf; 183 va_list args; 184 185 if (!b43legacy_ratelimit(wl)) 186 return; 187 188 va_start(args, fmt); 189 190 vaf.fmt = fmt; 191 vaf.va = &args; 192 193 printk(KERN_INFO "b43legacy-%s: %pV", 194 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); 195 196 va_end(args); 197} 198 199void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...) 200{ 201 struct va_format vaf; 202 va_list args; 203 204 if (!b43legacy_ratelimit(wl)) 205 return; 206 207 va_start(args, fmt); 208 209 vaf.fmt = fmt; 210 vaf.va = &args; 211 212 printk(KERN_ERR "b43legacy-%s ERROR: %pV", 213 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); 214 215 va_end(args); 216} 217 218void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...) 219{ 220 struct va_format vaf; 221 va_list args; 222 223 if (!b43legacy_ratelimit(wl)) 224 return; 225 226 va_start(args, fmt); 227 228 vaf.fmt = fmt; 229 vaf.va = &args; 230 231 printk(KERN_WARNING "b43legacy-%s warning: %pV", 232 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); 233 234 va_end(args); 235} 236 237#if B43legacy_DEBUG 238void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...) 239{ 240 struct va_format vaf; 241 va_list args; 242 243 va_start(args, fmt); 244 245 vaf.fmt = fmt; 246 vaf.va = &args; 247 248 printk(KERN_DEBUG "b43legacy-%s debug: %pV", 249 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); 250 251 va_end(args); 252} 253#endif /* DEBUG */ 254 255static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset, 256 u32 val) 257{ 258 u32 status; 259 260 B43legacy_WARN_ON(offset % 4 != 0); 261 262 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 263 if (status & B43legacy_MACCTL_BE) 264 val = swab32(val); 265 266 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset); 267 mmiowb(); 268 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val); 269} 270 271static inline 272void b43legacy_shm_control_word(struct b43legacy_wldev *dev, 273 u16 routing, u16 offset) 274{ 275 u32 control; 276 277 /* "offset" is the WORD offset. */ 278 279 control = routing; 280 control <<= 16; 281 control |= offset; 282 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control); 283} 284 285u32 b43legacy_shm_read32(struct b43legacy_wldev *dev, 286 u16 routing, u16 offset) 287{ 288 u32 ret; 289 290 if (routing == B43legacy_SHM_SHARED) { 291 B43legacy_WARN_ON((offset & 0x0001) != 0); 292 if (offset & 0x0003) { 293 /* Unaligned access */ 294 b43legacy_shm_control_word(dev, routing, offset >> 2); 295 ret = b43legacy_read16(dev, 296 B43legacy_MMIO_SHM_DATA_UNALIGNED); 297 ret <<= 16; 298 b43legacy_shm_control_word(dev, routing, 299 (offset >> 2) + 1); 300 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA); 301 302 return ret; 303 } 304 offset >>= 2; 305 } 306 b43legacy_shm_control_word(dev, routing, offset); 307 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA); 308 309 return ret; 310} 311 312u16 b43legacy_shm_read16(struct b43legacy_wldev *dev, 313 u16 routing, u16 offset) 314{ 315 u16 ret; 316 317 if (routing == B43legacy_SHM_SHARED) { 318 B43legacy_WARN_ON((offset & 0x0001) != 0); 319 if (offset & 0x0003) { 320 /* Unaligned access */ 321 b43legacy_shm_control_word(dev, routing, offset >> 2); 322 ret = b43legacy_read16(dev, 323 B43legacy_MMIO_SHM_DATA_UNALIGNED); 324 325 return ret; 326 } 327 offset >>= 2; 328 } 329 b43legacy_shm_control_word(dev, routing, offset); 330 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA); 331 332 return ret; 333} 334 335void b43legacy_shm_write32(struct b43legacy_wldev *dev, 336 u16 routing, u16 offset, 337 u32 value) 338{ 339 if (routing == B43legacy_SHM_SHARED) { 340 B43legacy_WARN_ON((offset & 0x0001) != 0); 341 if (offset & 0x0003) { 342 /* Unaligned access */ 343 b43legacy_shm_control_word(dev, routing, offset >> 2); 344 mmiowb(); 345 b43legacy_write16(dev, 346 B43legacy_MMIO_SHM_DATA_UNALIGNED, 347 (value >> 16) & 0xffff); 348 mmiowb(); 349 b43legacy_shm_control_word(dev, routing, 350 (offset >> 2) + 1); 351 mmiowb(); 352 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, 353 value & 0xffff); 354 return; 355 } 356 offset >>= 2; 357 } 358 b43legacy_shm_control_word(dev, routing, offset); 359 mmiowb(); 360 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value); 361} 362 363void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset, 364 u16 value) 365{ 366 if (routing == B43legacy_SHM_SHARED) { 367 B43legacy_WARN_ON((offset & 0x0001) != 0); 368 if (offset & 0x0003) { 369 /* Unaligned access */ 370 b43legacy_shm_control_word(dev, routing, offset >> 2); 371 mmiowb(); 372 b43legacy_write16(dev, 373 B43legacy_MMIO_SHM_DATA_UNALIGNED, 374 value); 375 return; 376 } 377 offset >>= 2; 378 } 379 b43legacy_shm_control_word(dev, routing, offset); 380 mmiowb(); 381 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value); 382} 383 384/* Read HostFlags */ 385u32 b43legacy_hf_read(struct b43legacy_wldev *dev) 386{ 387 u32 ret; 388 389 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 390 B43legacy_SHM_SH_HOSTFHI); 391 ret <<= 16; 392 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 393 B43legacy_SHM_SH_HOSTFLO); 394 395 return ret; 396} 397 398/* Write HostFlags */ 399void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value) 400{ 401 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 402 B43legacy_SHM_SH_HOSTFLO, 403 (value & 0x0000FFFF)); 404 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 405 B43legacy_SHM_SH_HOSTFHI, 406 ((value & 0xFFFF0000) >> 16)); 407} 408 409void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf) 410{ 411 /* We need to be careful. As we read the TSF from multiple 412 * registers, we should take care of register overflows. 413 * In theory, the whole tsf read process should be atomic. 414 * We try to be atomic here, by restaring the read process, 415 * if any of the high registers changed (overflew). 416 */ 417 if (dev->dev->id.revision >= 3) { 418 u32 low; 419 u32 high; 420 u32 high2; 421 422 do { 423 high = b43legacy_read32(dev, 424 B43legacy_MMIO_REV3PLUS_TSF_HIGH); 425 low = b43legacy_read32(dev, 426 B43legacy_MMIO_REV3PLUS_TSF_LOW); 427 high2 = b43legacy_read32(dev, 428 B43legacy_MMIO_REV3PLUS_TSF_HIGH); 429 } while (unlikely(high != high2)); 430 431 *tsf = high; 432 *tsf <<= 32; 433 *tsf |= low; 434 } else { 435 u64 tmp; 436 u16 v0; 437 u16 v1; 438 u16 v2; 439 u16 v3; 440 u16 test1; 441 u16 test2; 442 u16 test3; 443 444 do { 445 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); 446 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); 447 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); 448 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0); 449 450 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); 451 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); 452 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); 453 } while (v3 != test3 || v2 != test2 || v1 != test1); 454 455 *tsf = v3; 456 *tsf <<= 48; 457 tmp = v2; 458 tmp <<= 32; 459 *tsf |= tmp; 460 tmp = v1; 461 tmp <<= 16; 462 *tsf |= tmp; 463 *tsf |= v0; 464 } 465} 466 467static void b43legacy_time_lock(struct b43legacy_wldev *dev) 468{ 469 u32 status; 470 471 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 472 status |= B43legacy_MACCTL_TBTTHOLD; 473 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); 474 mmiowb(); 475} 476 477static void b43legacy_time_unlock(struct b43legacy_wldev *dev) 478{ 479 u32 status; 480 481 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 482 status &= ~B43legacy_MACCTL_TBTTHOLD; 483 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); 484} 485 486static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf) 487{ 488 /* Be careful with the in-progress timer. 489 * First zero out the low register, so we have a full 490 * register-overflow duration to complete the operation. 491 */ 492 if (dev->dev->id.revision >= 3) { 493 u32 lo = (tsf & 0x00000000FFFFFFFFULL); 494 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32; 495 496 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0); 497 mmiowb(); 498 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH, 499 hi); 500 mmiowb(); 501 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 502 lo); 503 } else { 504 u16 v0 = (tsf & 0x000000000000FFFFULL); 505 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16; 506 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32; 507 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48; 508 509 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0); 510 mmiowb(); 511 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3); 512 mmiowb(); 513 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2); 514 mmiowb(); 515 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1); 516 mmiowb(); 517 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0); 518 } 519} 520 521void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf) 522{ 523 b43legacy_time_lock(dev); 524 b43legacy_tsf_write_locked(dev, tsf); 525 b43legacy_time_unlock(dev); 526} 527 528static 529void b43legacy_macfilter_set(struct b43legacy_wldev *dev, 530 u16 offset, const u8 *mac) 531{ 532 static const u8 zero_addr[ETH_ALEN] = { 0 }; 533 u16 data; 534 535 if (!mac) 536 mac = zero_addr; 537 538 offset |= 0x0020; 539 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset); 540 541 data = mac[0]; 542 data |= mac[1] << 8; 543 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); 544 data = mac[2]; 545 data |= mac[3] << 8; 546 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); 547 data = mac[4]; 548 data |= mac[5] << 8; 549 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); 550} 551 552static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev) 553{ 554 static const u8 zero_addr[ETH_ALEN] = { 0 }; 555 const u8 *mac = dev->wl->mac_addr; 556 const u8 *bssid = dev->wl->bssid; 557 u8 mac_bssid[ETH_ALEN * 2]; 558 int i; 559 u32 tmp; 560 561 if (!bssid) 562 bssid = zero_addr; 563 if (!mac) 564 mac = zero_addr; 565 566 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid); 567 568 memcpy(mac_bssid, mac, ETH_ALEN); 569 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN); 570 571 /* Write our MAC address and BSSID to template ram */ 572 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) { 573 tmp = (u32)(mac_bssid[i + 0]); 574 tmp |= (u32)(mac_bssid[i + 1]) << 8; 575 tmp |= (u32)(mac_bssid[i + 2]) << 16; 576 tmp |= (u32)(mac_bssid[i + 3]) << 24; 577 b43legacy_ram_write(dev, 0x20 + i, tmp); 578 b43legacy_ram_write(dev, 0x78 + i, tmp); 579 b43legacy_ram_write(dev, 0x478 + i, tmp); 580 } 581} 582 583static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev) 584{ 585 b43legacy_write_mac_bssid_templates(dev); 586 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF, 587 dev->wl->mac_addr); 588} 589 590static void b43legacy_set_slot_time(struct b43legacy_wldev *dev, 591 u16 slot_time) 592{ 593 /* slot_time is in usec. */ 594 if (dev->phy.type != B43legacy_PHYTYPE_G) 595 return; 596 b43legacy_write16(dev, 0x684, 510 + slot_time); 597 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010, 598 slot_time); 599} 600 601static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev) 602{ 603 b43legacy_set_slot_time(dev, 9); 604} 605 606static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev) 607{ 608 b43legacy_set_slot_time(dev, 20); 609} 610 611/* Synchronize IRQ top- and bottom-half. 612 * IRQs must be masked before calling this. 613 * This must not be called with the irq_lock held. 614 */ 615static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev) 616{ 617 synchronize_irq(dev->dev->irq); 618 tasklet_kill(&dev->isr_tasklet); 619} 620 621/* DummyTransmission function, as documented on 622 * http://bcm-specs.sipsolutions.net/DummyTransmission 623 */ 624void b43legacy_dummy_transmission(struct b43legacy_wldev *dev) 625{ 626 struct b43legacy_phy *phy = &dev->phy; 627 unsigned int i; 628 unsigned int max_loop; 629 u16 value; 630 u32 buffer[5] = { 631 0x00000000, 632 0x00D40000, 633 0x00000000, 634 0x01000000, 635 0x00000000, 636 }; 637 638 switch (phy->type) { 639 case B43legacy_PHYTYPE_B: 640 case B43legacy_PHYTYPE_G: 641 max_loop = 0xFA; 642 buffer[0] = 0x000B846E; 643 break; 644 default: 645 B43legacy_BUG_ON(1); 646 return; 647 } 648 649 for (i = 0; i < 5; i++) 650 b43legacy_ram_write(dev, i * 4, buffer[i]); 651 652 /* dummy read follows */ 653 b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 654 655 b43legacy_write16(dev, 0x0568, 0x0000); 656 b43legacy_write16(dev, 0x07C0, 0x0000); 657 b43legacy_write16(dev, 0x050C, 0x0000); 658 b43legacy_write16(dev, 0x0508, 0x0000); 659 b43legacy_write16(dev, 0x050A, 0x0000); 660 b43legacy_write16(dev, 0x054C, 0x0000); 661 b43legacy_write16(dev, 0x056A, 0x0014); 662 b43legacy_write16(dev, 0x0568, 0x0826); 663 b43legacy_write16(dev, 0x0500, 0x0000); 664 b43legacy_write16(dev, 0x0502, 0x0030); 665 666 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5) 667 b43legacy_radio_write16(dev, 0x0051, 0x0017); 668 for (i = 0x00; i < max_loop; i++) { 669 value = b43legacy_read16(dev, 0x050E); 670 if (value & 0x0080) 671 break; 672 udelay(10); 673 } 674 for (i = 0x00; i < 0x0A; i++) { 675 value = b43legacy_read16(dev, 0x050E); 676 if (value & 0x0400) 677 break; 678 udelay(10); 679 } 680 for (i = 0x00; i < 0x0A; i++) { 681 value = b43legacy_read16(dev, 0x0690); 682 if (!(value & 0x0100)) 683 break; 684 udelay(10); 685 } 686 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5) 687 b43legacy_radio_write16(dev, 0x0051, 0x0037); 688} 689 690/* Turn the Analog ON/OFF */ 691static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on) 692{ 693 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4); 694} 695 696void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags) 697{ 698 u32 tmslow; 699 u32 macctl; 700 701 flags |= B43legacy_TMSLOW_PHYCLKEN; 702 flags |= B43legacy_TMSLOW_PHYRESET; 703 ssb_device_enable(dev->dev, flags); 704 msleep(2); /* Wait for the PLL to turn on. */ 705 706 /* Now take the PHY out of Reset again */ 707 tmslow = ssb_read32(dev->dev, SSB_TMSLOW); 708 tmslow |= SSB_TMSLOW_FGC; 709 tmslow &= ~B43legacy_TMSLOW_PHYRESET; 710 ssb_write32(dev->dev, SSB_TMSLOW, tmslow); 711 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */ 712 msleep(1); 713 tmslow &= ~SSB_TMSLOW_FGC; 714 ssb_write32(dev->dev, SSB_TMSLOW, tmslow); 715 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */ 716 msleep(1); 717 718 /* Turn Analog ON */ 719 b43legacy_switch_analog(dev, 1); 720 721 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 722 macctl &= ~B43legacy_MACCTL_GMODE; 723 if (flags & B43legacy_TMSLOW_GMODE) { 724 macctl |= B43legacy_MACCTL_GMODE; 725 dev->phy.gmode = true; 726 } else 727 dev->phy.gmode = false; 728 macctl |= B43legacy_MACCTL_IHR_ENABLED; 729 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 730} 731 732static void handle_irq_transmit_status(struct b43legacy_wldev *dev) 733{ 734 u32 v0; 735 u32 v1; 736 u16 tmp; 737 struct b43legacy_txstatus stat; 738 739 while (1) { 740 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0); 741 if (!(v0 & 0x00000001)) 742 break; 743 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); 744 745 stat.cookie = (v0 >> 16); 746 stat.seq = (v1 & 0x0000FFFF); 747 stat.phy_stat = ((v1 & 0x00FF0000) >> 16); 748 tmp = (v0 & 0x0000FFFF); 749 stat.frame_count = ((tmp & 0xF000) >> 12); 750 stat.rts_count = ((tmp & 0x0F00) >> 8); 751 stat.supp_reason = ((tmp & 0x001C) >> 2); 752 stat.pm_indicated = !!(tmp & 0x0080); 753 stat.intermediate = !!(tmp & 0x0040); 754 stat.for_ampdu = !!(tmp & 0x0020); 755 stat.acked = !!(tmp & 0x0002); 756 757 b43legacy_handle_txstatus(dev, &stat); 758 } 759} 760 761static void drain_txstatus_queue(struct b43legacy_wldev *dev) 762{ 763 u32 dummy; 764 765 if (dev->dev->id.revision < 5) 766 return; 767 /* Read all entries from the microcode TXstatus FIFO 768 * and throw them away. 769 */ 770 while (1) { 771 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0); 772 if (!(dummy & 0x00000001)) 773 break; 774 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); 775 } 776} 777 778static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev) 779{ 780 u32 val = 0; 781 782 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A); 783 val <<= 16; 784 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408); 785 786 return val; 787} 788 789static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi) 790{ 791 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408, 792 (jssi & 0x0000FFFF)); 793 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A, 794 (jssi & 0xFFFF0000) >> 16); 795} 796 797static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev) 798{ 799 b43legacy_jssi_write(dev, 0x7F7F7F7F); 800 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, 801 b43legacy_read32(dev, B43legacy_MMIO_MACCMD) 802 | B43legacy_MACCMD_BGNOISE); 803 B43legacy_WARN_ON(dev->noisecalc.channel_at_start != 804 dev->phy.channel); 805} 806 807static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev) 808{ 809 /* Top half of Link Quality calculation. */ 810 811 if (dev->noisecalc.calculation_running) 812 return; 813 dev->noisecalc.channel_at_start = dev->phy.channel; 814 dev->noisecalc.calculation_running = true; 815 dev->noisecalc.nr_samples = 0; 816 817 b43legacy_generate_noise_sample(dev); 818} 819 820static void handle_irq_noise(struct b43legacy_wldev *dev) 821{ 822 struct b43legacy_phy *phy = &dev->phy; 823 u16 tmp; 824 u8 noise[4]; 825 u8 i; 826 u8 j; 827 s32 average; 828 829 /* Bottom half of Link Quality calculation. */ 830 831 B43legacy_WARN_ON(!dev->noisecalc.calculation_running); 832 if (dev->noisecalc.channel_at_start != phy->channel) 833 goto drop_calculation; 834 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev)); 835 if (noise[0] == 0x7F || noise[1] == 0x7F || 836 noise[2] == 0x7F || noise[3] == 0x7F) 837 goto generate_new; 838 839 /* Get the noise samples. */ 840 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8); 841 i = dev->noisecalc.nr_samples; 842 noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); 843 noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); 844 noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); 845 noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); 846 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]]; 847 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]]; 848 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]]; 849 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]]; 850 dev->noisecalc.nr_samples++; 851 if (dev->noisecalc.nr_samples == 8) { 852 /* Calculate the Link Quality by the noise samples. */ 853 average = 0; 854 for (i = 0; i < 8; i++) { 855 for (j = 0; j < 4; j++) 856 average += dev->noisecalc.samples[i][j]; 857 } 858 average /= (8 * 4); 859 average *= 125; 860 average += 64; 861 average /= 128; 862 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 863 0x40C); 864 tmp = (tmp / 128) & 0x1F; 865 if (tmp >= 8) 866 average += 2; 867 else 868 average -= 25; 869 if (tmp == 8) 870 average -= 72; 871 else 872 average -= 48; 873 874 dev->stats.link_noise = average; 875drop_calculation: 876 dev->noisecalc.calculation_running = false; 877 return; 878 } 879generate_new: 880 b43legacy_generate_noise_sample(dev); 881} 882 883static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev) 884{ 885 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) { 886 /* TODO: PS TBTT */ 887 } else { 888 if (1/*FIXME: the last PSpoll frame was sent successfully */) 889 b43legacy_power_saving_ctl_bits(dev, -1, -1); 890 } 891 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) 892 dev->dfq_valid = true; 893} 894 895static void handle_irq_atim_end(struct b43legacy_wldev *dev) 896{ 897 if (dev->dfq_valid) { 898 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, 899 b43legacy_read32(dev, B43legacy_MMIO_MACCMD) 900 | B43legacy_MACCMD_DFQ_VALID); 901 dev->dfq_valid = false; 902 } 903} 904 905static void handle_irq_pmq(struct b43legacy_wldev *dev) 906{ 907 u32 tmp; 908 909 /* TODO: AP mode. */ 910 911 while (1) { 912 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS); 913 if (!(tmp & 0x00000008)) 914 break; 915 } 916 /* 16bit write is odd, but correct. */ 917 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002); 918} 919 920static void b43legacy_write_template_common(struct b43legacy_wldev *dev, 921 const u8 *data, u16 size, 922 u16 ram_offset, 923 u16 shm_size_offset, u8 rate) 924{ 925 u32 i; 926 u32 tmp; 927 struct b43legacy_plcp_hdr4 plcp; 928 929 plcp.data = 0; 930 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate); 931 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data)); 932 ram_offset += sizeof(u32); 933 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet. 934 * So leave the first two bytes of the next write blank. 935 */ 936 tmp = (u32)(data[0]) << 16; 937 tmp |= (u32)(data[1]) << 24; 938 b43legacy_ram_write(dev, ram_offset, tmp); 939 ram_offset += sizeof(u32); 940 for (i = 2; i < size; i += sizeof(u32)) { 941 tmp = (u32)(data[i + 0]); 942 if (i + 1 < size) 943 tmp |= (u32)(data[i + 1]) << 8; 944 if (i + 2 < size) 945 tmp |= (u32)(data[i + 2]) << 16; 946 if (i + 3 < size) 947 tmp |= (u32)(data[i + 3]) << 24; 948 b43legacy_ram_write(dev, ram_offset + i - 2, tmp); 949 } 950 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset, 951 size + sizeof(struct b43legacy_plcp_hdr6)); 952} 953 954/* Convert a b43legacy antenna number value to the PHY TX control value. */ 955static u16 b43legacy_antenna_to_phyctl(int antenna) 956{ 957 switch (antenna) { 958 case B43legacy_ANTENNA0: 959 return B43legacy_TX4_PHY_ANT0; 960 case B43legacy_ANTENNA1: 961 return B43legacy_TX4_PHY_ANT1; 962 } 963 return B43legacy_TX4_PHY_ANTLAST; 964} 965 966static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev, 967 u16 ram_offset, 968 u16 shm_size_offset) 969{ 970 971 unsigned int i, len, variable_len; 972 const struct ieee80211_mgmt *bcn; 973 const u8 *ie; 974 bool tim_found = false; 975 unsigned int rate; 976 u16 ctl; 977 int antenna; 978 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon); 979 980 bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data); 981 len = min((size_t)dev->wl->current_beacon->len, 982 0x200 - sizeof(struct b43legacy_plcp_hdr6)); 983 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value; 984 985 b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset, 986 shm_size_offset, rate); 987 988 /* Write the PHY TX control parameters. */ 989 antenna = B43legacy_ANTENNA_DEFAULT; 990 antenna = b43legacy_antenna_to_phyctl(antenna); 991 ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 992 B43legacy_SHM_SH_BEACPHYCTL); 993 /* We can't send beacons with short preamble. Would get PHY errors. */ 994 ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL; 995 ctl &= ~B43legacy_TX4_PHY_ANT; 996 ctl &= ~B43legacy_TX4_PHY_ENC; 997 ctl |= antenna; 998 ctl |= B43legacy_TX4_PHY_ENC_CCK; 999 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 1000 B43legacy_SHM_SH_BEACPHYCTL, ctl); 1001 1002 /* Find the position of the TIM and the DTIM_period value 1003 * and write them to SHM. */ 1004 ie = bcn->u.beacon.variable; 1005 variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable); 1006 for (i = 0; i < variable_len - 2; ) { 1007 uint8_t ie_id, ie_len; 1008 1009 ie_id = ie[i]; 1010 ie_len = ie[i + 1]; 1011 if (ie_id == 5) { 1012 u16 tim_position; 1013 u16 dtim_period; 1014 /* This is the TIM Information Element */ 1015 1016 /* Check whether the ie_len is in the beacon data range. */ 1017 if (variable_len < ie_len + 2 + i) 1018 break; 1019 /* A valid TIM is at least 4 bytes long. */ 1020 if (ie_len < 4) 1021 break; 1022 tim_found = true; 1023 1024 tim_position = sizeof(struct b43legacy_plcp_hdr6); 1025 tim_position += offsetof(struct ieee80211_mgmt, 1026 u.beacon.variable); 1027 tim_position += i; 1028 1029 dtim_period = ie[i + 3]; 1030 1031 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 1032 B43legacy_SHM_SH_TIMPOS, tim_position); 1033 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 1034 B43legacy_SHM_SH_DTIMP, dtim_period); 1035 break; 1036 } 1037 i += ie_len + 2; 1038 } 1039 if (!tim_found) { 1040 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the " 1041 "beacon template packet. AP or IBSS operation " 1042 "may be broken.\n"); 1043 } else 1044 b43legacydbg(dev->wl, "Updated beacon template\n"); 1045} 1046 1047static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev, 1048 u16 shm_offset, u16 size, 1049 struct ieee80211_rate *rate) 1050{ 1051 struct b43legacy_plcp_hdr4 plcp; 1052 u32 tmp; 1053 __le16 dur; 1054 1055 plcp.data = 0; 1056 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value); 1057 dur = ieee80211_generic_frame_duration(dev->wl->hw, 1058 dev->wl->vif, 1059 size, 1060 rate); 1061 /* Write PLCP in two parts and timing for packet transfer */ 1062 tmp = le32_to_cpu(plcp.data); 1063 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset, 1064 tmp & 0xFFFF); 1065 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2, 1066 tmp >> 16); 1067 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6, 1068 le16_to_cpu(dur)); 1069} 1070 1071/* Instead of using custom probe response template, this function 1072 * just patches custom beacon template by: 1073 * 1) Changing packet type 1074 * 2) Patching duration field 1075 * 3) Stripping TIM 1076 */ 1077static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev, 1078 u16 *dest_size, 1079 struct ieee80211_rate *rate) 1080{ 1081 const u8 *src_data; 1082 u8 *dest_data; 1083 u16 src_size, elem_size, src_pos, dest_pos; 1084 __le16 dur; 1085 struct ieee80211_hdr *hdr; 1086 size_t ie_start; 1087 1088 src_size = dev->wl->current_beacon->len; 1089 src_data = (const u8 *)dev->wl->current_beacon->data; 1090 1091 /* Get the start offset of the variable IEs in the packet. */ 1092 ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable); 1093 B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt, 1094 u.beacon.variable)); 1095 1096 if (B43legacy_WARN_ON(src_size < ie_start)) 1097 return NULL; 1098 1099 dest_data = kmalloc(src_size, GFP_ATOMIC); 1100 if (unlikely(!dest_data)) 1101 return NULL; 1102 1103 /* Copy the static data and all Information Elements, except the TIM. */ 1104 memcpy(dest_data, src_data, ie_start); 1105 src_pos = ie_start; 1106 dest_pos = ie_start; 1107 for ( ; src_pos < src_size - 2; src_pos += elem_size) { 1108 elem_size = src_data[src_pos + 1] + 2; 1109 if (src_data[src_pos] == 5) { 1110 /* This is the TIM. */ 1111 continue; 1112 } 1113 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size); 1114 dest_pos += elem_size; 1115 } 1116 *dest_size = dest_pos; 1117 hdr = (struct ieee80211_hdr *)dest_data; 1118 1119 /* Set the frame control. */ 1120 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | 1121 IEEE80211_STYPE_PROBE_RESP); 1122 dur = ieee80211_generic_frame_duration(dev->wl->hw, 1123 dev->wl->vif, 1124 *dest_size, 1125 rate); 1126 hdr->duration_id = dur; 1127 1128 return dest_data; 1129} 1130 1131static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev, 1132 u16 ram_offset, 1133 u16 shm_size_offset, 1134 struct ieee80211_rate *rate) 1135{ 1136 const u8 *probe_resp_data; 1137 u16 size; 1138 1139 size = dev->wl->current_beacon->len; 1140 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate); 1141 if (unlikely(!probe_resp_data)) 1142 return; 1143 1144 /* Looks like PLCP headers plus packet timings are stored for 1145 * all possible basic rates 1146 */ 1147 b43legacy_write_probe_resp_plcp(dev, 0x31A, size, 1148 &b43legacy_b_ratetable[0]); 1149 b43legacy_write_probe_resp_plcp(dev, 0x32C, size, 1150 &b43legacy_b_ratetable[1]); 1151 b43legacy_write_probe_resp_plcp(dev, 0x33E, size, 1152 &b43legacy_b_ratetable[2]); 1153 b43legacy_write_probe_resp_plcp(dev, 0x350, size, 1154 &b43legacy_b_ratetable[3]); 1155 1156 size = min((size_t)size, 1157 0x200 - sizeof(struct b43legacy_plcp_hdr6)); 1158 b43legacy_write_template_common(dev, probe_resp_data, 1159 size, ram_offset, 1160 shm_size_offset, rate->hw_value); 1161 kfree(probe_resp_data); 1162} 1163 1164static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev) 1165{ 1166 struct b43legacy_wl *wl = dev->wl; 1167 1168 if (wl->beacon0_uploaded) 1169 return; 1170 b43legacy_write_beacon_template(dev, 0x68, 0x18); 1171 /* FIXME: Probe resp upload doesn't really belong here, 1172 * but we don't use that feature anyway. */ 1173 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A, 1174 &__b43legacy_ratetable[3]); 1175 wl->beacon0_uploaded = true; 1176} 1177 1178static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev) 1179{ 1180 struct b43legacy_wl *wl = dev->wl; 1181 1182 if (wl->beacon1_uploaded) 1183 return; 1184 b43legacy_write_beacon_template(dev, 0x468, 0x1A); 1185 wl->beacon1_uploaded = true; 1186} 1187 1188static void handle_irq_beacon(struct b43legacy_wldev *dev) 1189{ 1190 struct b43legacy_wl *wl = dev->wl; 1191 u32 cmd, beacon0_valid, beacon1_valid; 1192 1193 if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP)) 1194 return; 1195 1196 /* This is the bottom half of the asynchronous beacon update. */ 1197 1198 /* Ignore interrupt in the future. */ 1199 dev->irq_mask &= ~B43legacy_IRQ_BEACON; 1200 1201 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); 1202 beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID); 1203 beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID); 1204 1205 /* Schedule interrupt manually, if busy. */ 1206 if (beacon0_valid && beacon1_valid) { 1207 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON); 1208 dev->irq_mask |= B43legacy_IRQ_BEACON; 1209 return; 1210 } 1211 1212 if (unlikely(wl->beacon_templates_virgin)) { 1213 /* We never uploaded a beacon before. 1214 * Upload both templates now, but only mark one valid. */ 1215 wl->beacon_templates_virgin = false; 1216 b43legacy_upload_beacon0(dev); 1217 b43legacy_upload_beacon1(dev); 1218 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); 1219 cmd |= B43legacy_MACCMD_BEACON0_VALID; 1220 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); 1221 } else { 1222 if (!beacon0_valid) { 1223 b43legacy_upload_beacon0(dev); 1224 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); 1225 cmd |= B43legacy_MACCMD_BEACON0_VALID; 1226 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); 1227 } else if (!beacon1_valid) { 1228 b43legacy_upload_beacon1(dev); 1229 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); 1230 cmd |= B43legacy_MACCMD_BEACON1_VALID; 1231 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); 1232 } 1233 } 1234} 1235 1236static void b43legacy_beacon_update_trigger_work(struct work_struct *work) 1237{ 1238 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl, 1239 beacon_update_trigger); 1240 struct b43legacy_wldev *dev; 1241 1242 mutex_lock(&wl->mutex); 1243 dev = wl->current_dev; 1244 if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) { 1245 spin_lock_irq(&wl->irq_lock); 1246 /* Update beacon right away or defer to IRQ. */ 1247 handle_irq_beacon(dev); 1248 /* The handler might have updated the IRQ mask. */ 1249 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 1250 dev->irq_mask); 1251 mmiowb(); 1252 spin_unlock_irq(&wl->irq_lock); 1253 } 1254 mutex_unlock(&wl->mutex); 1255} 1256 1257/* Asynchronously update the packet templates in template RAM. 1258 * Locking: Requires wl->irq_lock to be locked. */ 1259static void b43legacy_update_templates(struct b43legacy_wl *wl) 1260{ 1261 struct sk_buff *beacon; 1262 /* This is the top half of the ansynchronous beacon update. The bottom 1263 * half is the beacon IRQ. Beacon update must be asynchronous to avoid 1264 * sending an invalid beacon. This can happen for example, if the 1265 * firmware transmits a beacon while we are updating it. */ 1266 1267 /* We could modify the existing beacon and set the aid bit in the TIM 1268 * field, but that would probably require resizing and moving of data 1269 * within the beacon template. Simply request a new beacon and let 1270 * mac80211 do the hard work. */ 1271 beacon = ieee80211_beacon_get(wl->hw, wl->vif); 1272 if (unlikely(!beacon)) 1273 return; 1274 1275 if (wl->current_beacon) 1276 dev_kfree_skb_any(wl->current_beacon); 1277 wl->current_beacon = beacon; 1278 wl->beacon0_uploaded = false; 1279 wl->beacon1_uploaded = false; 1280 ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger); 1281} 1282 1283static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev, 1284 u16 beacon_int) 1285{ 1286 b43legacy_time_lock(dev); 1287 if (dev->dev->id.revision >= 3) { 1288 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP, 1289 (beacon_int << 16)); 1290 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START, 1291 (beacon_int << 10)); 1292 } else { 1293 b43legacy_write16(dev, 0x606, (beacon_int >> 6)); 1294 b43legacy_write16(dev, 0x610, beacon_int); 1295 } 1296 b43legacy_time_unlock(dev); 1297 b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int); 1298} 1299 1300static void handle_irq_ucode_debug(struct b43legacy_wldev *dev) 1301{ 1302} 1303 1304/* Interrupt handler bottom-half */ 1305static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev) 1306{ 1307 u32 reason; 1308 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)]; 1309 u32 merged_dma_reason = 0; 1310 int i; 1311 unsigned long flags; 1312 1313 spin_lock_irqsave(&dev->wl->irq_lock, flags); 1314 1315 B43legacy_WARN_ON(b43legacy_status(dev) < 1316 B43legacy_STAT_INITIALIZED); 1317 1318 reason = dev->irq_reason; 1319 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) { 1320 dma_reason[i] = dev->dma_reason[i]; 1321 merged_dma_reason |= dma_reason[i]; 1322 } 1323 1324 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR)) 1325 b43legacyerr(dev->wl, "MAC transmission error\n"); 1326 1327 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) { 1328 b43legacyerr(dev->wl, "PHY transmission error\n"); 1329 rmb(); 1330 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) { 1331 b43legacyerr(dev->wl, "Too many PHY TX errors, " 1332 "restarting the controller\n"); 1333 b43legacy_controller_restart(dev, "PHY TX errors"); 1334 } 1335 } 1336 1337 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK | 1338 B43legacy_DMAIRQ_NONFATALMASK))) { 1339 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) { 1340 b43legacyerr(dev->wl, "Fatal DMA error: " 1341 "0x%08X, 0x%08X, 0x%08X, " 1342 "0x%08X, 0x%08X, 0x%08X\n", 1343 dma_reason[0], dma_reason[1], 1344 dma_reason[2], dma_reason[3], 1345 dma_reason[4], dma_reason[5]); 1346 b43legacy_controller_restart(dev, "DMA error"); 1347 mmiowb(); 1348 spin_unlock_irqrestore(&dev->wl->irq_lock, flags); 1349 return; 1350 } 1351 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK) 1352 b43legacyerr(dev->wl, "DMA error: " 1353 "0x%08X, 0x%08X, 0x%08X, " 1354 "0x%08X, 0x%08X, 0x%08X\n", 1355 dma_reason[0], dma_reason[1], 1356 dma_reason[2], dma_reason[3], 1357 dma_reason[4], dma_reason[5]); 1358 } 1359 1360 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG)) 1361 handle_irq_ucode_debug(dev); 1362 if (reason & B43legacy_IRQ_TBTT_INDI) 1363 handle_irq_tbtt_indication(dev); 1364 if (reason & B43legacy_IRQ_ATIM_END) 1365 handle_irq_atim_end(dev); 1366 if (reason & B43legacy_IRQ_BEACON) 1367 handle_irq_beacon(dev); 1368 if (reason & B43legacy_IRQ_PMQ) 1369 handle_irq_pmq(dev); 1370 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK) 1371 ;/*TODO*/ 1372 if (reason & B43legacy_IRQ_NOISESAMPLE_OK) 1373 handle_irq_noise(dev); 1374 1375 /* Check the DMA reason registers for received data. */ 1376 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) { 1377 if (b43legacy_using_pio(dev)) 1378 b43legacy_pio_rx(dev->pio.queue0); 1379 else 1380 b43legacy_dma_rx(dev->dma.rx_ring0); 1381 } 1382 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE); 1383 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE); 1384 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) { 1385 if (b43legacy_using_pio(dev)) 1386 b43legacy_pio_rx(dev->pio.queue3); 1387 else 1388 b43legacy_dma_rx(dev->dma.rx_ring3); 1389 } 1390 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE); 1391 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE); 1392 1393 if (reason & B43legacy_IRQ_TX_OK) 1394 handle_irq_transmit_status(dev); 1395 1396 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); 1397 mmiowb(); 1398 spin_unlock_irqrestore(&dev->wl->irq_lock, flags); 1399} 1400 1401static void pio_irq_workaround(struct b43legacy_wldev *dev, 1402 u16 base, int queueidx) 1403{ 1404 u16 rxctl; 1405 1406 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL); 1407 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE) 1408 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE; 1409 else 1410 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE; 1411} 1412 1413static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason) 1414{ 1415 if (b43legacy_using_pio(dev) && 1416 (dev->dev->id.revision < 3) && 1417 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) { 1418 /* Apply a PIO specific workaround to the dma_reasons */ 1419 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0); 1420 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1); 1421 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2); 1422 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3); 1423 } 1424 1425 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason); 1426 1427 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON, 1428 dev->dma_reason[0]); 1429 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON, 1430 dev->dma_reason[1]); 1431 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON, 1432 dev->dma_reason[2]); 1433 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON, 1434 dev->dma_reason[3]); 1435 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON, 1436 dev->dma_reason[4]); 1437 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON, 1438 dev->dma_reason[5]); 1439} 1440 1441/* Interrupt handler top-half */ 1442static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id) 1443{ 1444 irqreturn_t ret = IRQ_NONE; 1445 struct b43legacy_wldev *dev = dev_id; 1446 u32 reason; 1447 1448 B43legacy_WARN_ON(!dev); 1449 1450 spin_lock(&dev->wl->irq_lock); 1451 1452 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED)) 1453 /* This can only happen on shared IRQ lines. */ 1454 goto out; 1455 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1456 if (reason == 0xffffffff) /* shared IRQ */ 1457 goto out; 1458 ret = IRQ_HANDLED; 1459 reason &= dev->irq_mask; 1460 if (!reason) 1461 goto out; 1462 1463 dev->dma_reason[0] = b43legacy_read32(dev, 1464 B43legacy_MMIO_DMA0_REASON) 1465 & 0x0001DC00; 1466 dev->dma_reason[1] = b43legacy_read32(dev, 1467 B43legacy_MMIO_DMA1_REASON) 1468 & 0x0000DC00; 1469 dev->dma_reason[2] = b43legacy_read32(dev, 1470 B43legacy_MMIO_DMA2_REASON) 1471 & 0x0000DC00; 1472 dev->dma_reason[3] = b43legacy_read32(dev, 1473 B43legacy_MMIO_DMA3_REASON) 1474 & 0x0001DC00; 1475 dev->dma_reason[4] = b43legacy_read32(dev, 1476 B43legacy_MMIO_DMA4_REASON) 1477 & 0x0000DC00; 1478 dev->dma_reason[5] = b43legacy_read32(dev, 1479 B43legacy_MMIO_DMA5_REASON) 1480 & 0x0000DC00; 1481 1482 b43legacy_interrupt_ack(dev, reason); 1483 /* Disable all IRQs. They are enabled again in the bottom half. */ 1484 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); 1485 /* Save the reason code and call our bottom half. */ 1486 dev->irq_reason = reason; 1487 tasklet_schedule(&dev->isr_tasklet); 1488out: 1489 mmiowb(); 1490 spin_unlock(&dev->wl->irq_lock); 1491 1492 return ret; 1493} 1494 1495static void b43legacy_release_firmware(struct b43legacy_wldev *dev) 1496{ 1497 release_firmware(dev->fw.ucode); 1498 dev->fw.ucode = NULL; 1499 release_firmware(dev->fw.pcm); 1500 dev->fw.pcm = NULL; 1501 release_firmware(dev->fw.initvals); 1502 dev->fw.initvals = NULL; 1503 release_firmware(dev->fw.initvals_band); 1504 dev->fw.initvals_band = NULL; 1505} 1506 1507static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl) 1508{ 1509 b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/" 1510 "Drivers/b43#devicefirmware " 1511 "and download the correct firmware (version 3).\n"); 1512} 1513 1514static int do_request_fw(struct b43legacy_wldev *dev, 1515 const char *name, 1516 const struct firmware **fw) 1517{ 1518 char path[sizeof(modparam_fwpostfix) + 32]; 1519 struct b43legacy_fw_header *hdr; 1520 u32 size; 1521 int err; 1522 1523 if (!name) 1524 return 0; 1525 1526 snprintf(path, ARRAY_SIZE(path), 1527 "b43legacy%s/%s.fw", 1528 modparam_fwpostfix, name); 1529 err = request_firmware(fw, path, dev->dev->dev); 1530 if (err) { 1531 b43legacyerr(dev->wl, "Firmware file \"%s\" not found " 1532 "or load failed.\n", path); 1533 return err; 1534 } 1535 if ((*fw)->size < sizeof(struct b43legacy_fw_header)) 1536 goto err_format; 1537 hdr = (struct b43legacy_fw_header *)((*fw)->data); 1538 switch (hdr->type) { 1539 case B43legacy_FW_TYPE_UCODE: 1540 case B43legacy_FW_TYPE_PCM: 1541 size = be32_to_cpu(hdr->size); 1542 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header)) 1543 goto err_format; 1544 /* fallthrough */ 1545 case B43legacy_FW_TYPE_IV: 1546 if (hdr->ver != 1) 1547 goto err_format; 1548 break; 1549 default: 1550 goto err_format; 1551 } 1552 1553 return err; 1554 1555err_format: 1556 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path); 1557 return -EPROTO; 1558} 1559 1560static int b43legacy_one_core_attach(struct ssb_device *dev, 1561 struct b43legacy_wl *wl); 1562static void b43legacy_one_core_detach(struct ssb_device *dev); 1563 1564static void b43legacy_request_firmware(struct work_struct *work) 1565{ 1566 struct b43legacy_wl *wl = container_of(work, 1567 struct b43legacy_wl, firmware_load); 1568 struct b43legacy_wldev *dev = wl->current_dev; 1569 struct b43legacy_firmware *fw = &dev->fw; 1570 const u8 rev = dev->dev->id.revision; 1571 const char *filename; 1572 int err; 1573 1574 if (!fw->ucode) { 1575 if (rev == 2) 1576 filename = "ucode2"; 1577 else if (rev == 4) 1578 filename = "ucode4"; 1579 else 1580 filename = "ucode5"; 1581 err = do_request_fw(dev, filename, &fw->ucode); 1582 if (err) 1583 goto err_load; 1584 } 1585 if (!fw->pcm) { 1586 if (rev < 5) 1587 filename = "pcm4"; 1588 else 1589 filename = "pcm5"; 1590 err = do_request_fw(dev, filename, &fw->pcm); 1591 if (err) 1592 goto err_load; 1593 } 1594 if (!fw->initvals) { 1595 switch (dev->phy.type) { 1596 case B43legacy_PHYTYPE_B: 1597 case B43legacy_PHYTYPE_G: 1598 if ((rev >= 5) && (rev <= 10)) 1599 filename = "b0g0initvals5"; 1600 else if (rev == 2 || rev == 4) 1601 filename = "b0g0initvals2"; 1602 else 1603 goto err_no_initvals; 1604 break; 1605 default: 1606 goto err_no_initvals; 1607 } 1608 err = do_request_fw(dev, filename, &fw->initvals); 1609 if (err) 1610 goto err_load; 1611 } 1612 if (!fw->initvals_band) { 1613 switch (dev->phy.type) { 1614 case B43legacy_PHYTYPE_B: 1615 case B43legacy_PHYTYPE_G: 1616 if ((rev >= 5) && (rev <= 10)) 1617 filename = "b0g0bsinitvals5"; 1618 else if (rev >= 11) 1619 filename = NULL; 1620 else if (rev == 2 || rev == 4) 1621 filename = NULL; 1622 else 1623 goto err_no_initvals; 1624 break; 1625 default: 1626 goto err_no_initvals; 1627 } 1628 err = do_request_fw(dev, filename, &fw->initvals_band); 1629 if (err) 1630 goto err_load; 1631 } 1632 err = ieee80211_register_hw(wl->hw); 1633 if (err) 1634 goto err_one_core_detach; 1635 return; 1636 1637err_one_core_detach: 1638 b43legacy_one_core_detach(dev->dev); 1639 goto error; 1640 1641err_load: 1642 b43legacy_print_fw_helptext(dev->wl); 1643 goto error; 1644 1645err_no_initvals: 1646 err = -ENODEV; 1647 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, " 1648 "core rev %u\n", dev->phy.type, rev); 1649 goto error; 1650 1651error: 1652 b43legacy_release_firmware(dev); 1653 return; 1654} 1655 1656static int b43legacy_upload_microcode(struct b43legacy_wldev *dev) 1657{ 1658 struct wiphy *wiphy = dev->wl->hw->wiphy; 1659 const size_t hdr_len = sizeof(struct b43legacy_fw_header); 1660 const __be32 *data; 1661 unsigned int i; 1662 unsigned int len; 1663 u16 fwrev; 1664 u16 fwpatch; 1665 u16 fwdate; 1666 u16 fwtime; 1667 u32 tmp, macctl; 1668 int err = 0; 1669 1670 /* Jump the microcode PSM to offset 0 */ 1671 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 1672 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN); 1673 macctl |= B43legacy_MACCTL_PSM_JMP0; 1674 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 1675 /* Zero out all microcode PSM registers and shared memory. */ 1676 for (i = 0; i < 64; i++) 1677 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0); 1678 for (i = 0; i < 4096; i += 2) 1679 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0); 1680 1681 /* Upload Microcode. */ 1682 data = (__be32 *) (dev->fw.ucode->data + hdr_len); 1683 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32); 1684 b43legacy_shm_control_word(dev, 1685 B43legacy_SHM_UCODE | 1686 B43legacy_SHM_AUTOINC_W, 1687 0x0000); 1688 for (i = 0; i < len; i++) { 1689 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 1690 be32_to_cpu(data[i])); 1691 udelay(10); 1692 } 1693 1694 if (dev->fw.pcm) { 1695 /* Upload PCM data. */ 1696 data = (__be32 *) (dev->fw.pcm->data + hdr_len); 1697 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32); 1698 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA); 1699 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000); 1700 /* No need for autoinc bit in SHM_HW */ 1701 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB); 1702 for (i = 0; i < len; i++) { 1703 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 1704 be32_to_cpu(data[i])); 1705 udelay(10); 1706 } 1707 } 1708 1709 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 1710 B43legacy_IRQ_ALL); 1711 1712 /* Start the microcode PSM */ 1713 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 1714 macctl &= ~B43legacy_MACCTL_PSM_JMP0; 1715 macctl |= B43legacy_MACCTL_PSM_RUN; 1716 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 1717 1718 /* Wait for the microcode to load and respond */ 1719 i = 0; 1720 while (1) { 1721 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1722 if (tmp == B43legacy_IRQ_MAC_SUSPENDED) 1723 break; 1724 i++; 1725 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) { 1726 b43legacyerr(dev->wl, "Microcode not responding\n"); 1727 b43legacy_print_fw_helptext(dev->wl); 1728 err = -ENODEV; 1729 goto error; 1730 } 1731 msleep_interruptible(50); 1732 if (signal_pending(current)) { 1733 err = -EINTR; 1734 goto error; 1735 } 1736 } 1737 /* dummy read follows */ 1738 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1739 1740 /* Get and check the revisions. */ 1741 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 1742 B43legacy_SHM_SH_UCODEREV); 1743 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 1744 B43legacy_SHM_SH_UCODEPATCH); 1745 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 1746 B43legacy_SHM_SH_UCODEDATE); 1747 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 1748 B43legacy_SHM_SH_UCODETIME); 1749 1750 if (fwrev > 0x128) { 1751 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE." 1752 " Only firmware from binary drivers version 3.x" 1753 " is supported. You must change your firmware" 1754 " files.\n"); 1755 b43legacy_print_fw_helptext(dev->wl); 1756 err = -EOPNOTSUPP; 1757 goto error; 1758 } 1759 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u " 1760 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch, 1761 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF, 1762 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, 1763 fwtime & 0x1F); 1764 1765 dev->fw.rev = fwrev; 1766 dev->fw.patch = fwpatch; 1767 1768 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u", 1769 dev->fw.rev, dev->fw.patch); 1770 wiphy->hw_version = dev->dev->id.coreid; 1771 1772 return 0; 1773 1774error: 1775 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 1776 macctl &= ~B43legacy_MACCTL_PSM_RUN; 1777 macctl |= B43legacy_MACCTL_PSM_JMP0; 1778 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 1779 1780 return err; 1781} 1782 1783static int b43legacy_write_initvals(struct b43legacy_wldev *dev, 1784 const struct b43legacy_iv *ivals, 1785 size_t count, 1786 size_t array_size) 1787{ 1788 const struct b43legacy_iv *iv; 1789 u16 offset; 1790 size_t i; 1791 bool bit32; 1792 1793 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6); 1794 iv = ivals; 1795 for (i = 0; i < count; i++) { 1796 if (array_size < sizeof(iv->offset_size)) 1797 goto err_format; 1798 array_size -= sizeof(iv->offset_size); 1799 offset = be16_to_cpu(iv->offset_size); 1800 bit32 = !!(offset & B43legacy_IV_32BIT); 1801 offset &= B43legacy_IV_OFFSET_MASK; 1802 if (offset >= 0x1000) 1803 goto err_format; 1804 if (bit32) { 1805 u32 value; 1806 1807 if (array_size < sizeof(iv->data.d32)) 1808 goto err_format; 1809 array_size -= sizeof(iv->data.d32); 1810 1811 value = get_unaligned_be32(&iv->data.d32); 1812 b43legacy_write32(dev, offset, value); 1813 1814 iv = (const struct b43legacy_iv *)((const uint8_t *)iv + 1815 sizeof(__be16) + 1816 sizeof(__be32)); 1817 } else { 1818 u16 value; 1819 1820 if (array_size < sizeof(iv->data.d16)) 1821 goto err_format; 1822 array_size -= sizeof(iv->data.d16); 1823 1824 value = be16_to_cpu(iv->data.d16); 1825 b43legacy_write16(dev, offset, value); 1826 1827 iv = (const struct b43legacy_iv *)((const uint8_t *)iv + 1828 sizeof(__be16) + 1829 sizeof(__be16)); 1830 } 1831 } 1832 if (array_size) 1833 goto err_format; 1834 1835 return 0; 1836 1837err_format: 1838 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n"); 1839 b43legacy_print_fw_helptext(dev->wl); 1840 1841 return -EPROTO; 1842} 1843 1844static int b43legacy_upload_initvals(struct b43legacy_wldev *dev) 1845{ 1846 const size_t hdr_len = sizeof(struct b43legacy_fw_header); 1847 const struct b43legacy_fw_header *hdr; 1848 struct b43legacy_firmware *fw = &dev->fw; 1849 const struct b43legacy_iv *ivals; 1850 size_t count; 1851 int err; 1852 1853 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data); 1854 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len); 1855 count = be32_to_cpu(hdr->size); 1856 err = b43legacy_write_initvals(dev, ivals, count, 1857 fw->initvals->size - hdr_len); 1858 if (err) 1859 goto out; 1860 if (fw->initvals_band) { 1861 hdr = (const struct b43legacy_fw_header *) 1862 (fw->initvals_band->data); 1863 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data 1864 + hdr_len); 1865 count = be32_to_cpu(hdr->size); 1866 err = b43legacy_write_initvals(dev, ivals, count, 1867 fw->initvals_band->size - hdr_len); 1868 if (err) 1869 goto out; 1870 } 1871out: 1872 1873 return err; 1874} 1875 1876/* Initialize the GPIOs 1877 * http://bcm-specs.sipsolutions.net/GPIO 1878 */ 1879static int b43legacy_gpio_init(struct b43legacy_wldev *dev) 1880{ 1881 struct ssb_bus *bus = dev->dev->bus; 1882 struct ssb_device *gpiodev, *pcidev = NULL; 1883 u32 mask; 1884 u32 set; 1885 1886 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, 1887 b43legacy_read32(dev, 1888 B43legacy_MMIO_MACCTL) 1889 & 0xFFFF3FFF); 1890 1891 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, 1892 b43legacy_read16(dev, 1893 B43legacy_MMIO_GPIO_MASK) 1894 | 0x000F); 1895 1896 mask = 0x0000001F; 1897 set = 0x0000000F; 1898 if (dev->dev->bus->chip_id == 0x4301) { 1899 mask |= 0x0060; 1900 set |= 0x0060; 1901 } 1902 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) { 1903 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, 1904 b43legacy_read16(dev, 1905 B43legacy_MMIO_GPIO_MASK) 1906 | 0x0200); 1907 mask |= 0x0200; 1908 set |= 0x0200; 1909 } 1910 if (dev->dev->id.revision >= 2) 1911 mask |= 0x0010; /* FIXME: This is redundant. */ 1912 1913#ifdef CONFIG_SSB_DRIVER_PCICORE 1914 pcidev = bus->pcicore.dev; 1915#endif 1916 gpiodev = bus->chipco.dev ? : pcidev; 1917 if (!gpiodev) 1918 return 0; 1919 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 1920 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL) 1921 & mask) | set); 1922 1923 return 0; 1924} 1925 1926/* Turn off all GPIO stuff. Call this on module unload, for example. */ 1927static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev) 1928{ 1929 struct ssb_bus *bus = dev->dev->bus; 1930 struct ssb_device *gpiodev, *pcidev = NULL; 1931 1932#ifdef CONFIG_SSB_DRIVER_PCICORE 1933 pcidev = bus->pcicore.dev; 1934#endif 1935 gpiodev = bus->chipco.dev ? : pcidev; 1936 if (!gpiodev) 1937 return; 1938 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0); 1939} 1940 1941/* http://bcm-specs.sipsolutions.net/EnableMac */ 1942void b43legacy_mac_enable(struct b43legacy_wldev *dev) 1943{ 1944 dev->mac_suspended--; 1945 B43legacy_WARN_ON(dev->mac_suspended < 0); 1946 B43legacy_WARN_ON(irqs_disabled()); 1947 if (dev->mac_suspended == 0) { 1948 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, 1949 b43legacy_read32(dev, 1950 B43legacy_MMIO_MACCTL) 1951 | B43legacy_MACCTL_ENABLED); 1952 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 1953 B43legacy_IRQ_MAC_SUSPENDED); 1954 /* the next two are dummy reads */ 1955 b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 1956 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1957 b43legacy_power_saving_ctl_bits(dev, -1, -1); 1958 1959 /* Re-enable IRQs. */ 1960 spin_lock_irq(&dev->wl->irq_lock); 1961 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 1962 dev->irq_mask); 1963 spin_unlock_irq(&dev->wl->irq_lock); 1964 } 1965} 1966 1967/* http://bcm-specs.sipsolutions.net/SuspendMAC */ 1968void b43legacy_mac_suspend(struct b43legacy_wldev *dev) 1969{ 1970 int i; 1971 u32 tmp; 1972 1973 might_sleep(); 1974 B43legacy_WARN_ON(irqs_disabled()); 1975 B43legacy_WARN_ON(dev->mac_suspended < 0); 1976 1977 if (dev->mac_suspended == 0) { 1978 /* Mask IRQs before suspending MAC. Otherwise 1979 * the MAC stays busy and won't suspend. */ 1980 spin_lock_irq(&dev->wl->irq_lock); 1981 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); 1982 spin_unlock_irq(&dev->wl->irq_lock); 1983 b43legacy_synchronize_irq(dev); 1984 1985 b43legacy_power_saving_ctl_bits(dev, -1, 1); 1986 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, 1987 b43legacy_read32(dev, 1988 B43legacy_MMIO_MACCTL) 1989 & ~B43legacy_MACCTL_ENABLED); 1990 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1991 for (i = 40; i; i--) { 1992 tmp = b43legacy_read32(dev, 1993 B43legacy_MMIO_GEN_IRQ_REASON); 1994 if (tmp & B43legacy_IRQ_MAC_SUSPENDED) 1995 goto out; 1996 msleep(1); 1997 } 1998 b43legacyerr(dev->wl, "MAC suspend failed\n"); 1999 } 2000out: 2001 dev->mac_suspended++; 2002} 2003 2004static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev) 2005{ 2006 struct b43legacy_wl *wl = dev->wl; 2007 u32 ctl; 2008 u16 cfp_pretbtt; 2009 2010 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 2011 /* Reset status to STA infrastructure mode. */ 2012 ctl &= ~B43legacy_MACCTL_AP; 2013 ctl &= ~B43legacy_MACCTL_KEEP_CTL; 2014 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP; 2015 ctl &= ~B43legacy_MACCTL_KEEP_BAD; 2016 ctl &= ~B43legacy_MACCTL_PROMISC; 2017 ctl &= ~B43legacy_MACCTL_BEACPROMISC; 2018 ctl |= B43legacy_MACCTL_INFRA; 2019 2020 if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP)) 2021 ctl |= B43legacy_MACCTL_AP; 2022 else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)) 2023 ctl &= ~B43legacy_MACCTL_INFRA; 2024 2025 if (wl->filter_flags & FIF_CONTROL) 2026 ctl |= B43legacy_MACCTL_KEEP_CTL; 2027 if (wl->filter_flags & FIF_FCSFAIL) 2028 ctl |= B43legacy_MACCTL_KEEP_BAD; 2029 if (wl->filter_flags & FIF_PLCPFAIL) 2030 ctl |= B43legacy_MACCTL_KEEP_BADPLCP; 2031 if (wl->filter_flags & FIF_PROMISC_IN_BSS) 2032 ctl |= B43legacy_MACCTL_PROMISC; 2033 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC) 2034 ctl |= B43legacy_MACCTL_BEACPROMISC; 2035 2036 /* Workaround: On old hardware the HW-MAC-address-filter 2037 * doesn't work properly, so always run promisc in filter 2038 * it in software. */ 2039 if (dev->dev->id.revision <= 4) 2040 ctl |= B43legacy_MACCTL_PROMISC; 2041 2042 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl); 2043 2044 cfp_pretbtt = 2; 2045 if ((ctl & B43legacy_MACCTL_INFRA) && 2046 !(ctl & B43legacy_MACCTL_AP)) { 2047 if (dev->dev->bus->chip_id == 0x4306 && 2048 dev->dev->bus->chip_rev == 3) 2049 cfp_pretbtt = 100; 2050 else 2051 cfp_pretbtt = 50; 2052 } 2053 b43legacy_write16(dev, 0x612, cfp_pretbtt); 2054} 2055 2056static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev, 2057 u16 rate, 2058 int is_ofdm) 2059{ 2060 u16 offset; 2061 2062 if (is_ofdm) { 2063 offset = 0x480; 2064 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2; 2065 } else { 2066 offset = 0x4C0; 2067 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2; 2068 } 2069 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20, 2070 b43legacy_shm_read16(dev, 2071 B43legacy_SHM_SHARED, offset)); 2072} 2073 2074static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev) 2075{ 2076 switch (dev->phy.type) { 2077 case B43legacy_PHYTYPE_G: 2078 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1); 2079 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1); 2080 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1); 2081 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1); 2082 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1); 2083 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1); 2084 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1); 2085 /* fallthrough */ 2086 case B43legacy_PHYTYPE_B: 2087 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0); 2088 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0); 2089 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0); 2090 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0); 2091 break; 2092 default: 2093 B43legacy_BUG_ON(1); 2094 } 2095} 2096 2097/* Set the TX-Antenna for management frames sent by firmware. */ 2098static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev, 2099 int antenna) 2100{ 2101 u16 ant = 0; 2102 u16 tmp; 2103 2104 switch (antenna) { 2105 case B43legacy_ANTENNA0: 2106 ant |= B43legacy_TX4_PHY_ANT0; 2107 break; 2108 case B43legacy_ANTENNA1: 2109 ant |= B43legacy_TX4_PHY_ANT1; 2110 break; 2111 case B43legacy_ANTENNA_AUTO: 2112 ant |= B43legacy_TX4_PHY_ANTLAST; 2113 break; 2114 default: 2115 B43legacy_BUG_ON(1); 2116 } 2117 2118 /* FIXME We also need to set the other flags of the PHY control 2119 * field somewhere. */ 2120 2121 /* For Beacons */ 2122 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2123 B43legacy_SHM_SH_BEACPHYCTL); 2124 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; 2125 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 2126 B43legacy_SHM_SH_BEACPHYCTL, tmp); 2127 /* For ACK/CTS */ 2128 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2129 B43legacy_SHM_SH_ACKCTSPHYCTL); 2130 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; 2131 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 2132 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp); 2133 /* For Probe Resposes */ 2134 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2135 B43legacy_SHM_SH_PRPHYCTL); 2136 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; 2137 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 2138 B43legacy_SHM_SH_PRPHYCTL, tmp); 2139} 2140 2141/* This is the opposite of b43legacy_chip_init() */ 2142static void b43legacy_chip_exit(struct b43legacy_wldev *dev) 2143{ 2144 b43legacy_radio_turn_off(dev, 1); 2145 b43legacy_gpio_cleanup(dev); 2146 /* firmware is released later */ 2147} 2148 2149/* Initialize the chip 2150 * http://bcm-specs.sipsolutions.net/ChipInit 2151 */ 2152static int b43legacy_chip_init(struct b43legacy_wldev *dev) 2153{ 2154 struct b43legacy_phy *phy = &dev->phy; 2155 int err; 2156 int tmp; 2157 u32 value32, macctl; 2158 u16 value16; 2159 2160 /* Initialize the MAC control */ 2161 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED; 2162 if (dev->phy.gmode) 2163 macctl |= B43legacy_MACCTL_GMODE; 2164 macctl |= B43legacy_MACCTL_INFRA; 2165 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 2166 2167 err = b43legacy_upload_microcode(dev); 2168 if (err) 2169 goto out; /* firmware is released later */ 2170 2171 err = b43legacy_gpio_init(dev); 2172 if (err) 2173 goto out; /* firmware is released later */ 2174 2175 err = b43legacy_upload_initvals(dev); 2176 if (err) 2177 goto err_gpio_clean; 2178 b43legacy_radio_turn_on(dev); 2179 2180 b43legacy_write16(dev, 0x03E6, 0x0000); 2181 err = b43legacy_phy_init(dev); 2182 if (err) 2183 goto err_radio_off; 2184 2185 /* Select initial Interference Mitigation. */ 2186 tmp = phy->interfmode; 2187 phy->interfmode = B43legacy_INTERFMODE_NONE; 2188 b43legacy_radio_set_interference_mitigation(dev, tmp); 2189 2190 b43legacy_phy_set_antenna_diversity(dev); 2191 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT); 2192 2193 if (phy->type == B43legacy_PHYTYPE_B) { 2194 value16 = b43legacy_read16(dev, 0x005E); 2195 value16 |= 0x0004; 2196 b43legacy_write16(dev, 0x005E, value16); 2197 } 2198 b43legacy_write32(dev, 0x0100, 0x01000000); 2199 if (dev->dev->id.revision < 5) 2200 b43legacy_write32(dev, 0x010C, 0x01000000); 2201 2202 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 2203 value32 &= ~B43legacy_MACCTL_INFRA; 2204 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32); 2205 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 2206 value32 |= B43legacy_MACCTL_INFRA; 2207 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32); 2208 2209 if (b43legacy_using_pio(dev)) { 2210 b43legacy_write32(dev, 0x0210, 0x00000100); 2211 b43legacy_write32(dev, 0x0230, 0x00000100); 2212 b43legacy_write32(dev, 0x0250, 0x00000100); 2213 b43legacy_write32(dev, 0x0270, 0x00000100); 2214 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034, 2215 0x0000); 2216 } 2217 2218 /* Probe Response Timeout value */ 2219 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */ 2220 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000); 2221 2222 /* Initially set the wireless operation mode. */ 2223 b43legacy_adjust_opmode(dev); 2224 2225 if (dev->dev->id.revision < 3) { 2226 b43legacy_write16(dev, 0x060E, 0x0000); 2227 b43legacy_write16(dev, 0x0610, 0x8000); 2228 b43legacy_write16(dev, 0x0604, 0x0000); 2229 b43legacy_write16(dev, 0x0606, 0x0200); 2230 } else { 2231 b43legacy_write32(dev, 0x0188, 0x80000000); 2232 b43legacy_write32(dev, 0x018C, 0x02000000); 2233 } 2234 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000); 2235 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00); 2236 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00); 2237 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00); 2238 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00); 2239 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00); 2240 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00); 2241 2242 value32 = ssb_read32(dev->dev, SSB_TMSLOW); 2243 value32 |= B43legacy_TMSLOW_MACPHYCLKEN; 2244 ssb_write32(dev->dev, SSB_TMSLOW, value32); 2245 2246 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY, 2247 dev->dev->bus->chipco.fast_pwrup_delay); 2248 2249 /* PHY TX errors counter. */ 2250 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT); 2251 2252 B43legacy_WARN_ON(err != 0); 2253 b43legacydbg(dev->wl, "Chip initialized\n"); 2254out: 2255 return err; 2256 2257err_radio_off: 2258 b43legacy_radio_turn_off(dev, 1); 2259err_gpio_clean: 2260 b43legacy_gpio_cleanup(dev); 2261 goto out; 2262} 2263 2264static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev) 2265{ 2266 struct b43legacy_phy *phy = &dev->phy; 2267 2268 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2) 2269 return; 2270 2271 b43legacy_mac_suspend(dev); 2272 b43legacy_phy_lo_g_measure(dev); 2273 b43legacy_mac_enable(dev); 2274} 2275 2276static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev) 2277{ 2278 b43legacy_phy_lo_mark_all_unused(dev); 2279 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) { 2280 b43legacy_mac_suspend(dev); 2281 b43legacy_calc_nrssi_slope(dev); 2282 b43legacy_mac_enable(dev); 2283 } 2284} 2285 2286static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev) 2287{ 2288 /* Update device statistics. */ 2289 b43legacy_calculate_link_quality(dev); 2290} 2291 2292static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev) 2293{ 2294 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */ 2295 2296 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT); 2297 wmb(); 2298} 2299 2300static void do_periodic_work(struct b43legacy_wldev *dev) 2301{ 2302 unsigned int state; 2303 2304 state = dev->periodic_state; 2305 if (state % 8 == 0) 2306 b43legacy_periodic_every120sec(dev); 2307 if (state % 4 == 0) 2308 b43legacy_periodic_every60sec(dev); 2309 if (state % 2 == 0) 2310 b43legacy_periodic_every30sec(dev); 2311 b43legacy_periodic_every15sec(dev); 2312} 2313 2314/* Periodic work locking policy: 2315 * The whole periodic work handler is protected by 2316 * wl->mutex. If another lock is needed somewhere in the 2317 * pwork callchain, it's acquired in-place, where it's needed. 2318 */ 2319static void b43legacy_periodic_work_handler(struct work_struct *work) 2320{ 2321 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev, 2322 periodic_work.work); 2323 struct b43legacy_wl *wl = dev->wl; 2324 unsigned long delay; 2325 2326 mutex_lock(&wl->mutex); 2327 2328 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED)) 2329 goto out; 2330 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP)) 2331 goto out_requeue; 2332 2333 do_periodic_work(dev); 2334 2335 dev->periodic_state++; 2336out_requeue: 2337 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST)) 2338 delay = msecs_to_jiffies(50); 2339 else 2340 delay = round_jiffies_relative(HZ * 15); 2341 ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay); 2342out: 2343 mutex_unlock(&wl->mutex); 2344} 2345 2346static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev) 2347{ 2348 struct delayed_work *work = &dev->periodic_work; 2349 2350 dev->periodic_state = 0; 2351 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler); 2352 ieee80211_queue_delayed_work(dev->wl->hw, work, 0); 2353} 2354 2355/* Validate access to the chip (SHM) */ 2356static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev) 2357{ 2358 u32 value; 2359 u32 shm_backup; 2360 2361 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0); 2362 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA); 2363 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) != 2364 0xAA5555AA) 2365 goto error; 2366 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55); 2367 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) != 2368 0x55AAAA55) 2369 goto error; 2370 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup); 2371 2372 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 2373 if ((value | B43legacy_MACCTL_GMODE) != 2374 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED)) 2375 goto error; 2376 2377 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 2378 if (value) 2379 goto error; 2380 2381 return 0; 2382error: 2383 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n"); 2384 return -ENODEV; 2385} 2386 2387static void b43legacy_security_init(struct b43legacy_wldev *dev) 2388{ 2389 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20; 2390 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key)); 2391 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2392 0x0056); 2393 /* KTP is a word address, but we address SHM bytewise. 2394 * So multiply by two. 2395 */ 2396 dev->ktp *= 2; 2397 if (dev->dev->id.revision >= 5) 2398 /* Number of RCMTA address slots */ 2399 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT, 2400 dev->max_nr_keys - 8); 2401} 2402 2403#ifdef CONFIG_B43LEGACY_HWRNG 2404static int b43legacy_rng_read(struct hwrng *rng, u32 *data) 2405{ 2406 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv; 2407 unsigned long flags; 2408 2409 /* Don't take wl->mutex here, as it could deadlock with 2410 * hwrng internal locking. It's not needed to take 2411 * wl->mutex here, anyway. */ 2412 2413 spin_lock_irqsave(&wl->irq_lock, flags); 2414 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG); 2415 spin_unlock_irqrestore(&wl->irq_lock, flags); 2416 2417 return (sizeof(u16)); 2418} 2419#endif 2420 2421static void b43legacy_rng_exit(struct b43legacy_wl *wl) 2422{ 2423#ifdef CONFIG_B43LEGACY_HWRNG 2424 if (wl->rng_initialized) 2425 hwrng_unregister(&wl->rng); 2426#endif 2427} 2428 2429static int b43legacy_rng_init(struct b43legacy_wl *wl) 2430{ 2431 int err = 0; 2432 2433#ifdef CONFIG_B43LEGACY_HWRNG 2434 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name), 2435 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy)); 2436 wl->rng.name = wl->rng_name; 2437 wl->rng.data_read = b43legacy_rng_read; 2438 wl->rng.priv = (unsigned long)wl; 2439 wl->rng_initialized = 1; 2440 err = hwrng_register(&wl->rng); 2441 if (err) { 2442 wl->rng_initialized = 0; 2443 b43legacyerr(wl, "Failed to register the random " 2444 "number generator (%d)\n", err); 2445 } 2446 2447#endif 2448 return err; 2449} 2450 2451static void b43legacy_tx_work(struct work_struct *work) 2452{ 2453 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl, 2454 tx_work); 2455 struct b43legacy_wldev *dev; 2456 struct sk_buff *skb; 2457 int queue_num; 2458 int err = 0; 2459 2460 mutex_lock(&wl->mutex); 2461 dev = wl->current_dev; 2462 if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) { 2463 mutex_unlock(&wl->mutex); 2464 return; 2465 } 2466 2467 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) { 2468 while (skb_queue_len(&wl->tx_queue[queue_num])) { 2469 skb = skb_dequeue(&wl->tx_queue[queue_num]); 2470 if (b43legacy_using_pio(dev)) 2471 err = b43legacy_pio_tx(dev, skb); 2472 else 2473 err = b43legacy_dma_tx(dev, skb); 2474 if (err == -ENOSPC) { 2475 wl->tx_queue_stopped[queue_num] = 1; 2476 ieee80211_stop_queue(wl->hw, queue_num); 2477 skb_queue_head(&wl->tx_queue[queue_num], skb); 2478 break; 2479 } 2480 if (unlikely(err)) 2481 dev_kfree_skb(skb); /* Drop it */ 2482 err = 0; 2483 } 2484 2485 if (!err) 2486 wl->tx_queue_stopped[queue_num] = 0; 2487 } 2488 2489 mutex_unlock(&wl->mutex); 2490} 2491 2492static void b43legacy_op_tx(struct ieee80211_hw *hw, 2493 struct sk_buff *skb) 2494{ 2495 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 2496 2497 if (unlikely(skb->len < 2 + 2 + 6)) { 2498 /* Too short, this can't be a valid frame. */ 2499 dev_kfree_skb_any(skb); 2500 return; 2501 } 2502 B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags); 2503 2504 skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb); 2505 if (!wl->tx_queue_stopped[skb->queue_mapping]) 2506 ieee80211_queue_work(wl->hw, &wl->tx_work); 2507 else 2508 ieee80211_stop_queue(wl->hw, skb->queue_mapping); 2509} 2510 2511static int b43legacy_op_conf_tx(struct ieee80211_hw *hw, 2512 struct ieee80211_vif *vif, u16 queue, 2513 const struct ieee80211_tx_queue_params *params) 2514{ 2515 return 0; 2516} 2517 2518static int b43legacy_op_get_stats(struct ieee80211_hw *hw, 2519 struct ieee80211_low_level_stats *stats) 2520{ 2521 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 2522 unsigned long flags; 2523 2524 spin_lock_irqsave(&wl->irq_lock, flags); 2525 memcpy(stats, &wl->ieee_stats, sizeof(*stats)); 2526 spin_unlock_irqrestore(&wl->irq_lock, flags); 2527 2528 return 0; 2529} 2530 2531static const char *phymode_to_string(unsigned int phymode) 2532{ 2533 switch (phymode) { 2534 case B43legacy_PHYMODE_B: 2535 return "B"; 2536 case B43legacy_PHYMODE_G: 2537 return "G"; 2538 default: 2539 B43legacy_BUG_ON(1); 2540 } 2541 return ""; 2542} 2543 2544static int find_wldev_for_phymode(struct b43legacy_wl *wl, 2545 unsigned int phymode, 2546 struct b43legacy_wldev **dev, 2547 bool *gmode) 2548{ 2549 struct b43legacy_wldev *d; 2550 2551 list_for_each_entry(d, &wl->devlist, list) { 2552 if (d->phy.possible_phymodes & phymode) { 2553 /* Ok, this device supports the PHY-mode. 2554 * Set the gmode bit. */ 2555 *gmode = true; 2556 *dev = d; 2557 2558 return 0; 2559 } 2560 } 2561 2562 return -ESRCH; 2563} 2564 2565static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev) 2566{ 2567 struct ssb_device *sdev = dev->dev; 2568 u32 tmslow; 2569 2570 tmslow = ssb_read32(sdev, SSB_TMSLOW); 2571 tmslow &= ~B43legacy_TMSLOW_GMODE; 2572 tmslow |= B43legacy_TMSLOW_PHYRESET; 2573 tmslow |= SSB_TMSLOW_FGC; 2574 ssb_write32(sdev, SSB_TMSLOW, tmslow); 2575 msleep(1); 2576 2577 tmslow = ssb_read32(sdev, SSB_TMSLOW); 2578 tmslow &= ~SSB_TMSLOW_FGC; 2579 tmslow |= B43legacy_TMSLOW_PHYRESET; 2580 ssb_write32(sdev, SSB_TMSLOW, tmslow); 2581 msleep(1); 2582} 2583 2584/* Expects wl->mutex locked */ 2585static int b43legacy_switch_phymode(struct b43legacy_wl *wl, 2586 unsigned int new_mode) 2587{ 2588 struct b43legacy_wldev *uninitialized_var(up_dev); 2589 struct b43legacy_wldev *down_dev; 2590 int err; 2591 bool gmode = false; 2592 int prev_status; 2593 2594 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode); 2595 if (err) { 2596 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n", 2597 phymode_to_string(new_mode)); 2598 return err; 2599 } 2600 if ((up_dev == wl->current_dev) && 2601 (!!wl->current_dev->phy.gmode == !!gmode)) 2602 /* This device is already running. */ 2603 return 0; 2604 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n", 2605 phymode_to_string(new_mode)); 2606 down_dev = wl->current_dev; 2607 2608 prev_status = b43legacy_status(down_dev); 2609 /* Shutdown the currently running core. */ 2610 if (prev_status >= B43legacy_STAT_STARTED) 2611 b43legacy_wireless_core_stop(down_dev); 2612 if (prev_status >= B43legacy_STAT_INITIALIZED) 2613 b43legacy_wireless_core_exit(down_dev); 2614 2615 if (down_dev != up_dev) 2616 /* We switch to a different core, so we put PHY into 2617 * RESET on the old core. */ 2618 b43legacy_put_phy_into_reset(down_dev); 2619 2620 /* Now start the new core. */ 2621 up_dev->phy.gmode = gmode; 2622 if (prev_status >= B43legacy_STAT_INITIALIZED) { 2623 err = b43legacy_wireless_core_init(up_dev); 2624 if (err) { 2625 b43legacyerr(wl, "Fatal: Could not initialize device" 2626 " for newly selected %s-PHY mode\n", 2627 phymode_to_string(new_mode)); 2628 goto init_failure; 2629 } 2630 } 2631 if (prev_status >= B43legacy_STAT_STARTED) { 2632 err = b43legacy_wireless_core_start(up_dev); 2633 if (err) { 2634 b43legacyerr(wl, "Fatal: Coult not start device for " 2635 "newly selected %s-PHY mode\n", 2636 phymode_to_string(new_mode)); 2637 b43legacy_wireless_core_exit(up_dev); 2638 goto init_failure; 2639 } 2640 } 2641 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status); 2642 2643 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0); 2644 2645 wl->current_dev = up_dev; 2646 2647 return 0; 2648init_failure: 2649 /* Whoops, failed to init the new core. No core is operating now. */ 2650 wl->current_dev = NULL; 2651 return err; 2652} 2653 2654/* Write the short and long frame retry limit values. */ 2655static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev, 2656 unsigned int short_retry, 2657 unsigned int long_retry) 2658{ 2659 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing 2660 * the chip-internal counter. */ 2661 short_retry = min(short_retry, (unsigned int)0xF); 2662 long_retry = min(long_retry, (unsigned int)0xF); 2663 2664 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry); 2665 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry); 2666} 2667 2668static int b43legacy_op_dev_config(struct ieee80211_hw *hw, 2669 u32 changed) 2670{ 2671 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 2672 struct b43legacy_wldev *dev; 2673 struct b43legacy_phy *phy; 2674 struct ieee80211_conf *conf = &hw->conf; 2675 unsigned long flags; 2676 unsigned int new_phymode = 0xFFFF; 2677 int antenna_tx; 2678 int err = 0; 2679 2680 antenna_tx = B43legacy_ANTENNA_DEFAULT; 2681 2682 mutex_lock(&wl->mutex); 2683 dev = wl->current_dev; 2684 phy = &dev->phy; 2685 2686 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) 2687 b43legacy_set_retry_limits(dev, 2688 conf->short_frame_max_tx_count, 2689 conf->long_frame_max_tx_count); 2690 changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS; 2691 if (!changed) 2692 goto out_unlock_mutex; 2693 2694 /* Switch the PHY mode (if necessary). */ 2695 switch (conf->channel->band) { 2696 case IEEE80211_BAND_2GHZ: 2697 if (phy->type == B43legacy_PHYTYPE_B) 2698 new_phymode = B43legacy_PHYMODE_B; 2699 else 2700 new_phymode = B43legacy_PHYMODE_G; 2701 break; 2702 default: 2703 B43legacy_WARN_ON(1); 2704 } 2705 err = b43legacy_switch_phymode(wl, new_phymode); 2706 if (err) 2707 goto out_unlock_mutex; 2708 2709 /* Disable IRQs while reconfiguring the device. 2710 * This makes it possible to drop the spinlock throughout 2711 * the reconfiguration process. */ 2712 spin_lock_irqsave(&wl->irq_lock, flags); 2713 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { 2714 spin_unlock_irqrestore(&wl->irq_lock, flags); 2715 goto out_unlock_mutex; 2716 } 2717 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); 2718 spin_unlock_irqrestore(&wl->irq_lock, flags); 2719 b43legacy_synchronize_irq(dev); 2720 2721 /* Switch to the requested channel. 2722 * The firmware takes care of races with the TX handler. */ 2723 if (conf->channel->hw_value != phy->channel) 2724 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0); 2725 2726 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR); 2727 2728 /* Adjust the desired TX power level. */ 2729 if (conf->power_level != 0) { 2730 if (conf->power_level != phy->power_level) { 2731 phy->power_level = conf->power_level; 2732 b43legacy_phy_xmitpower(dev); 2733 } 2734 } 2735 2736 /* Antennas for RX and management frame TX. */ 2737 b43legacy_mgmtframe_txantenna(dev, antenna_tx); 2738 2739 if (wl->radio_enabled != phy->radio_on) { 2740 if (wl->radio_enabled) { 2741 b43legacy_radio_turn_on(dev); 2742 b43legacyinfo(dev->wl, "Radio turned on by software\n"); 2743 if (!dev->radio_hw_enable) 2744 b43legacyinfo(dev->wl, "The hardware RF-kill" 2745 " button still turns the radio" 2746 " physically off. Press the" 2747 " button to turn it on.\n"); 2748 } else { 2749 b43legacy_radio_turn_off(dev, 0); 2750 b43legacyinfo(dev->wl, "Radio turned off by" 2751 " software\n"); 2752 } 2753 } 2754 2755 spin_lock_irqsave(&wl->irq_lock, flags); 2756 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); 2757 mmiowb(); 2758 spin_unlock_irqrestore(&wl->irq_lock, flags); 2759out_unlock_mutex: 2760 mutex_unlock(&wl->mutex); 2761 2762 return err; 2763} 2764 2765static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates) 2766{ 2767 struct ieee80211_supported_band *sband = 2768 dev->wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ]; 2769 struct ieee80211_rate *rate; 2770 int i; 2771 u16 basic, direct, offset, basic_offset, rateptr; 2772 2773 for (i = 0; i < sband->n_bitrates; i++) { 2774 rate = &sband->bitrates[i]; 2775 2776 if (b43legacy_is_cck_rate(rate->hw_value)) { 2777 direct = B43legacy_SHM_SH_CCKDIRECT; 2778 basic = B43legacy_SHM_SH_CCKBASIC; 2779 offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value); 2780 offset &= 0xF; 2781 } else { 2782 direct = B43legacy_SHM_SH_OFDMDIRECT; 2783 basic = B43legacy_SHM_SH_OFDMBASIC; 2784 offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value); 2785 offset &= 0xF; 2786 } 2787 2788 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate); 2789 2790 if (b43legacy_is_cck_rate(rate->hw_value)) { 2791 basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value); 2792 basic_offset &= 0xF; 2793 } else { 2794 basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value); 2795 basic_offset &= 0xF; 2796 } 2797 2798 /* 2799 * Get the pointer that we need to point to 2800 * from the direct map 2801 */ 2802 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2803 direct + 2 * basic_offset); 2804 /* and write it to the basic map */ 2805 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 2806 basic + 2 * offset, rateptr); 2807 } 2808} 2809 2810static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw, 2811 struct ieee80211_vif *vif, 2812 struct ieee80211_bss_conf *conf, 2813 u32 changed) 2814{ 2815 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 2816 struct b43legacy_wldev *dev; 2817 unsigned long flags; 2818 2819 mutex_lock(&wl->mutex); 2820 B43legacy_WARN_ON(wl->vif != vif); 2821 2822 dev = wl->current_dev; 2823 2824 /* Disable IRQs while reconfiguring the device. 2825 * This makes it possible to drop the spinlock throughout 2826 * the reconfiguration process. */ 2827 spin_lock_irqsave(&wl->irq_lock, flags); 2828 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { 2829 spin_unlock_irqrestore(&wl->irq_lock, flags); 2830 goto out_unlock_mutex; 2831 } 2832 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); 2833 2834 if (changed & BSS_CHANGED_BSSID) { 2835 b43legacy_synchronize_irq(dev); 2836 2837 if (conf->bssid) 2838 memcpy(wl->bssid, conf->bssid, ETH_ALEN); 2839 else 2840 memset(wl->bssid, 0, ETH_ALEN); 2841 } 2842 2843 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) { 2844 if (changed & BSS_CHANGED_BEACON && 2845 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) || 2846 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))) 2847 b43legacy_update_templates(wl); 2848 2849 if (changed & BSS_CHANGED_BSSID) 2850 b43legacy_write_mac_bssid_templates(dev); 2851 } 2852 spin_unlock_irqrestore(&wl->irq_lock, flags); 2853 2854 b43legacy_mac_suspend(dev); 2855 2856 if (changed & BSS_CHANGED_BEACON_INT && 2857 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) || 2858 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))) 2859 b43legacy_set_beacon_int(dev, conf->beacon_int); 2860 2861 if (changed & BSS_CHANGED_BASIC_RATES) 2862 b43legacy_update_basic_rates(dev, conf->basic_rates); 2863 2864 if (changed & BSS_CHANGED_ERP_SLOT) { 2865 if (conf->use_short_slot) 2866 b43legacy_short_slot_timing_enable(dev); 2867 else 2868 b43legacy_short_slot_timing_disable(dev); 2869 } 2870 2871 b43legacy_mac_enable(dev); 2872 2873 spin_lock_irqsave(&wl->irq_lock, flags); 2874 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); 2875 /* XXX: why? */ 2876 mmiowb(); 2877 spin_unlock_irqrestore(&wl->irq_lock, flags); 2878 out_unlock_mutex: 2879 mutex_unlock(&wl->mutex); 2880} 2881 2882static void b43legacy_op_configure_filter(struct ieee80211_hw *hw, 2883 unsigned int changed, 2884 unsigned int *fflags,u64 multicast) 2885{ 2886 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 2887 struct b43legacy_wldev *dev = wl->current_dev; 2888 unsigned long flags; 2889 2890 if (!dev) { 2891 *fflags = 0; 2892 return; 2893 } 2894 2895 spin_lock_irqsave(&wl->irq_lock, flags); 2896 *fflags &= FIF_PROMISC_IN_BSS | 2897 FIF_ALLMULTI | 2898 FIF_FCSFAIL | 2899 FIF_PLCPFAIL | 2900 FIF_CONTROL | 2901 FIF_OTHER_BSS | 2902 FIF_BCN_PRBRESP_PROMISC; 2903 2904 changed &= FIF_PROMISC_IN_BSS | 2905 FIF_ALLMULTI | 2906 FIF_FCSFAIL | 2907 FIF_PLCPFAIL | 2908 FIF_CONTROL | 2909 FIF_OTHER_BSS | 2910 FIF_BCN_PRBRESP_PROMISC; 2911 2912 wl->filter_flags = *fflags; 2913 2914 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) 2915 b43legacy_adjust_opmode(dev); 2916 spin_unlock_irqrestore(&wl->irq_lock, flags); 2917} 2918 2919/* Locking: wl->mutex */ 2920static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev) 2921{ 2922 struct b43legacy_wl *wl = dev->wl; 2923 unsigned long flags; 2924 int queue_num; 2925 2926 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) 2927 return; 2928 2929 /* Disable and sync interrupts. We must do this before than 2930 * setting the status to INITIALIZED, as the interrupt handler 2931 * won't care about IRQs then. */ 2932 spin_lock_irqsave(&wl->irq_lock, flags); 2933 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); 2934 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */ 2935 spin_unlock_irqrestore(&wl->irq_lock, flags); 2936 b43legacy_synchronize_irq(dev); 2937 2938 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); 2939 2940 mutex_unlock(&wl->mutex); 2941 /* Must unlock as it would otherwise deadlock. No races here. 2942 * Cancel the possibly running self-rearming periodic work. */ 2943 cancel_delayed_work_sync(&dev->periodic_work); 2944 cancel_work_sync(&wl->tx_work); 2945 mutex_lock(&wl->mutex); 2946 2947 /* Drain all TX queues. */ 2948 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) { 2949 while (skb_queue_len(&wl->tx_queue[queue_num])) 2950 dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num])); 2951 } 2952 2953b43legacy_mac_suspend(dev); 2954 free_irq(dev->dev->irq, dev); 2955 b43legacydbg(wl, "Wireless interface stopped\n"); 2956} 2957 2958/* Locking: wl->mutex */ 2959static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev) 2960{ 2961 int err; 2962 2963 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED); 2964 2965 drain_txstatus_queue(dev); 2966 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler, 2967 IRQF_SHARED, KBUILD_MODNAME, dev); 2968 if (err) { 2969 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n", 2970 dev->dev->irq); 2971 goto out; 2972 } 2973 /* We are ready to run. */ 2974 ieee80211_wake_queues(dev->wl->hw); 2975 b43legacy_set_status(dev, B43legacy_STAT_STARTED); 2976 2977 /* Start data flow (TX/RX) */ 2978 b43legacy_mac_enable(dev); 2979 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); 2980 2981 /* Start maintenance work */ 2982 b43legacy_periodic_tasks_setup(dev); 2983 2984 b43legacydbg(dev->wl, "Wireless interface started\n"); 2985out: 2986 return err; 2987} 2988 2989/* Get PHY and RADIO versioning numbers */ 2990static int b43legacy_phy_versioning(struct b43legacy_wldev *dev) 2991{ 2992 struct b43legacy_phy *phy = &dev->phy; 2993 u32 tmp; 2994 u8 analog_type; 2995 u8 phy_type; 2996 u8 phy_rev; 2997 u16 radio_manuf; 2998 u16 radio_ver; 2999 u16 radio_rev; 3000 int unsupported = 0; 3001 3002 /* Get PHY versioning */ 3003 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER); 3004 analog_type = (tmp & B43legacy_PHYVER_ANALOG) 3005 >> B43legacy_PHYVER_ANALOG_SHIFT; 3006 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT; 3007 phy_rev = (tmp & B43legacy_PHYVER_VERSION); 3008 switch (phy_type) { 3009 case B43legacy_PHYTYPE_B: 3010 if (phy_rev != 2 && phy_rev != 4 3011 && phy_rev != 6 && phy_rev != 7) 3012 unsupported = 1; 3013 break; 3014 case B43legacy_PHYTYPE_G: 3015 if (phy_rev > 8) 3016 unsupported = 1; 3017 break; 3018 default: 3019 unsupported = 1; 3020 } 3021 if (unsupported) { 3022 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY " 3023 "(Analog %u, Type %u, Revision %u)\n", 3024 analog_type, phy_type, phy_rev); 3025 return -EOPNOTSUPP; 3026 } 3027 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n", 3028 analog_type, phy_type, phy_rev); 3029 3030 3031 /* Get RADIO versioning */ 3032 if (dev->dev->bus->chip_id == 0x4317) { 3033 if (dev->dev->bus->chip_rev == 0) 3034 tmp = 0x3205017F; 3035 else if (dev->dev->bus->chip_rev == 1) 3036 tmp = 0x4205017F; 3037 else 3038 tmp = 0x5205017F; 3039 } else { 3040 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, 3041 B43legacy_RADIOCTL_ID); 3042 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH); 3043 tmp <<= 16; 3044 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, 3045 B43legacy_RADIOCTL_ID); 3046 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW); 3047 } 3048 radio_manuf = (tmp & 0x00000FFF); 3049 radio_ver = (tmp & 0x0FFFF000) >> 12; 3050 radio_rev = (tmp & 0xF0000000) >> 28; 3051 switch (phy_type) { 3052 case B43legacy_PHYTYPE_B: 3053 if ((radio_ver & 0xFFF0) != 0x2050) 3054 unsupported = 1; 3055 break; 3056 case B43legacy_PHYTYPE_G: 3057 if (radio_ver != 0x2050) 3058 unsupported = 1; 3059 break; 3060 default: 3061 B43legacy_BUG_ON(1); 3062 } 3063 if (unsupported) { 3064 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO " 3065 "(Manuf 0x%X, Version 0x%X, Revision %u)\n", 3066 radio_manuf, radio_ver, radio_rev); 3067 return -EOPNOTSUPP; 3068 } 3069 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X," 3070 " Revision %u\n", radio_manuf, radio_ver, radio_rev); 3071 3072 3073 phy->radio_manuf = radio_manuf; 3074 phy->radio_ver = radio_ver; 3075 phy->radio_rev = radio_rev; 3076 3077 phy->analog = analog_type; 3078 phy->type = phy_type; 3079 phy->rev = phy_rev; 3080 3081 return 0; 3082} 3083 3084static void setup_struct_phy_for_init(struct b43legacy_wldev *dev, 3085 struct b43legacy_phy *phy) 3086{ 3087 struct b43legacy_lopair *lo; 3088 int i; 3089 3090 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig)); 3091 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos)); 3092 3093 /* Assume the radio is enabled. If it's not enabled, the state will 3094 * immediately get fixed on the first periodic work run. */ 3095 dev->radio_hw_enable = true; 3096 3097 phy->savedpctlreg = 0xFFFF; 3098 phy->aci_enable = false; 3099 phy->aci_wlan_automatic = false; 3100 phy->aci_hw_rssi = false; 3101 3102 lo = phy->_lo_pairs; 3103 if (lo) 3104 memset(lo, 0, sizeof(struct b43legacy_lopair) * 3105 B43legacy_LO_COUNT); 3106 phy->max_lb_gain = 0; 3107 phy->trsw_rx_gain = 0; 3108 3109 /* Set default attenuation values. */ 3110 phy->bbatt = b43legacy_default_baseband_attenuation(dev); 3111 phy->rfatt = b43legacy_default_radio_attenuation(dev); 3112 phy->txctl1 = b43legacy_default_txctl1(dev); 3113 phy->txpwr_offset = 0; 3114 3115 /* NRSSI */ 3116 phy->nrssislope = 0; 3117 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++) 3118 phy->nrssi[i] = -1000; 3119 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++) 3120 phy->nrssi_lt[i] = i; 3121 3122 phy->lofcal = 0xFFFF; 3123 phy->initval = 0xFFFF; 3124 3125 phy->interfmode = B43legacy_INTERFMODE_NONE; 3126 phy->channel = 0xFF; 3127} 3128 3129static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev) 3130{ 3131 /* Flags */ 3132 dev->dfq_valid = false; 3133 3134 /* Stats */ 3135 memset(&dev->stats, 0, sizeof(dev->stats)); 3136 3137 setup_struct_phy_for_init(dev, &dev->phy); 3138 3139 /* IRQ related flags */ 3140 dev->irq_reason = 0; 3141 memset(dev->dma_reason, 0, sizeof(dev->dma_reason)); 3142 dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE; 3143 3144 dev->mac_suspended = 1; 3145 3146 /* Noise calculation context */ 3147 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc)); 3148} 3149 3150static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev, 3151 bool idle) { 3152 u16 pu_delay = 1050; 3153 3154 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle) 3155 pu_delay = 500; 3156 if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8)) 3157 pu_delay = max(pu_delay, (u16)2400); 3158 3159 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3160 B43legacy_SHM_SH_SPUWKUP, pu_delay); 3161} 3162 3163/* Set the TSF CFP pre-TargetBeaconTransmissionTime. */ 3164static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev) 3165{ 3166 u16 pretbtt; 3167 3168 /* The time value is in microseconds. */ 3169 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) 3170 pretbtt = 2; 3171 else 3172 pretbtt = 250; 3173 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3174 B43legacy_SHM_SH_PRETBTT, pretbtt); 3175 b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt); 3176} 3177 3178/* Shutdown a wireless core */ 3179/* Locking: wl->mutex */ 3180static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev) 3181{ 3182 struct b43legacy_phy *phy = &dev->phy; 3183 u32 macctl; 3184 3185 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED); 3186 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED) 3187 return; 3188 b43legacy_set_status(dev, B43legacy_STAT_UNINIT); 3189 3190 /* Stop the microcode PSM. */ 3191 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 3192 macctl &= ~B43legacy_MACCTL_PSM_RUN; 3193 macctl |= B43legacy_MACCTL_PSM_JMP0; 3194 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 3195 3196 b43legacy_leds_exit(dev); 3197 b43legacy_rng_exit(dev->wl); 3198 b43legacy_pio_free(dev); 3199 b43legacy_dma_free(dev); 3200 b43legacy_chip_exit(dev); 3201 b43legacy_radio_turn_off(dev, 1); 3202 b43legacy_switch_analog(dev, 0); 3203 if (phy->dyn_tssi_tbl) 3204 kfree(phy->tssi2dbm); 3205 kfree(phy->lo_control); 3206 phy->lo_control = NULL; 3207 if (dev->wl->current_beacon) { 3208 dev_kfree_skb_any(dev->wl->current_beacon); 3209 dev->wl->current_beacon = NULL; 3210 } 3211 3212 ssb_device_disable(dev->dev, 0); 3213 ssb_bus_may_powerdown(dev->dev->bus); 3214} 3215 3216static void prepare_phy_data_for_init(struct b43legacy_wldev *dev) 3217{ 3218 struct b43legacy_phy *phy = &dev->phy; 3219 int i; 3220 3221 /* Set default attenuation values. */ 3222 phy->bbatt = b43legacy_default_baseband_attenuation(dev); 3223 phy->rfatt = b43legacy_default_radio_attenuation(dev); 3224 phy->txctl1 = b43legacy_default_txctl1(dev); 3225 phy->txctl2 = 0xFFFF; 3226 phy->txpwr_offset = 0; 3227 3228 /* NRSSI */ 3229 phy->nrssislope = 0; 3230 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++) 3231 phy->nrssi[i] = -1000; 3232 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++) 3233 phy->nrssi_lt[i] = i; 3234 3235 phy->lofcal = 0xFFFF; 3236 phy->initval = 0xFFFF; 3237 3238 phy->aci_enable = false; 3239 phy->aci_wlan_automatic = false; 3240 phy->aci_hw_rssi = false; 3241 3242 phy->antenna_diversity = 0xFFFF; 3243 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig)); 3244 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos)); 3245 3246 /* Flags */ 3247 phy->calibrated = 0; 3248 3249 if (phy->_lo_pairs) 3250 memset(phy->_lo_pairs, 0, 3251 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT); 3252 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain)); 3253} 3254 3255/* Initialize a wireless core */ 3256static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev) 3257{ 3258 struct b43legacy_wl *wl = dev->wl; 3259 struct ssb_bus *bus = dev->dev->bus; 3260 struct b43legacy_phy *phy = &dev->phy; 3261 struct ssb_sprom *sprom = &dev->dev->bus->sprom; 3262 int err; 3263 u32 hf; 3264 u32 tmp; 3265 3266 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT); 3267 3268 err = ssb_bus_powerup(bus, 0); 3269 if (err) 3270 goto out; 3271 if (!ssb_device_is_enabled(dev->dev)) { 3272 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0; 3273 b43legacy_wireless_core_reset(dev, tmp); 3274 } 3275 3276 if ((phy->type == B43legacy_PHYTYPE_B) || 3277 (phy->type == B43legacy_PHYTYPE_G)) { 3278 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair) 3279 * B43legacy_LO_COUNT, 3280 GFP_KERNEL); 3281 if (!phy->_lo_pairs) 3282 return -ENOMEM; 3283 } 3284 setup_struct_wldev_for_init(dev); 3285 3286 err = b43legacy_phy_init_tssi2dbm_table(dev); 3287 if (err) 3288 goto err_kfree_lo_control; 3289 3290 /* Enable IRQ routing to this device. */ 3291 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev); 3292 3293 prepare_phy_data_for_init(dev); 3294 b43legacy_phy_calibrate(dev); 3295 err = b43legacy_chip_init(dev); 3296 if (err) 3297 goto err_kfree_tssitbl; 3298 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3299 B43legacy_SHM_SH_WLCOREREV, 3300 dev->dev->id.revision); 3301 hf = b43legacy_hf_read(dev); 3302 if (phy->type == B43legacy_PHYTYPE_G) { 3303 hf |= B43legacy_HF_SYMW; 3304 if (phy->rev == 1) 3305 hf |= B43legacy_HF_GDCW; 3306 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL) 3307 hf |= B43legacy_HF_OFDMPABOOST; 3308 } else if (phy->type == B43legacy_PHYTYPE_B) { 3309 hf |= B43legacy_HF_SYMW; 3310 if (phy->rev >= 2 && phy->radio_ver == 0x2050) 3311 hf &= ~B43legacy_HF_GDCW; 3312 } 3313 b43legacy_hf_write(dev, hf); 3314 3315 b43legacy_set_retry_limits(dev, 3316 B43legacy_DEFAULT_SHORT_RETRY_LIMIT, 3317 B43legacy_DEFAULT_LONG_RETRY_LIMIT); 3318 3319 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3320 0x0044, 3); 3321 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3322 0x0046, 2); 3323 3324 /* Disable sending probe responses from firmware. 3325 * Setting the MaxTime to one usec will always trigger 3326 * a timeout, so we never send any probe resp. 3327 * A timeout of zero is infinite. */ 3328 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3329 B43legacy_SHM_SH_PRMAXTIME, 1); 3330 3331 b43legacy_rate_memory_init(dev); 3332 3333 /* Minimum Contention Window */ 3334 if (phy->type == B43legacy_PHYTYPE_B) 3335 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 3336 0x0003, 31); 3337 else 3338 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 3339 0x0003, 15); 3340 /* Maximum Contention Window */ 3341 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 3342 0x0004, 1023); 3343 3344 do { 3345 if (b43legacy_using_pio(dev)) 3346 err = b43legacy_pio_init(dev); 3347 else { 3348 err = b43legacy_dma_init(dev); 3349 if (!err) 3350 b43legacy_qos_init(dev); 3351 } 3352 } while (err == -EAGAIN); 3353 if (err) 3354 goto err_chip_exit; 3355 3356 b43legacy_set_synth_pu_delay(dev, 1); 3357 3358 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */ 3359 b43legacy_upload_card_macaddress(dev); 3360 b43legacy_security_init(dev); 3361 b43legacy_rng_init(wl); 3362 3363 ieee80211_wake_queues(dev->wl->hw); 3364 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); 3365 3366 b43legacy_leds_init(dev); 3367out: 3368 return err; 3369 3370err_chip_exit: 3371 b43legacy_chip_exit(dev); 3372err_kfree_tssitbl: 3373 if (phy->dyn_tssi_tbl) 3374 kfree(phy->tssi2dbm); 3375err_kfree_lo_control: 3376 kfree(phy->lo_control); 3377 phy->lo_control = NULL; 3378 ssb_bus_may_powerdown(bus); 3379 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT); 3380 return err; 3381} 3382 3383static int b43legacy_op_add_interface(struct ieee80211_hw *hw, 3384 struct ieee80211_vif *vif) 3385{ 3386 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3387 struct b43legacy_wldev *dev; 3388 unsigned long flags; 3389 int err = -EOPNOTSUPP; 3390 3391 /* TODO: allow WDS/AP devices to coexist */ 3392 3393 if (vif->type != NL80211_IFTYPE_AP && 3394 vif->type != NL80211_IFTYPE_STATION && 3395 vif->type != NL80211_IFTYPE_WDS && 3396 vif->type != NL80211_IFTYPE_ADHOC) 3397 return -EOPNOTSUPP; 3398 3399 mutex_lock(&wl->mutex); 3400 if (wl->operating) 3401 goto out_mutex_unlock; 3402 3403 b43legacydbg(wl, "Adding Interface type %d\n", vif->type); 3404 3405 dev = wl->current_dev; 3406 wl->operating = true; 3407 wl->vif = vif; 3408 wl->if_type = vif->type; 3409 memcpy(wl->mac_addr, vif->addr, ETH_ALEN); 3410 3411 spin_lock_irqsave(&wl->irq_lock, flags); 3412 b43legacy_adjust_opmode(dev); 3413 b43legacy_set_pretbtt(dev); 3414 b43legacy_set_synth_pu_delay(dev, 0); 3415 b43legacy_upload_card_macaddress(dev); 3416 spin_unlock_irqrestore(&wl->irq_lock, flags); 3417 3418 err = 0; 3419 out_mutex_unlock: 3420 mutex_unlock(&wl->mutex); 3421 3422 return err; 3423} 3424 3425static void b43legacy_op_remove_interface(struct ieee80211_hw *hw, 3426 struct ieee80211_vif *vif) 3427{ 3428 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3429 struct b43legacy_wldev *dev = wl->current_dev; 3430 unsigned long flags; 3431 3432 b43legacydbg(wl, "Removing Interface type %d\n", vif->type); 3433 3434 mutex_lock(&wl->mutex); 3435 3436 B43legacy_WARN_ON(!wl->operating); 3437 B43legacy_WARN_ON(wl->vif != vif); 3438 wl->vif = NULL; 3439 3440 wl->operating = false; 3441 3442 spin_lock_irqsave(&wl->irq_lock, flags); 3443 b43legacy_adjust_opmode(dev); 3444 memset(wl->mac_addr, 0, ETH_ALEN); 3445 b43legacy_upload_card_macaddress(dev); 3446 spin_unlock_irqrestore(&wl->irq_lock, flags); 3447 3448 mutex_unlock(&wl->mutex); 3449} 3450 3451static int b43legacy_op_start(struct ieee80211_hw *hw) 3452{ 3453 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3454 struct b43legacy_wldev *dev = wl->current_dev; 3455 int did_init = 0; 3456 int err = 0; 3457 3458 /* Kill all old instance specific information to make sure 3459 * the card won't use it in the short timeframe between start 3460 * and mac80211 reconfiguring it. */ 3461 memset(wl->bssid, 0, ETH_ALEN); 3462 memset(wl->mac_addr, 0, ETH_ALEN); 3463 wl->filter_flags = 0; 3464 wl->beacon0_uploaded = false; 3465 wl->beacon1_uploaded = false; 3466 wl->beacon_templates_virgin = true; 3467 wl->radio_enabled = true; 3468 3469 mutex_lock(&wl->mutex); 3470 3471 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) { 3472 err = b43legacy_wireless_core_init(dev); 3473 if (err) 3474 goto out_mutex_unlock; 3475 did_init = 1; 3476 } 3477 3478 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { 3479 err = b43legacy_wireless_core_start(dev); 3480 if (err) { 3481 if (did_init) 3482 b43legacy_wireless_core_exit(dev); 3483 goto out_mutex_unlock; 3484 } 3485 } 3486 3487 wiphy_rfkill_start_polling(hw->wiphy); 3488 3489out_mutex_unlock: 3490 mutex_unlock(&wl->mutex); 3491 3492 return err; 3493} 3494 3495static void b43legacy_op_stop(struct ieee80211_hw *hw) 3496{ 3497 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3498 struct b43legacy_wldev *dev = wl->current_dev; 3499 3500 cancel_work_sync(&(wl->beacon_update_trigger)); 3501 3502 mutex_lock(&wl->mutex); 3503 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED) 3504 b43legacy_wireless_core_stop(dev); 3505 b43legacy_wireless_core_exit(dev); 3506 wl->radio_enabled = false; 3507 mutex_unlock(&wl->mutex); 3508} 3509 3510static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw, 3511 struct ieee80211_sta *sta, bool set) 3512{ 3513 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3514 unsigned long flags; 3515 3516 spin_lock_irqsave(&wl->irq_lock, flags); 3517 b43legacy_update_templates(wl); 3518 spin_unlock_irqrestore(&wl->irq_lock, flags); 3519 3520 return 0; 3521} 3522 3523static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx, 3524 struct survey_info *survey) 3525{ 3526 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3527 struct b43legacy_wldev *dev = wl->current_dev; 3528 struct ieee80211_conf *conf = &hw->conf; 3529 3530 if (idx != 0) 3531 return -ENOENT; 3532 3533 survey->channel = conf->channel; 3534 survey->filled = SURVEY_INFO_NOISE_DBM; 3535 survey->noise = dev->stats.link_noise; 3536 3537 return 0; 3538} 3539 3540static const struct ieee80211_ops b43legacy_hw_ops = { 3541 .tx = b43legacy_op_tx, 3542 .conf_tx = b43legacy_op_conf_tx, 3543 .add_interface = b43legacy_op_add_interface, 3544 .remove_interface = b43legacy_op_remove_interface, 3545 .config = b43legacy_op_dev_config, 3546 .bss_info_changed = b43legacy_op_bss_info_changed, 3547 .configure_filter = b43legacy_op_configure_filter, 3548 .get_stats = b43legacy_op_get_stats, 3549 .start = b43legacy_op_start, 3550 .stop = b43legacy_op_stop, 3551 .set_tim = b43legacy_op_beacon_set_tim, 3552 .get_survey = b43legacy_op_get_survey, 3553 .rfkill_poll = b43legacy_rfkill_poll, 3554}; 3555 3556/* Hard-reset the chip. Do not call this directly. 3557 * Use b43legacy_controller_restart() 3558 */ 3559static void b43legacy_chip_reset(struct work_struct *work) 3560{ 3561 struct b43legacy_wldev *dev = 3562 container_of(work, struct b43legacy_wldev, restart_work); 3563 struct b43legacy_wl *wl = dev->wl; 3564 int err = 0; 3565 int prev_status; 3566 3567 mutex_lock(&wl->mutex); 3568 3569 prev_status = b43legacy_status(dev); 3570 /* Bring the device down... */ 3571 if (prev_status >= B43legacy_STAT_STARTED) 3572 b43legacy_wireless_core_stop(dev); 3573 if (prev_status >= B43legacy_STAT_INITIALIZED) 3574 b43legacy_wireless_core_exit(dev); 3575 3576 /* ...and up again. */ 3577 if (prev_status >= B43legacy_STAT_INITIALIZED) { 3578 err = b43legacy_wireless_core_init(dev); 3579 if (err) 3580 goto out; 3581 } 3582 if (prev_status >= B43legacy_STAT_STARTED) { 3583 err = b43legacy_wireless_core_start(dev); 3584 if (err) { 3585 b43legacy_wireless_core_exit(dev); 3586 goto out; 3587 } 3588 } 3589out: 3590 if (err) 3591 wl->current_dev = NULL; /* Failed to init the dev. */ 3592 mutex_unlock(&wl->mutex); 3593 if (err) 3594 b43legacyerr(wl, "Controller restart FAILED\n"); 3595 else 3596 b43legacyinfo(wl, "Controller restarted\n"); 3597} 3598 3599static int b43legacy_setup_modes(struct b43legacy_wldev *dev, 3600 int have_bphy, 3601 int have_gphy) 3602{ 3603 struct ieee80211_hw *hw = dev->wl->hw; 3604 struct b43legacy_phy *phy = &dev->phy; 3605 3606 phy->possible_phymodes = 0; 3607 if (have_bphy) { 3608 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 3609 &b43legacy_band_2GHz_BPHY; 3610 phy->possible_phymodes |= B43legacy_PHYMODE_B; 3611 } 3612 3613 if (have_gphy) { 3614 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 3615 &b43legacy_band_2GHz_GPHY; 3616 phy->possible_phymodes |= B43legacy_PHYMODE_G; 3617 } 3618 3619 return 0; 3620} 3621 3622static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev) 3623{ 3624 /* We release firmware that late to not be required to re-request 3625 * is all the time when we reinit the core. */ 3626 b43legacy_release_firmware(dev); 3627} 3628 3629static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev) 3630{ 3631 struct b43legacy_wl *wl = dev->wl; 3632 struct ssb_bus *bus = dev->dev->bus; 3633 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL; 3634 int err; 3635 int have_bphy = 0; 3636 int have_gphy = 0; 3637 u32 tmp; 3638 3639 /* Do NOT do any device initialization here. 3640 * Do it in wireless_core_init() instead. 3641 * This function is for gathering basic information about the HW, only. 3642 * Also some structs may be set up here. But most likely you want to 3643 * have that in core_init(), too. 3644 */ 3645 3646 err = ssb_bus_powerup(bus, 0); 3647 if (err) { 3648 b43legacyerr(wl, "Bus powerup failed\n"); 3649 goto out; 3650 } 3651 /* Get the PHY type. */ 3652 if (dev->dev->id.revision >= 5) { 3653 u32 tmshigh; 3654 3655 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH); 3656 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY); 3657 if (!have_gphy) 3658 have_bphy = 1; 3659 } else if (dev->dev->id.revision == 4) 3660 have_gphy = 1; 3661 else 3662 have_bphy = 1; 3663 3664 dev->phy.gmode = (have_gphy || have_bphy); 3665 dev->phy.radio_on = true; 3666 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0; 3667 b43legacy_wireless_core_reset(dev, tmp); 3668 3669 err = b43legacy_phy_versioning(dev); 3670 if (err) 3671 goto err_powerdown; 3672 /* Check if this device supports multiband. */ 3673 if (!pdev || 3674 (pdev->device != 0x4312 && 3675 pdev->device != 0x4319 && 3676 pdev->device != 0x4324)) { 3677 /* No multiband support. */ 3678 have_bphy = 0; 3679 have_gphy = 0; 3680 switch (dev->phy.type) { 3681 case B43legacy_PHYTYPE_B: 3682 have_bphy = 1; 3683 break; 3684 case B43legacy_PHYTYPE_G: 3685 have_gphy = 1; 3686 break; 3687 default: 3688 B43legacy_BUG_ON(1); 3689 } 3690 } 3691 dev->phy.gmode = (have_gphy || have_bphy); 3692 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0; 3693 b43legacy_wireless_core_reset(dev, tmp); 3694 3695 err = b43legacy_validate_chipaccess(dev); 3696 if (err) 3697 goto err_powerdown; 3698 err = b43legacy_setup_modes(dev, have_bphy, have_gphy); 3699 if (err) 3700 goto err_powerdown; 3701 3702 /* Now set some default "current_dev" */ 3703 if (!wl->current_dev) 3704 wl->current_dev = dev; 3705 INIT_WORK(&dev->restart_work, b43legacy_chip_reset); 3706 3707 b43legacy_radio_turn_off(dev, 1); 3708 b43legacy_switch_analog(dev, 0); 3709 ssb_device_disable(dev->dev, 0); 3710 ssb_bus_may_powerdown(bus); 3711 3712out: 3713 return err; 3714 3715err_powerdown: 3716 ssb_bus_may_powerdown(bus); 3717 return err; 3718} 3719 3720static void b43legacy_one_core_detach(struct ssb_device *dev) 3721{ 3722 struct b43legacy_wldev *wldev; 3723 struct b43legacy_wl *wl; 3724 3725 /* Do not cancel ieee80211-workqueue based work here. 3726 * See comment in b43legacy_remove(). */ 3727 3728 wldev = ssb_get_drvdata(dev); 3729 wl = wldev->wl; 3730 b43legacy_debugfs_remove_device(wldev); 3731 b43legacy_wireless_core_detach(wldev); 3732 list_del(&wldev->list); 3733 wl->nr_devs--; 3734 ssb_set_drvdata(dev, NULL); 3735 kfree(wldev); 3736} 3737 3738static int b43legacy_one_core_attach(struct ssb_device *dev, 3739 struct b43legacy_wl *wl) 3740{ 3741 struct b43legacy_wldev *wldev; 3742 int err = -ENOMEM; 3743 3744 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL); 3745 if (!wldev) 3746 goto out; 3747 3748 wldev->dev = dev; 3749 wldev->wl = wl; 3750 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT); 3751 wldev->bad_frames_preempt = modparam_bad_frames_preempt; 3752 tasklet_init(&wldev->isr_tasklet, 3753 (void (*)(unsigned long))b43legacy_interrupt_tasklet, 3754 (unsigned long)wldev); 3755 if (modparam_pio) 3756 wldev->__using_pio = true; 3757 INIT_LIST_HEAD(&wldev->list); 3758 3759 err = b43legacy_wireless_core_attach(wldev); 3760 if (err) 3761 goto err_kfree_wldev; 3762 3763 list_add(&wldev->list, &wl->devlist); 3764 wl->nr_devs++; 3765 ssb_set_drvdata(dev, wldev); 3766 b43legacy_debugfs_add_device(wldev); 3767out: 3768 return err; 3769 3770err_kfree_wldev: 3771 kfree(wldev); 3772 return err; 3773} 3774 3775static void b43legacy_sprom_fixup(struct ssb_bus *bus) 3776{ 3777 /* boardflags workarounds */ 3778 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE && 3779 bus->boardinfo.type == 0x4E && 3780 bus->boardinfo.rev > 0x40) 3781 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL; 3782} 3783 3784static void b43legacy_wireless_exit(struct ssb_device *dev, 3785 struct b43legacy_wl *wl) 3786{ 3787 struct ieee80211_hw *hw = wl->hw; 3788 3789 ssb_set_devtypedata(dev, NULL); 3790 ieee80211_free_hw(hw); 3791} 3792 3793static int b43legacy_wireless_init(struct ssb_device *dev) 3794{ 3795 struct ssb_sprom *sprom = &dev->bus->sprom; 3796 struct ieee80211_hw *hw; 3797 struct b43legacy_wl *wl; 3798 int err = -ENOMEM; 3799 int queue_num; 3800 3801 b43legacy_sprom_fixup(dev->bus); 3802 3803 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops); 3804 if (!hw) { 3805 b43legacyerr(NULL, "Could not allocate ieee80211 device\n"); 3806 goto out; 3807 } 3808 3809 /* fill hw info */ 3810 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | 3811 IEEE80211_HW_SIGNAL_DBM; 3812 hw->wiphy->interface_modes = 3813 BIT(NL80211_IFTYPE_AP) | 3814 BIT(NL80211_IFTYPE_STATION) | 3815 BIT(NL80211_IFTYPE_WDS) | 3816 BIT(NL80211_IFTYPE_ADHOC); 3817 hw->queues = 1; /* FIXME: hardware has more queues */ 3818 hw->max_rates = 2; 3819 SET_IEEE80211_DEV(hw, dev->dev); 3820 if (is_valid_ether_addr(sprom->et1mac)) 3821 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac); 3822 else 3823 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac); 3824 3825 /* Get and initialize struct b43legacy_wl */ 3826 wl = hw_to_b43legacy_wl(hw); 3827 memset(wl, 0, sizeof(*wl)); 3828 wl->hw = hw; 3829 spin_lock_init(&wl->irq_lock); 3830 spin_lock_init(&wl->leds_lock); 3831 mutex_init(&wl->mutex); 3832 INIT_LIST_HEAD(&wl->devlist); 3833 INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work); 3834 INIT_WORK(&wl->tx_work, b43legacy_tx_work); 3835 3836 /* Initialize queues and flags. */ 3837 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) { 3838 skb_queue_head_init(&wl->tx_queue[queue_num]); 3839 wl->tx_queue_stopped[queue_num] = 0; 3840 } 3841 3842 ssb_set_devtypedata(dev, wl); 3843 b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n", 3844 dev->bus->chip_id, dev->id.revision); 3845 err = 0; 3846out: 3847 return err; 3848} 3849 3850static int b43legacy_probe(struct ssb_device *dev, 3851 const struct ssb_device_id *id) 3852{ 3853 struct b43legacy_wl *wl; 3854 int err; 3855 int first = 0; 3856 3857 wl = ssb_get_devtypedata(dev); 3858 if (!wl) { 3859 /* Probing the first core - setup common struct b43legacy_wl */ 3860 first = 1; 3861 err = b43legacy_wireless_init(dev); 3862 if (err) 3863 goto out; 3864 wl = ssb_get_devtypedata(dev); 3865 B43legacy_WARN_ON(!wl); 3866 } 3867 err = b43legacy_one_core_attach(dev, wl); 3868 if (err) 3869 goto err_wireless_exit; 3870 3871 /* setup and start work to load firmware */ 3872 INIT_WORK(&wl->firmware_load, b43legacy_request_firmware); 3873 schedule_work(&wl->firmware_load); 3874 3875out: 3876 return err; 3877 3878err_wireless_exit: 3879 if (first) 3880 b43legacy_wireless_exit(dev, wl); 3881 return err; 3882} 3883 3884static void b43legacy_remove(struct ssb_device *dev) 3885{ 3886 struct b43legacy_wl *wl = ssb_get_devtypedata(dev); 3887 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); 3888 3889 /* We must cancel any work here before unregistering from ieee80211, 3890 * as the ieee80211 unreg will destroy the workqueue. */ 3891 cancel_work_sync(&wldev->restart_work); 3892 cancel_work_sync(&wl->firmware_load); 3893 3894 B43legacy_WARN_ON(!wl); 3895 if (wl->current_dev == wldev) 3896 ieee80211_unregister_hw(wl->hw); 3897 3898 b43legacy_one_core_detach(dev); 3899 3900 if (list_empty(&wl->devlist)) 3901 /* Last core on the chip unregistered. 3902 * We can destroy common struct b43legacy_wl. 3903 */ 3904 b43legacy_wireless_exit(dev, wl); 3905} 3906 3907/* Perform a hardware reset. This can be called from any context. */ 3908void b43legacy_controller_restart(struct b43legacy_wldev *dev, 3909 const char *reason) 3910{ 3911 /* Must avoid requeueing, if we are in shutdown. */ 3912 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) 3913 return; 3914 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason); 3915 ieee80211_queue_work(dev->wl->hw, &dev->restart_work); 3916} 3917 3918#ifdef CONFIG_PM 3919 3920static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state) 3921{ 3922 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); 3923 struct b43legacy_wl *wl = wldev->wl; 3924 3925 b43legacydbg(wl, "Suspending...\n"); 3926 3927 mutex_lock(&wl->mutex); 3928 wldev->suspend_init_status = b43legacy_status(wldev); 3929 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) 3930 b43legacy_wireless_core_stop(wldev); 3931 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) 3932 b43legacy_wireless_core_exit(wldev); 3933 mutex_unlock(&wl->mutex); 3934 3935 b43legacydbg(wl, "Device suspended.\n"); 3936 3937 return 0; 3938} 3939 3940static int b43legacy_resume(struct ssb_device *dev) 3941{ 3942 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); 3943 struct b43legacy_wl *wl = wldev->wl; 3944 int err = 0; 3945 3946 b43legacydbg(wl, "Resuming...\n"); 3947 3948 mutex_lock(&wl->mutex); 3949 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) { 3950 err = b43legacy_wireless_core_init(wldev); 3951 if (err) { 3952 b43legacyerr(wl, "Resume failed at core init\n"); 3953 goto out; 3954 } 3955 } 3956 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) { 3957 err = b43legacy_wireless_core_start(wldev); 3958 if (err) { 3959 b43legacy_wireless_core_exit(wldev); 3960 b43legacyerr(wl, "Resume failed at core start\n"); 3961 goto out; 3962 } 3963 } 3964 3965 b43legacydbg(wl, "Device resumed.\n"); 3966out: 3967 mutex_unlock(&wl->mutex); 3968 return err; 3969} 3970 3971#else /* CONFIG_PM */ 3972# define b43legacy_suspend NULL 3973# define b43legacy_resume NULL 3974#endif /* CONFIG_PM */ 3975 3976static struct ssb_driver b43legacy_ssb_driver = { 3977 .name = KBUILD_MODNAME, 3978 .id_table = b43legacy_ssb_tbl, 3979 .probe = b43legacy_probe, 3980 .remove = b43legacy_remove, 3981 .suspend = b43legacy_suspend, 3982 .resume = b43legacy_resume, 3983}; 3984 3985static void b43legacy_print_driverinfo(void) 3986{ 3987 const char *feat_pci = "", *feat_leds = "", 3988 *feat_pio = "", *feat_dma = ""; 3989 3990#ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT 3991 feat_pci = "P"; 3992#endif 3993#ifdef CONFIG_B43LEGACY_LEDS 3994 feat_leds = "L"; 3995#endif 3996#ifdef CONFIG_B43LEGACY_PIO 3997 feat_pio = "I"; 3998#endif 3999#ifdef CONFIG_B43LEGACY_DMA 4000 feat_dma = "D"; 4001#endif 4002 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded " 4003 "[ Features: %s%s%s%s ]\n", 4004 feat_pci, feat_leds, feat_pio, feat_dma); 4005} 4006 4007static int __init b43legacy_init(void) 4008{ 4009 int err; 4010 4011 b43legacy_debugfs_init(); 4012 4013 err = ssb_driver_register(&b43legacy_ssb_driver); 4014 if (err) 4015 goto err_dfs_exit; 4016 4017 b43legacy_print_driverinfo(); 4018 4019 return err; 4020 4021err_dfs_exit: 4022 b43legacy_debugfs_exit(); 4023 return err; 4024} 4025 4026static void __exit b43legacy_exit(void) 4027{ 4028 ssb_driver_unregister(&b43legacy_ssb_driver); 4029 b43legacy_debugfs_exit(); 4030} 4031 4032module_init(b43legacy_init) 4033module_exit(b43legacy_exit) 4034