1/* 2 * Misc utility routines for accessing PMU corerev specific features 3 * of the SiliconBackplane-based Broadcom chips. 4 * 5 * Copyright (C) 1999-2012, Broadcom Corporation 6 * 7 * Unless you and Broadcom execute a separate written software license 8 * agreement governing use of this software, this software is licensed to you 9 * under the terms of the GNU General Public License version 2 (the "GPL"), 10 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 11 * following added to such license: 12 * 13 * As a special exception, the copyright holders of this software give you 14 * permission to link this software with independent modules, and to copy and 15 * distribute the resulting executable under terms of your choice, provided that 16 * you also meet, for each linked independent module, the terms and conditions of 17 * the license of that module. An independent module is a module which is not 18 * derived from this software. The special exception does not apply to any 19 * modifications of the software. 20 * 21 * Notwithstanding the above, under no circumstances may you combine this 22 * software in any way with any other Broadcom software provided under a license 23 * other than the GPL, without Broadcom's express prior written consent. 24 * 25 * $Id: hndpmu.c 354194 2012-08-30 08:39:03Z $ 26 */ 27 28#include <bcm_cfg.h> 29#include <typedefs.h> 30#include <bcmdefs.h> 31#include <osl.h> 32#include <bcmutils.h> 33#include <siutils.h> 34#include <bcmdevs.h> 35#include <hndsoc.h> 36#include <sbchipc.h> 37#include <hndpmu.h> 38 39#define PMU_ERROR(args) 40 41#define PMU_MSG(args) 42 43/* To check in verbose debugging messages not intended 44 * to be on except on private builds. 45 */ 46#define PMU_NONE(args) 47 48 49/* SDIO Pad drive strength to select value mappings. 50 * The last strength value in each table must be 0 (the tri-state value). 51 */ 52typedef struct { 53 uint8 strength; /* Pad Drive Strength in mA */ 54 uint8 sel; /* Chip-specific select value */ 55} sdiod_drive_str_t; 56 57/* SDIO Drive Strength to sel value table for PMU Rev 1 */ 58static const sdiod_drive_str_t sdiod_drive_strength_tab1[] = { 59 {4, 0x2}, 60 {2, 0x3}, 61 {1, 0x0}, 62 {0, 0x0} }; 63 64/* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */ 65static const sdiod_drive_str_t sdiod_drive_strength_tab2[] = { 66 {12, 0x7}, 67 {10, 0x6}, 68 {8, 0x5}, 69 {6, 0x4}, 70 {4, 0x2}, 71 {2, 0x1}, 72 {0, 0x0} }; 73 74/* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */ 75static const sdiod_drive_str_t sdiod_drive_strength_tab3[] = { 76 {32, 0x7}, 77 {26, 0x6}, 78 {22, 0x5}, 79 {16, 0x4}, 80 {12, 0x3}, 81 {8, 0x2}, 82 {4, 0x1}, 83 {0, 0x0} }; 84 85/* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8v) */ 86static const sdiod_drive_str_t sdiod_drive_strength_tab4_1v8[] = { 87 {32, 0x6}, 88 {26, 0x7}, 89 {22, 0x4}, 90 {16, 0x5}, 91 {12, 0x2}, 92 {8, 0x3}, 93 {4, 0x0}, 94 {0, 0x1} }; 95 96/* SDIO Drive Strength to sel value table for PMU Rev 11 (1.2v) */ 97 98/* SDIO Drive Strength to sel value table for PMU Rev 11 (2.5v) */ 99 100/* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */ 101static const sdiod_drive_str_t sdiod_drive_strength_tab5_1v8[] = { 102 {6, 0x7}, 103 {5, 0x6}, 104 {4, 0x5}, 105 {3, 0x4}, 106 {2, 0x2}, 107 {1, 0x1}, 108 {0, 0x0} }; 109 110/* SDIO Drive Strength to sel value table for PMU Rev 13 (3.3v) */ 111 112/* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */ 113static const sdiod_drive_str_t sdiod_drive_strength_tab6_1v8[] = { 114 {3, 0x3}, 115 {2, 0x2}, 116 {1, 0x1}, 117 {0, 0x0} }; 118 119#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu)) 120 121void 122si_sdiod_drive_strength_init(si_t *sih, osl_t *osh, uint32 drivestrength) 123{ 124 chipcregs_t *cc; 125 uint origidx, intr_val = 0; 126 sdiod_drive_str_t *str_tab = NULL; 127 uint32 str_mask = 0; 128 uint32 str_shift = 0; 129 130 if (!(sih->cccaps & CC_CAP_PMU)) { 131 return; 132 } 133 134 /* Remember original core before switch to chipc */ 135 cc = (chipcregs_t *) si_switch_core(sih, CC_CORE_ID, &origidx, &intr_val); 136 137 switch (SDIOD_DRVSTR_KEY(sih->chip, sih->pmurev)) { 138 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1): 139 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab1; 140 str_mask = 0x30000000; 141 str_shift = 28; 142 break; 143 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2): 144 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3): 145 case SDIOD_DRVSTR_KEY(BCM4315_CHIP_ID, 4): 146 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab2; 147 str_mask = 0x00003800; 148 str_shift = 11; 149 break; 150 case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8): 151 case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 11): 152 if (sih->pmurev == 8) { 153 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab3; 154 } 155 else if (sih->pmurev == 11) { 156 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab4_1v8; 157 } 158 str_mask = 0x00003800; 159 str_shift = 11; 160 break; 161 case SDIOD_DRVSTR_KEY(BCM4330_CHIP_ID, 12): 162 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab4_1v8; 163 str_mask = 0x00003800; 164 str_shift = 11; 165 break; 166 case SDIOD_DRVSTR_KEY(BCM43362_CHIP_ID, 13): 167 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab5_1v8; 168 str_mask = 0x00003800; 169 str_shift = 11; 170 break; 171 case SDIOD_DRVSTR_KEY(BCM4334_CHIP_ID, 17): 172 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab6_1v8; 173 str_mask = 0x00001800; 174 str_shift = 11; 175 break; 176 default: 177 PMU_MSG(("No SDIO Drive strength init done for chip %s rev %d pmurev %d\n", 178 bcm_chipname(sih->chip, chn, 8), sih->chiprev, sih->pmurev)); 179 180 break; 181 } 182 183 if (str_tab != NULL && cc != NULL) { 184 uint32 cc_data_temp; 185 int i; 186 187 /* Pick the lowest available drive strength equal or greater than the 188 * requested strength. Drive strength of 0 requests tri-state. 189 */ 190 for (i = 0; drivestrength < str_tab[i].strength; i++) 191 ; 192 193 if (i > 0 && drivestrength > str_tab[i].strength) 194 i--; 195 196 W_REG(osh, &cc->chipcontrol_addr, 1); 197 cc_data_temp = R_REG(osh, &cc->chipcontrol_data); 198 cc_data_temp &= ~str_mask; 199 cc_data_temp |= str_tab[i].sel << str_shift; 200 W_REG(osh, &cc->chipcontrol_data, cc_data_temp); 201 202 PMU_MSG(("SDIO: %dmA drive strength requested; set to %dmA\n", 203 drivestrength, str_tab[i].strength)); 204 } 205 206 /* Return to original core */ 207 si_restore_core(sih, origidx, intr_val); 208} 209