1/****************************************************************************** 2 * 3 * GPL LICENSE SUMMARY 4 * 5 * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of version 2 of the GNU General Public License as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, 19 * USA 20 * 21 * The full GNU General Public License is included in this distribution 22 * in the file called LICENSE.GPL. 23 * 24 * Contact Information: 25 * Intel Linux Wireless <ilw@linux.intel.com> 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 27 * 28 *****************************************************************************/ 29 30#include <linux/kernel.h> 31#include <linux/init.h> 32 33#include "iwl-dev.h" 34#include "iwl-core.h" 35#include "iwl-io.h" 36#include "iwl-agn-hw.h" 37#include "iwl-agn.h" 38#include "iwl-agn-calib.h" 39#include "iwl-trans.h" 40#include "iwl-fh.h" 41#include "iwl-op-mode.h" 42 43static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = { 44 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP, 45 0, COEX_UNASSOC_IDLE_FLAGS}, 46 {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP, 47 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS}, 48 {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP, 49 0, COEX_UNASSOC_AUTO_SCAN_FLAGS}, 50 {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP, 51 0, COEX_CALIBRATION_FLAGS}, 52 {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP, 53 0, COEX_PERIODIC_CALIBRATION_FLAGS}, 54 {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP, 55 0, COEX_CONNECTION_ESTAB_FLAGS}, 56 {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP, 57 0, COEX_ASSOCIATED_IDLE_FLAGS}, 58 {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP, 59 0, COEX_ASSOC_MANUAL_SCAN_FLAGS}, 60 {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP, 61 0, COEX_ASSOC_AUTO_SCAN_FLAGS}, 62 {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP, 63 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS}, 64 {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS}, 65 {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS}, 66 {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP, 67 0, COEX_STAND_ALONE_DEBUG_FLAGS}, 68 {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP, 69 0, COEX_IPAN_ASSOC_LEVEL_FLAGS}, 70 {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS}, 71 {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS} 72}; 73 74/****************************************************************************** 75 * 76 * uCode download functions 77 * 78 ******************************************************************************/ 79 80static inline const struct fw_img * 81iwl_get_ucode_image(struct iwl_priv *priv, enum iwl_ucode_type ucode_type) 82{ 83 if (ucode_type >= IWL_UCODE_TYPE_MAX) 84 return NULL; 85 86 return &priv->fw->img[ucode_type]; 87} 88 89/* 90 * Calibration 91 */ 92static int iwl_set_Xtal_calib(struct iwl_priv *priv) 93{ 94 struct iwl_calib_xtal_freq_cmd cmd; 95 __le16 *xtal_calib = 96 (__le16 *)iwl_eeprom_query_addr(priv->shrd, EEPROM_XTAL); 97 98 iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD); 99 cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]); 100 cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]); 101 return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd)); 102} 103 104static int iwl_set_temperature_offset_calib(struct iwl_priv *priv) 105{ 106 struct iwl_calib_temperature_offset_cmd cmd; 107 __le16 *offset_calib = 108 (__le16 *)iwl_eeprom_query_addr(priv->shrd, 109 EEPROM_RAW_TEMPERATURE); 110 111 memset(&cmd, 0, sizeof(cmd)); 112 iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD); 113 memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib)); 114 if (!(cmd.radio_sensor_offset)) 115 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET; 116 117 IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n", 118 le16_to_cpu(cmd.radio_sensor_offset)); 119 return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd)); 120} 121 122static int iwl_set_temperature_offset_calib_v2(struct iwl_priv *priv) 123{ 124 struct iwl_calib_temperature_offset_v2_cmd cmd; 125 __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv->shrd, 126 EEPROM_KELVIN_TEMPERATURE); 127 __le16 *offset_calib_low = 128 (__le16 *)iwl_eeprom_query_addr(priv->shrd, 129 EEPROM_RAW_TEMPERATURE); 130 struct iwl_eeprom_calib_hdr *hdr; 131 132 memset(&cmd, 0, sizeof(cmd)); 133 iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD); 134 hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv->shrd, 135 EEPROM_CALIB_ALL); 136 memcpy(&cmd.radio_sensor_offset_high, offset_calib_high, 137 sizeof(*offset_calib_high)); 138 memcpy(&cmd.radio_sensor_offset_low, offset_calib_low, 139 sizeof(*offset_calib_low)); 140 if (!(cmd.radio_sensor_offset_low)) { 141 IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n"); 142 cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET; 143 cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET; 144 } 145 memcpy(&cmd.burntVoltageRef, &hdr->voltage, 146 sizeof(hdr->voltage)); 147 148 IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n", 149 le16_to_cpu(cmd.radio_sensor_offset_high)); 150 IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n", 151 le16_to_cpu(cmd.radio_sensor_offset_low)); 152 IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n", 153 le16_to_cpu(cmd.burntVoltageRef)); 154 155 return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd)); 156} 157 158static int iwl_send_calib_cfg(struct iwl_priv *priv) 159{ 160 struct iwl_calib_cfg_cmd calib_cfg_cmd; 161 struct iwl_host_cmd cmd = { 162 .id = CALIBRATION_CFG_CMD, 163 .len = { sizeof(struct iwl_calib_cfg_cmd), }, 164 .data = { &calib_cfg_cmd, }, 165 }; 166 167 memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd)); 168 calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL; 169 calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL; 170 calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL; 171 calib_cfg_cmd.ucd_calib_cfg.flags = 172 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK; 173 174 return iwl_dvm_send_cmd(priv, &cmd); 175} 176 177int iwlagn_rx_calib_result(struct iwl_priv *priv, 178 struct iwl_rx_cmd_buffer *rxb, 179 struct iwl_device_cmd *cmd) 180{ 181 struct iwl_rx_packet *pkt = rxb_addr(rxb); 182 struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->data; 183 int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; 184 185 /* reduce the size of the length field itself */ 186 len -= 4; 187 188 if (iwl_calib_set(priv, hdr, len)) 189 IWL_ERR(priv, "Failed to record calibration data %d\n", 190 hdr->op_code); 191 192 return 0; 193} 194 195int iwl_init_alive_start(struct iwl_priv *priv) 196{ 197 int ret; 198 199 if (cfg(priv)->bt_params && 200 cfg(priv)->bt_params->advanced_bt_coexist) { 201 /* 202 * Tell uCode we are ready to perform calibration 203 * need to perform this before any calibration 204 * no need to close the envlope since we are going 205 * to load the runtime uCode later. 206 */ 207 ret = iwl_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN, 208 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2); 209 if (ret) 210 return ret; 211 212 } 213 214 ret = iwl_send_calib_cfg(priv); 215 if (ret) 216 return ret; 217 218 /** 219 * temperature offset calibration is only needed for runtime ucode, 220 * so prepare the value now. 221 */ 222 if (cfg(priv)->need_temp_offset_calib) { 223 if (cfg(priv)->temp_offset_v2) 224 return iwl_set_temperature_offset_calib_v2(priv); 225 else 226 return iwl_set_temperature_offset_calib(priv); 227 } 228 229 return 0; 230} 231 232static int iwl_send_wimax_coex(struct iwl_priv *priv) 233{ 234 struct iwl_wimax_coex_cmd coex_cmd; 235 236 if (cfg(priv)->base_params->support_wimax_coexist) { 237 /* UnMask wake up src at associated sleep */ 238 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK; 239 240 /* UnMask wake up src at unassociated sleep */ 241 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK; 242 memcpy(coex_cmd.sta_prio, cu_priorities, 243 sizeof(struct iwl_wimax_coex_event_entry) * 244 COEX_NUM_OF_EVENTS); 245 246 /* enabling the coexistence feature */ 247 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK; 248 249 /* enabling the priorities tables */ 250 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK; 251 } else { 252 /* coexistence is disabled */ 253 memset(&coex_cmd, 0, sizeof(coex_cmd)); 254 } 255 return iwl_dvm_send_cmd_pdu(priv, 256 COEX_PRIORITY_TABLE_CMD, CMD_SYNC, 257 sizeof(coex_cmd), &coex_cmd); 258} 259 260static const u8 iwl_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = { 261 ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | 262 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), 263 ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | 264 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), 265 ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | 266 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), 267 ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | 268 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), 269 ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | 270 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), 271 ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | 272 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), 273 ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | 274 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), 275 ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | 276 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), 277 ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) | 278 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)), 279 0, 0, 0, 0, 0, 0, 0 280}; 281 282void iwl_send_prio_tbl(struct iwl_priv *priv) 283{ 284 struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd; 285 286 memcpy(prio_tbl_cmd.prio_tbl, iwl_bt_prio_tbl, 287 sizeof(iwl_bt_prio_tbl)); 288 if (iwl_dvm_send_cmd_pdu(priv, 289 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC, 290 sizeof(prio_tbl_cmd), &prio_tbl_cmd)) 291 IWL_ERR(priv, "failed to send BT prio tbl command\n"); 292} 293 294int iwl_send_bt_env(struct iwl_priv *priv, u8 action, u8 type) 295{ 296 struct iwl_bt_coex_prot_env_cmd env_cmd; 297 int ret; 298 299 env_cmd.action = action; 300 env_cmd.type = type; 301 ret = iwl_dvm_send_cmd_pdu(priv, 302 REPLY_BT_COEX_PROT_ENV, CMD_SYNC, 303 sizeof(env_cmd), &env_cmd); 304 if (ret) 305 IWL_ERR(priv, "failed to send BT env command\n"); 306 return ret; 307} 308 309 310static int iwl_alive_notify(struct iwl_priv *priv) 311{ 312 int ret; 313 314 iwl_trans_fw_alive(trans(priv)); 315 316 priv->passive_no_rx = false; 317 priv->transport_queue_stop = 0; 318 319 ret = iwl_send_wimax_coex(priv); 320 if (ret) 321 return ret; 322 323 if (!cfg(priv)->no_xtal_calib) { 324 ret = iwl_set_Xtal_calib(priv); 325 if (ret) 326 return ret; 327 } 328 329 return iwl_send_calib_results(priv); 330} 331 332 333/** 334 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host, 335 * using sample data 100 bytes apart. If these sample points are good, 336 * it's a pretty good bet that everything between them is good, too. 337 */ 338static int iwl_verify_sec_sparse(struct iwl_priv *priv, 339 const struct fw_desc *fw_desc) 340{ 341 __le32 *image = (__le32 *)fw_desc->v_addr; 342 u32 len = fw_desc->len; 343 u32 val; 344 u32 i; 345 346 IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len); 347 348 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { 349 /* read data comes through single port, auto-incr addr */ 350 /* NOTE: Use the debugless read so we don't flood kernel log 351 * if IWL_DL_IO is set */ 352 iwl_write_direct32(trans(priv), HBUS_TARG_MEM_RADDR, 353 i + fw_desc->offset); 354 val = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT); 355 if (val != le32_to_cpu(*image)) 356 return -EIO; 357 } 358 359 return 0; 360} 361 362static void iwl_print_mismatch_sec(struct iwl_priv *priv, 363 const struct fw_desc *fw_desc) 364{ 365 __le32 *image = (__le32 *)fw_desc->v_addr; 366 u32 len = fw_desc->len; 367 u32 val; 368 u32 offs; 369 int errors = 0; 370 371 IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len); 372 373 iwl_write_direct32(trans(priv), HBUS_TARG_MEM_RADDR, 374 fw_desc->offset); 375 376 for (offs = 0; 377 offs < len && errors < 20; 378 offs += sizeof(u32), image++) { 379 /* read data comes through single port, auto-incr addr */ 380 val = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT); 381 if (val != le32_to_cpu(*image)) { 382 IWL_ERR(priv, "uCode INST section at " 383 "offset 0x%x, is 0x%x, s/b 0x%x\n", 384 offs, val, le32_to_cpu(*image)); 385 errors++; 386 } 387 } 388} 389 390/** 391 * iwl_verify_ucode - determine which instruction image is in SRAM, 392 * and verify its contents 393 */ 394static int iwl_verify_ucode(struct iwl_priv *priv, 395 enum iwl_ucode_type ucode_type) 396{ 397 const struct fw_img *img = iwl_get_ucode_image(priv, ucode_type); 398 399 if (!img) { 400 IWL_ERR(priv, "Invalid ucode requested (%d)\n", ucode_type); 401 return -EINVAL; 402 } 403 404 if (!iwl_verify_sec_sparse(priv, &img->sec[IWL_UCODE_SECTION_INST])) { 405 IWL_DEBUG_FW(priv, "uCode is good in inst SRAM\n"); 406 return 0; 407 } 408 409 IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n"); 410 411 iwl_print_mismatch_sec(priv, &img->sec[IWL_UCODE_SECTION_INST]); 412 return -EIO; 413} 414 415struct iwl_alive_data { 416 bool valid; 417 u8 subtype; 418}; 419 420static void iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, 421 struct iwl_rx_packet *pkt, 422 void *data) 423{ 424 struct iwl_priv *priv = 425 container_of(notif_wait, struct iwl_priv, notif_wait); 426 struct iwl_alive_data *alive_data = data; 427 struct iwl_alive_resp *palive; 428 429 palive = (void *)pkt->data; 430 431 IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision " 432 "0x%01X 0x%01X\n", 433 palive->is_valid, palive->ver_type, 434 palive->ver_subtype); 435 436 priv->shrd->device_pointers.error_event_table = 437 le32_to_cpu(palive->error_event_table_ptr); 438 priv->shrd->device_pointers.log_event_table = 439 le32_to_cpu(palive->log_event_table_ptr); 440 441 alive_data->subtype = palive->ver_subtype; 442 alive_data->valid = palive->is_valid == UCODE_VALID_OK; 443} 444 445#define UCODE_ALIVE_TIMEOUT HZ 446#define UCODE_CALIB_TIMEOUT (2*HZ) 447 448int iwl_load_ucode_wait_alive(struct iwl_priv *priv, 449 enum iwl_ucode_type ucode_type) 450{ 451 struct iwl_notification_wait alive_wait; 452 struct iwl_alive_data alive_data; 453 const struct fw_img *fw; 454 int ret; 455 enum iwl_ucode_type old_type; 456 457 old_type = priv->shrd->ucode_type; 458 priv->shrd->ucode_type = ucode_type; 459 fw = iwl_get_ucode_image(priv, ucode_type); 460 461 priv->ucode_loaded = false; 462 463 if (!fw) 464 return -EINVAL; 465 466 iwl_init_notification_wait(&priv->notif_wait, &alive_wait, REPLY_ALIVE, 467 iwl_alive_fn, &alive_data); 468 469 ret = iwl_trans_start_fw(trans(priv), fw); 470 if (ret) { 471 priv->shrd->ucode_type = old_type; 472 iwl_remove_notification(&priv->notif_wait, &alive_wait); 473 return ret; 474 } 475 476 /* 477 * Some things may run in the background now, but we 478 * just wait for the ALIVE notification here. 479 */ 480 ret = iwl_wait_notification(&priv->notif_wait, &alive_wait, 481 UCODE_ALIVE_TIMEOUT); 482 if (ret) { 483 priv->shrd->ucode_type = old_type; 484 return ret; 485 } 486 487 if (!alive_data.valid) { 488 IWL_ERR(priv, "Loaded ucode is not valid!\n"); 489 priv->shrd->ucode_type = old_type; 490 return -EIO; 491 } 492 493 /* 494 * This step takes a long time (60-80ms!!) and 495 * WoWLAN image should be loaded quickly, so 496 * skip it for WoWLAN. 497 */ 498 if (ucode_type != IWL_UCODE_WOWLAN) { 499 ret = iwl_verify_ucode(priv, ucode_type); 500 if (ret) { 501 priv->shrd->ucode_type = old_type; 502 return ret; 503 } 504 505 /* delay a bit to give rfkill time to run */ 506 msleep(5); 507 } 508 509 ret = iwl_alive_notify(priv); 510 if (ret) { 511 IWL_WARN(priv, 512 "Could not complete ALIVE transition: %d\n", ret); 513 priv->shrd->ucode_type = old_type; 514 return ret; 515 } 516 517 priv->ucode_loaded = true; 518 519 return 0; 520} 521 522int iwl_run_init_ucode(struct iwl_priv *priv) 523{ 524 struct iwl_notification_wait calib_wait; 525 int ret; 526 527 lockdep_assert_held(&priv->mutex); 528 529 /* No init ucode required? Curious, but maybe ok */ 530 if (!priv->fw->img[IWL_UCODE_INIT].sec[0].len) 531 return 0; 532 533 if (priv->init_ucode_run) 534 return 0; 535 536 iwl_init_notification_wait(&priv->notif_wait, &calib_wait, 537 CALIBRATION_COMPLETE_NOTIFICATION, 538 NULL, NULL); 539 540 /* Will also start the device */ 541 ret = iwl_load_ucode_wait_alive(priv, IWL_UCODE_INIT); 542 if (ret) 543 goto error; 544 545 ret = iwl_init_alive_start(priv); 546 if (ret) 547 goto error; 548 549 /* 550 * Some things may run in the background now, but we 551 * just wait for the calibration complete notification. 552 */ 553 ret = iwl_wait_notification(&priv->notif_wait, &calib_wait, 554 UCODE_CALIB_TIMEOUT); 555 if (!ret) 556 priv->init_ucode_run = true; 557 558 goto out; 559 560 error: 561 iwl_remove_notification(&priv->notif_wait, &calib_wait); 562 out: 563 /* Whatever happened, stop the device */ 564 iwl_trans_stop_device(trans(priv)); 565 priv->ucode_loaded = false; 566 567 return ret; 568} 569