1/*
2 *  Copyright (C) 2002 Intersil Americas Inc.
3 *  Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
4 *  Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
5 *
6 *  This program is free software; you can redistribute it and/or modify
7 *  it under the terms of the GNU General Public License as published by
8 *  the Free Software Foundation; either version 2 of the License
9 *
10 *  This program is distributed in the hope that it will be useful,
11 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 *  GNU General Public License for more details.
14 *
15 *  You should have received a copy of the GNU General Public License
16 *  along with this program; if not, write to the Free Software
17 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
18 *
19 */
20
21#include <linux/hardirq.h>
22#include <linux/module.h>
23#include <linux/slab.h>
24
25#include <linux/netdevice.h>
26#include <linux/ethtool.h>
27#include <linux/pci.h>
28#include <linux/sched.h>
29#include <linux/etherdevice.h>
30#include <linux/delay.h>
31#include <linux/if_arp.h>
32
33#include <asm/io.h>
34
35#include "prismcompat.h"
36#include "isl_38xx.h"
37#include "isl_ioctl.h"
38#include "islpci_dev.h"
39#include "islpci_mgt.h"
40#include "islpci_eth.h"
41#include "oid_mgt.h"
42
43#define ISL3877_IMAGE_FILE	"isl3877"
44#define ISL3886_IMAGE_FILE	"isl3886"
45#define ISL3890_IMAGE_FILE	"isl3890"
46MODULE_FIRMWARE(ISL3877_IMAGE_FILE);
47MODULE_FIRMWARE(ISL3886_IMAGE_FILE);
48MODULE_FIRMWARE(ISL3890_IMAGE_FILE);
49
50static int prism54_bring_down(islpci_private *);
51static int islpci_alloc_memory(islpci_private *);
52
53/* Temporary dummy MAC address to use until firmware is loaded.
54 * The idea there is that some tools (such as nameif) may query
55 * the MAC address before the netdev is 'open'. By using a valid
56 * OUI prefix, they can process the netdev properly.
57 * Of course, this is not the final/real MAC address. It doesn't
58 * matter, as you are suppose to be able to change it anytime via
59 * ndev->set_mac_address. Jean II */
60static const unsigned char	dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 };
61
62static int
63isl_upload_firmware(islpci_private *priv)
64{
65	u32 reg, rc;
66	void __iomem *device_base = priv->device_base;
67
68	/* clear the RAMBoot and the Reset bit */
69	reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
70	reg &= ~ISL38XX_CTRL_STAT_RESET;
71	reg &= ~ISL38XX_CTRL_STAT_RAMBOOT;
72	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
73	wmb();
74	udelay(ISL38XX_WRITEIO_DELAY);
75
76	/* set the Reset bit without reading the register ! */
77	reg |= ISL38XX_CTRL_STAT_RESET;
78	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
79	wmb();
80	udelay(ISL38XX_WRITEIO_DELAY);
81
82	/* clear the Reset bit */
83	reg &= ~ISL38XX_CTRL_STAT_RESET;
84	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
85	wmb();
86
87	/* wait a while for the device to reboot */
88	mdelay(50);
89
90	{
91		const struct firmware *fw_entry = NULL;
92		long fw_len;
93		const u32 *fw_ptr;
94
95		rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV);
96		if (rc) {
97			printk(KERN_ERR
98			       "%s: request_firmware() failed for '%s'\n",
99			       "prism54", priv->firmware);
100			return rc;
101		}
102		/* prepare the Direct Memory Base register */
103		reg = ISL38XX_DEV_FIRMWARE_ADDRES;
104
105		fw_ptr = (u32 *) fw_entry->data;
106		fw_len = fw_entry->size;
107
108		if (fw_len % 4) {
109			printk(KERN_ERR
110			       "%s: firmware '%s' size is not multiple of 32bit, aborting!\n",
111			       "prism54", priv->firmware);
112			release_firmware(fw_entry);
113			return -EILSEQ; /* Illegal byte sequence  */;
114		}
115
116		while (fw_len > 0) {
117			long _fw_len =
118			    (fw_len >
119			     ISL38XX_MEMORY_WINDOW_SIZE) ?
120			    ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
121			u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
122
123			/* set the card's base address for writing the data */
124			isl38xx_w32_flush(device_base, reg,
125					  ISL38XX_DIR_MEM_BASE_REG);
126			wmb();	/* be paranoid */
127
128			/* increment the write address for next iteration */
129			reg += _fw_len;
130			fw_len -= _fw_len;
131
132			/* write the data to the Direct Memory Window 32bit-wise */
133			/* memcpy_toio() doesn't guarantee 32bit writes :-| */
134			while (_fw_len > 0) {
135				/* use non-swapping writel() */
136				__raw_writel(*fw_ptr, dev_fw_ptr);
137				fw_ptr++, dev_fw_ptr++;
138				_fw_len -= 4;
139			}
140
141			/* flush PCI posting */
142			(void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH);
143			wmb();	/* be paranoid again */
144
145			BUG_ON(_fw_len != 0);
146		}
147
148		BUG_ON(fw_len != 0);
149
150		/* Firmware version is at offset 40 (also for "newmac") */
151		printk(KERN_DEBUG "%s: firmware version: %.8s\n",
152		       priv->ndev->name, fw_entry->data + 40);
153
154		release_firmware(fw_entry);
155	}
156
157	/* now reset the device
158	 * clear the Reset & ClkRun bit, set the RAMBoot bit */
159	reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
160	reg &= ~ISL38XX_CTRL_STAT_CLKRUN;
161	reg &= ~ISL38XX_CTRL_STAT_RESET;
162	reg |= ISL38XX_CTRL_STAT_RAMBOOT;
163	isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG);
164	wmb();
165	udelay(ISL38XX_WRITEIO_DELAY);
166
167	/* set the reset bit latches the host override and RAMBoot bits
168	 * into the device for operation when the reset bit is reset */
169	reg |= ISL38XX_CTRL_STAT_RESET;
170	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
171	/* don't do flush PCI posting here! */
172	wmb();
173	udelay(ISL38XX_WRITEIO_DELAY);
174
175	/* clear the reset bit should start the whole circus */
176	reg &= ~ISL38XX_CTRL_STAT_RESET;
177	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
178	/* don't do flush PCI posting here! */
179	wmb();
180	udelay(ISL38XX_WRITEIO_DELAY);
181
182	return 0;
183}
184
185/******************************************************************************
186    Device Interrupt Handler
187******************************************************************************/
188
189irqreturn_t
190islpci_interrupt(int irq, void *config)
191{
192	u32 reg;
193	islpci_private *priv = config;
194	struct net_device *ndev = priv->ndev;
195	void __iomem *device = priv->device_base;
196	int powerstate = ISL38XX_PSM_POWERSAVE_STATE;
197
198	/* lock the interrupt handler */
199	spin_lock(&priv->slock);
200
201	/* received an interrupt request on a shared IRQ line
202	 * first check whether the device is in sleep mode */
203	reg = readl(device + ISL38XX_CTRL_STAT_REG);
204	if (reg & ISL38XX_CTRL_STAT_SLEEPMODE)
205		/* device is in sleep mode, IRQ was generated by someone else */
206	{
207#if VERBOSE > SHOW_ERROR_MESSAGES
208		DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
209#endif
210		spin_unlock(&priv->slock);
211		return IRQ_NONE;
212	}
213
214
215	/* check whether there is any source of interrupt on the device */
216	reg = readl(device + ISL38XX_INT_IDENT_REG);
217
218	/* also check the contents of the Interrupt Enable Register, because this
219	 * will filter out interrupt sources from other devices on the same irq ! */
220	reg &= readl(device + ISL38XX_INT_EN_REG);
221	reg &= ISL38XX_INT_SOURCES;
222
223	if (reg != 0) {
224		if (islpci_get_state(priv) != PRV_STATE_SLEEP)
225			powerstate = ISL38XX_PSM_ACTIVE_STATE;
226
227		/* reset the request bits in the Identification register */
228		isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG);
229
230#if VERBOSE > SHOW_ERROR_MESSAGES
231		DEBUG(SHOW_FUNCTION_CALLS,
232		      "IRQ: Identification register 0x%p 0x%x\n", device, reg);
233#endif
234
235		/* check for each bit in the register separately */
236		if (reg & ISL38XX_INT_IDENT_UPDATE) {
237#if VERBOSE > SHOW_ERROR_MESSAGES
238			/* Queue has been updated */
239			DEBUG(SHOW_TRACING, "IRQ: Update flag\n");
240
241			DEBUG(SHOW_QUEUE_INDEXES,
242			      "CB drv Qs: [%i][%i][%i][%i][%i][%i]\n",
243			      le32_to_cpu(priv->control_block->
244					  driver_curr_frag[0]),
245			      le32_to_cpu(priv->control_block->
246					  driver_curr_frag[1]),
247			      le32_to_cpu(priv->control_block->
248					  driver_curr_frag[2]),
249			      le32_to_cpu(priv->control_block->
250					  driver_curr_frag[3]),
251			      le32_to_cpu(priv->control_block->
252					  driver_curr_frag[4]),
253			      le32_to_cpu(priv->control_block->
254					  driver_curr_frag[5])
255			    );
256
257			DEBUG(SHOW_QUEUE_INDEXES,
258			      "CB dev Qs: [%i][%i][%i][%i][%i][%i]\n",
259			      le32_to_cpu(priv->control_block->
260					  device_curr_frag[0]),
261			      le32_to_cpu(priv->control_block->
262					  device_curr_frag[1]),
263			      le32_to_cpu(priv->control_block->
264					  device_curr_frag[2]),
265			      le32_to_cpu(priv->control_block->
266					  device_curr_frag[3]),
267			      le32_to_cpu(priv->control_block->
268					  device_curr_frag[4]),
269			      le32_to_cpu(priv->control_block->
270					  device_curr_frag[5])
271			    );
272#endif
273
274			/* cleanup the data low transmit queue */
275			islpci_eth_cleanup_transmit(priv, priv->control_block);
276
277			/* device is in active state, update the
278			 * powerstate flag if necessary */
279			powerstate = ISL38XX_PSM_ACTIVE_STATE;
280
281			/* check all three queues in priority order
282			 * call the PIMFOR receive function until the
283			 * queue is empty */
284			if (isl38xx_in_queue(priv->control_block,
285						ISL38XX_CB_RX_MGMTQ) != 0) {
286#if VERBOSE > SHOW_ERROR_MESSAGES
287				DEBUG(SHOW_TRACING,
288				      "Received frame in Management Queue\n");
289#endif
290				islpci_mgt_receive(ndev);
291
292				islpci_mgt_cleanup_transmit(ndev);
293
294				/* Refill slots in receive queue */
295				islpci_mgmt_rx_fill(ndev);
296
297				/* no need to trigger the device, next
298                                   islpci_mgt_transaction does it */
299			}
300
301			while (isl38xx_in_queue(priv->control_block,
302						ISL38XX_CB_RX_DATA_LQ) != 0) {
303#if VERBOSE > SHOW_ERROR_MESSAGES
304				DEBUG(SHOW_TRACING,
305				      "Received frame in Data Low Queue\n");
306#endif
307				islpci_eth_receive(priv);
308			}
309
310			/* check whether the data transmit queues were full */
311			if (priv->data_low_tx_full) {
312				/* check whether the transmit is not full anymore */
313				if (ISL38XX_CB_TX_QSIZE -
314				    isl38xx_in_queue(priv->control_block,
315						     ISL38XX_CB_TX_DATA_LQ) >=
316				    ISL38XX_MIN_QTHRESHOLD) {
317					/* nope, the driver is ready for more network frames */
318					netif_wake_queue(priv->ndev);
319
320					/* reset the full flag */
321					priv->data_low_tx_full = 0;
322				}
323			}
324		}
325
326		if (reg & ISL38XX_INT_IDENT_INIT) {
327			/* Device has been initialized */
328#if VERBOSE > SHOW_ERROR_MESSAGES
329			DEBUG(SHOW_TRACING,
330			      "IRQ: Init flag, device initialized\n");
331#endif
332			wake_up(&priv->reset_done);
333		}
334
335		if (reg & ISL38XX_INT_IDENT_SLEEP) {
336			/* Device intends to move to powersave state */
337#if VERBOSE > SHOW_ERROR_MESSAGES
338			DEBUG(SHOW_TRACING, "IRQ: Sleep flag\n");
339#endif
340			isl38xx_handle_sleep_request(priv->control_block,
341						     &powerstate,
342						     priv->device_base);
343		}
344
345		if (reg & ISL38XX_INT_IDENT_WAKEUP) {
346			/* Device has been woken up to active state */
347#if VERBOSE > SHOW_ERROR_MESSAGES
348			DEBUG(SHOW_TRACING, "IRQ: Wakeup flag\n");
349#endif
350
351			isl38xx_handle_wakeup(priv->control_block,
352					      &powerstate, priv->device_base);
353		}
354	} else {
355#if VERBOSE > SHOW_ERROR_MESSAGES
356		DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
357#endif
358		spin_unlock(&priv->slock);
359		return IRQ_NONE;
360	}
361
362	/* sleep -> ready */
363	if (islpci_get_state(priv) == PRV_STATE_SLEEP
364	    && powerstate == ISL38XX_PSM_ACTIVE_STATE)
365		islpci_set_state(priv, PRV_STATE_READY);
366
367	/* !sleep -> sleep */
368	if (islpci_get_state(priv) != PRV_STATE_SLEEP
369	    && powerstate == ISL38XX_PSM_POWERSAVE_STATE)
370		islpci_set_state(priv, PRV_STATE_SLEEP);
371
372	/* unlock the interrupt handler */
373	spin_unlock(&priv->slock);
374
375	return IRQ_HANDLED;
376}
377
378/******************************************************************************
379    Network Interface Control & Statistical functions
380******************************************************************************/
381static int
382islpci_open(struct net_device *ndev)
383{
384	u32 rc;
385	islpci_private *priv = netdev_priv(ndev);
386
387	/* reset data structures, upload firmware and reset device */
388	rc = islpci_reset(priv,1);
389	if (rc) {
390		prism54_bring_down(priv);
391		return rc; /* Returns informative message */
392	}
393
394	netif_start_queue(ndev);
395
396	/* Turn off carrier if in STA or Ad-hoc mode. It will be turned on
397	 * once the firmware receives a trap of being associated
398	 * (GEN_OID_LINKSTATE). In other modes (AP or WDS or monitor) we
399	 * should just leave the carrier on as its expected the firmware
400	 * won't send us a trigger. */
401	if (priv->iw_mode == IW_MODE_INFRA || priv->iw_mode == IW_MODE_ADHOC)
402		netif_carrier_off(ndev);
403	else
404		netif_carrier_on(ndev);
405
406	return 0;
407}
408
409static int
410islpci_close(struct net_device *ndev)
411{
412	islpci_private *priv = netdev_priv(ndev);
413
414	printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name);
415
416	netif_stop_queue(ndev);
417
418	return prism54_bring_down(priv);
419}
420
421static int
422prism54_bring_down(islpci_private *priv)
423{
424	void __iomem *device_base = priv->device_base;
425	u32 reg;
426	/* we are going to shutdown the device */
427	islpci_set_state(priv, PRV_STATE_PREBOOT);
428
429	/* disable all device interrupts in case they weren't */
430	isl38xx_disable_interrupts(priv->device_base);
431
432	/* For safety reasons, we may want to ensure that no DMA transfer is
433	 * currently in progress by emptying the TX and RX queues. */
434
435	/* wait until interrupts have finished executing on other CPUs */
436	synchronize_irq(priv->pdev->irq);
437
438	reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
439	reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT);
440	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
441	wmb();
442	udelay(ISL38XX_WRITEIO_DELAY);
443
444	reg |= ISL38XX_CTRL_STAT_RESET;
445	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
446	wmb();
447	udelay(ISL38XX_WRITEIO_DELAY);
448
449	/* clear the Reset bit */
450	reg &= ~ISL38XX_CTRL_STAT_RESET;
451	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
452	wmb();
453
454	/* wait a while for the device to reset */
455	schedule_timeout_uninterruptible(msecs_to_jiffies(50));
456
457	return 0;
458}
459
460static int
461islpci_upload_fw(islpci_private *priv)
462{
463	islpci_state_t old_state;
464	u32 rc;
465
466	old_state = islpci_set_state(priv, PRV_STATE_BOOT);
467
468	printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name);
469
470	rc = isl_upload_firmware(priv);
471	if (rc) {
472		/* error uploading the firmware */
473		printk(KERN_ERR "%s: could not upload firmware ('%s')\n",
474		       priv->ndev->name, priv->firmware);
475
476		islpci_set_state(priv, old_state);
477		return rc;
478	}
479
480	printk(KERN_DEBUG "%s: firmware upload complete\n",
481	       priv->ndev->name);
482
483	islpci_set_state(priv, PRV_STATE_POSTBOOT);
484
485	return 0;
486}
487
488static int
489islpci_reset_if(islpci_private *priv)
490{
491	long remaining;
492	int result = -ETIME;
493	int count;
494
495	DEFINE_WAIT(wait);
496	prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE);
497
498	/* now the last step is to reset the interface */
499	isl38xx_interface_reset(priv->device_base, priv->device_host_address);
500	islpci_set_state(priv, PRV_STATE_PREINIT);
501
502        for(count = 0; count < 2 && result; count++) {
503		/* The software reset acknowledge needs about 220 msec here.
504		 * Be conservative and wait for up to one second. */
505
506		remaining = schedule_timeout_uninterruptible(HZ);
507
508		if(remaining > 0) {
509			result = 0;
510			break;
511		}
512
513		/* If we're here it's because our IRQ hasn't yet gone through.
514		 * Retry a bit more...
515		 */
516		printk(KERN_ERR "%s: no 'reset complete' IRQ seen - retrying\n",
517			priv->ndev->name);
518	}
519
520	finish_wait(&priv->reset_done, &wait);
521
522	if (result) {
523		printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
524		return result;
525	}
526
527	islpci_set_state(priv, PRV_STATE_INIT);
528
529	/* Now that the device is 100% up, let's allow
530	 * for the other interrupts --
531	 * NOTE: this is not *yet* true since we've only allowed the
532	 * INIT interrupt on the IRQ line. We can perhaps poll
533	 * the IRQ line until we know for sure the reset went through */
534	isl38xx_enable_common_interrupts(priv->device_base);
535
536	down_write(&priv->mib_sem);
537	result = mgt_commit(priv);
538	if (result) {
539		printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
540		up_write(&priv->mib_sem);
541		return result;
542	}
543	up_write(&priv->mib_sem);
544
545	islpci_set_state(priv, PRV_STATE_READY);
546
547	printk(KERN_DEBUG "%s: interface reset complete\n", priv->ndev->name);
548	return 0;
549}
550
551int
552islpci_reset(islpci_private *priv, int reload_firmware)
553{
554	isl38xx_control_block *cb =    /* volatile not needed */
555		(isl38xx_control_block *) priv->control_block;
556	unsigned counter;
557	int rc;
558
559	if (reload_firmware)
560		islpci_set_state(priv, PRV_STATE_PREBOOT);
561	else
562		islpci_set_state(priv, PRV_STATE_POSTBOOT);
563
564	printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name);
565
566	/* disable all device interrupts in case they weren't */
567	isl38xx_disable_interrupts(priv->device_base);
568
569	/* flush all management queues */
570	priv->index_mgmt_tx = 0;
571	priv->index_mgmt_rx = 0;
572
573	/* clear the indexes in the frame pointer */
574	for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
575		cb->driver_curr_frag[counter] = cpu_to_le32(0);
576		cb->device_curr_frag[counter] = cpu_to_le32(0);
577	}
578
579	/* reset the mgmt receive queue */
580	for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
581		isl38xx_fragment *frag = &cb->rx_data_mgmt[counter];
582		frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
583		frag->flags = 0;
584		frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr);
585	}
586
587	for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
588		cb->rx_data_low[counter].address =
589		    cpu_to_le32((u32) priv->pci_map_rx_address[counter]);
590	}
591
592	/* since the receive queues are filled with empty fragments, now we can
593	 * set the corresponding indexes in the Control Block */
594	priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] =
595	    cpu_to_le32(ISL38XX_CB_RX_QSIZE);
596	priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] =
597	    cpu_to_le32(ISL38XX_CB_MGMT_QSIZE);
598
599	/* reset the remaining real index registers and full flags */
600	priv->free_data_rx = 0;
601	priv->free_data_tx = 0;
602	priv->data_low_tx_full = 0;
603
604	if (reload_firmware) { /* Should we load the firmware ? */
605	/* now that the data structures are cleaned up, upload
606	 * firmware and reset interface */
607		rc = islpci_upload_fw(priv);
608		if (rc) {
609			printk(KERN_ERR "%s: islpci_reset: failure\n",
610				priv->ndev->name);
611			return rc;
612		}
613	}
614
615	/* finally reset interface */
616	rc = islpci_reset_if(priv);
617	if (rc)
618		printk(KERN_ERR "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n");
619	return rc;
620}
621
622/******************************************************************************
623    Network device configuration functions
624******************************************************************************/
625static int
626islpci_alloc_memory(islpci_private *priv)
627{
628	int counter;
629
630#if VERBOSE > SHOW_ERROR_MESSAGES
631	printk(KERN_DEBUG "islpci_alloc_memory\n");
632#endif
633
634	/* remap the PCI device base address to accessible */
635	if (!(priv->device_base =
636	      ioremap(pci_resource_start(priv->pdev, 0),
637		      ISL38XX_PCI_MEM_SIZE))) {
638		/* error in remapping the PCI device memory address range */
639		printk(KERN_ERR "PCI memory remapping failed\n");
640		return -1;
641	}
642
643	/* memory layout for consistent DMA region:
644	 *
645	 * Area 1: Control Block for the device interface
646	 * Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that
647	 *         the number of supported stations in the AP determines the minimal
648	 *         size of the buffer !
649	 */
650
651	/* perform the allocation */
652	priv->driver_mem_address = pci_alloc_consistent(priv->pdev,
653							HOST_MEM_BLOCK,
654							&priv->
655							device_host_address);
656
657	if (!priv->driver_mem_address) {
658		/* error allocating the block of PCI memory */
659		printk(KERN_ERR "%s: could not allocate DMA memory, aborting!",
660		       "prism54");
661		return -1;
662	}
663
664	/* assign the Control Block to the first address of the allocated area */
665	priv->control_block =
666	    (isl38xx_control_block *) priv->driver_mem_address;
667
668	/* set the Power Save Buffer pointer directly behind the CB */
669	priv->device_psm_buffer =
670		priv->device_host_address + CONTROL_BLOCK_SIZE;
671
672	/* make sure all buffer pointers are initialized */
673	for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
674		priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0);
675		priv->control_block->device_curr_frag[counter] = cpu_to_le32(0);
676	}
677
678	priv->index_mgmt_rx = 0;
679	memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx));
680	memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx));
681
682	/* allocate rx queue for management frames */
683	if (islpci_mgmt_rx_fill(priv->ndev) < 0)
684		goto out_free;
685
686	/* now get the data rx skb's */
687	memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx));
688	memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address));
689
690	for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
691		struct sk_buff *skb;
692
693		/* allocate an sk_buff for received data frames storage
694		 * each frame on receive size consists of 1 fragment
695		 * include any required allignment operations */
696		if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) {
697			/* error allocating an sk_buff structure elements */
698			printk(KERN_ERR "Error allocating skb.\n");
699			skb = NULL;
700			goto out_free;
701		}
702		skb_reserve(skb, (4 - (long) skb->data) & 0x03);
703		/* add the new allocated sk_buff to the buffer array */
704		priv->data_low_rx[counter] = skb;
705
706		/* map the allocated skb data area to pci */
707		priv->pci_map_rx_address[counter] =
708		    pci_map_single(priv->pdev, (void *) skb->data,
709				   MAX_FRAGMENT_SIZE_RX + 2,
710				   PCI_DMA_FROMDEVICE);
711		if (!priv->pci_map_rx_address[counter]) {
712			/* error mapping the buffer to device
713			   accessible memory address */
714			printk(KERN_ERR "failed to map skb DMA'able\n");
715			goto out_free;
716		}
717	}
718
719	prism54_acl_init(&priv->acl);
720	prism54_wpa_bss_ie_init(priv);
721	if (mgt_init(priv))
722		goto out_free;
723
724	return 0;
725 out_free:
726	islpci_free_memory(priv);
727	return -1;
728}
729
730int
731islpci_free_memory(islpci_private *priv)
732{
733	int counter;
734
735	if (priv->device_base)
736		iounmap(priv->device_base);
737	priv->device_base = NULL;
738
739	/* free consistent DMA area... */
740	if (priv->driver_mem_address)
741		pci_free_consistent(priv->pdev, HOST_MEM_BLOCK,
742				    priv->driver_mem_address,
743				    priv->device_host_address);
744
745	/* clear some dangling pointers */
746	priv->driver_mem_address = NULL;
747	priv->device_host_address = 0;
748	priv->device_psm_buffer = 0;
749	priv->control_block = NULL;
750
751        /* clean up mgmt rx buffers */
752        for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
753		struct islpci_membuf *buf = &priv->mgmt_rx[counter];
754		if (buf->pci_addr)
755			pci_unmap_single(priv->pdev, buf->pci_addr,
756					 buf->size, PCI_DMA_FROMDEVICE);
757		buf->pci_addr = 0;
758		kfree(buf->mem);
759		buf->size = 0;
760		buf->mem = NULL;
761        }
762
763	/* clean up data rx buffers */
764	for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
765		if (priv->pci_map_rx_address[counter])
766			pci_unmap_single(priv->pdev,
767					 priv->pci_map_rx_address[counter],
768					 MAX_FRAGMENT_SIZE_RX + 2,
769					 PCI_DMA_FROMDEVICE);
770		priv->pci_map_rx_address[counter] = 0;
771
772		if (priv->data_low_rx[counter])
773			dev_kfree_skb(priv->data_low_rx[counter]);
774		priv->data_low_rx[counter] = NULL;
775	}
776
777	/* Free the access control list and the WPA list */
778	prism54_acl_clean(&priv->acl);
779	prism54_wpa_bss_ie_clean(priv);
780	mgt_clean(priv);
781
782	return 0;
783}
784
785#if 0
786static void
787islpci_set_multicast_list(struct net_device *dev)
788{
789	/* put device into promisc mode and let network layer handle it */
790}
791#endif
792
793static void islpci_ethtool_get_drvinfo(struct net_device *dev,
794                                       struct ethtool_drvinfo *info)
795{
796	strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
797	strlcpy(info->version, DRV_VERSION, sizeof(info->version));
798}
799
800static const struct ethtool_ops islpci_ethtool_ops = {
801	.get_drvinfo = islpci_ethtool_get_drvinfo,
802};
803
804static const struct net_device_ops islpci_netdev_ops = {
805	.ndo_open 		= islpci_open,
806	.ndo_stop		= islpci_close,
807	.ndo_start_xmit		= islpci_eth_transmit,
808	.ndo_tx_timeout		= islpci_eth_tx_timeout,
809	.ndo_set_mac_address 	= prism54_set_mac_address,
810	.ndo_change_mtu		= eth_change_mtu,
811	.ndo_validate_addr	= eth_validate_addr,
812};
813
814struct net_device *
815islpci_setup(struct pci_dev *pdev)
816{
817	islpci_private *priv;
818	struct net_device *ndev = alloc_etherdev(sizeof (islpci_private));
819
820	if (!ndev)
821		return ndev;
822
823	pci_set_drvdata(pdev, ndev);
824#if defined(SET_NETDEV_DEV)
825	SET_NETDEV_DEV(ndev, &pdev->dev);
826#endif
827
828	/* setup the structure members */
829	ndev->base_addr = pci_resource_start(pdev, 0);
830	ndev->irq = pdev->irq;
831
832	/* initialize the function pointers */
833	ndev->netdev_ops = &islpci_netdev_ops;
834	ndev->wireless_handlers = &prism54_handler_def;
835	ndev->ethtool_ops = &islpci_ethtool_ops;
836
837	/* ndev->set_multicast_list = &islpci_set_multicast_list; */
838	ndev->addr_len = ETH_ALEN;
839	/* Get a non-zero dummy MAC address for nameif. Jean II */
840	memcpy(ndev->dev_addr, dummy_mac, 6);
841
842	ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT;
843
844	/* allocate a private device structure to the network device  */
845	priv = netdev_priv(ndev);
846	priv->ndev = ndev;
847	priv->pdev = pdev;
848	priv->monitor_type = ARPHRD_IEEE80211;
849	priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ?
850		priv->monitor_type : ARPHRD_ETHER;
851
852	/* Add pointers to enable iwspy support. */
853	priv->wireless_data.spy_data = &priv->spy_data;
854	ndev->wireless_data = &priv->wireless_data;
855
856	/* save the start and end address of the PCI memory area */
857	ndev->mem_start = (unsigned long) priv->device_base;
858	ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE;
859
860#if VERBOSE > SHOW_ERROR_MESSAGES
861	DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base);
862#endif
863
864	init_waitqueue_head(&priv->reset_done);
865
866	/* init the queue read locks, process wait counter */
867	mutex_init(&priv->mgmt_lock);
868	priv->mgmt_received = NULL;
869	init_waitqueue_head(&priv->mgmt_wqueue);
870	mutex_init(&priv->stats_lock);
871	spin_lock_init(&priv->slock);
872
873	/* init state machine with off#1 state */
874	priv->state = PRV_STATE_OFF;
875	priv->state_off = 1;
876
877	/* initialize workqueue's */
878	INIT_WORK(&priv->stats_work, prism54_update_stats);
879	priv->stats_timestamp = 0;
880
881	INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake);
882	priv->reset_task_pending = 0;
883
884	/* allocate various memory areas */
885	if (islpci_alloc_memory(priv))
886		goto do_free_netdev;
887
888	/* select the firmware file depending on the device id */
889	switch (pdev->device) {
890	case 0x3877:
891		strcpy(priv->firmware, ISL3877_IMAGE_FILE);
892		break;
893
894	case 0x3886:
895		strcpy(priv->firmware, ISL3886_IMAGE_FILE);
896		break;
897
898	default:
899		strcpy(priv->firmware, ISL3890_IMAGE_FILE);
900		break;
901	}
902
903	if (register_netdev(ndev)) {
904		DEBUG(SHOW_ERROR_MESSAGES,
905		      "ERROR: register_netdev() failed\n");
906		goto do_islpci_free_memory;
907	}
908
909	return ndev;
910
911      do_islpci_free_memory:
912	islpci_free_memory(priv);
913      do_free_netdev:
914	pci_set_drvdata(pdev, NULL);
915	free_netdev(ndev);
916	priv = NULL;
917	return NULL;
918}
919
920islpci_state_t
921islpci_set_state(islpci_private *priv, islpci_state_t new_state)
922{
923	islpci_state_t old_state;
924
925	/* lock */
926	old_state = priv->state;
927
928	/* this means either a race condition or some serious error in
929	 * the driver code */
930	switch (new_state) {
931	case PRV_STATE_OFF:
932		priv->state_off++;
933	default:
934		priv->state = new_state;
935		break;
936
937	case PRV_STATE_PREBOOT:
938		/* there are actually many off-states, enumerated by
939		 * state_off */
940		if (old_state == PRV_STATE_OFF)
941			priv->state_off--;
942
943		/* only if hw_unavailable is zero now it means we either
944		 * were in off#1 state, or came here from
945		 * somewhere else */
946		if (!priv->state_off)
947			priv->state = new_state;
948		break;
949	}
950#if 0
951	printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n",
952	       priv->ndev->name, old_state, new_state, priv->state_off);
953#endif
954
955	/* invariants */
956	BUG_ON(priv->state_off < 0);
957	BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF));
958	BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF));
959
960	/* unlock */
961	return old_state;
962}
963