islpci_dev.c revision 4a89852c3533c0190cbe6b04b8b5d7bf4f9beea9
1/*
2 *  Copyright (C) 2002 Intersil Americas Inc.
3 *  Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
4 *  Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
5 *
6 *  This program is free software; you can redistribute it and/or modify
7 *  it under the terms of the GNU General Public License as published by
8 *  the Free Software Foundation; either version 2 of the License
9 *
10 *  This program is distributed in the hope that it will be useful,
11 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 *  GNU General Public License for more details.
14 *
15 *  You should have received a copy of the GNU General Public License
16 *  along with this program; if not, write to the Free Software
17 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
18 *
19 */
20
21#include <linux/module.h>
22
23#include <linux/netdevice.h>
24#include <linux/ethtool.h>
25#include <linux/pci.h>
26#include <linux/sched.h>
27#include <linux/etherdevice.h>
28#include <linux/delay.h>
29#include <linux/if_arp.h>
30
31#include <asm/io.h>
32
33#include "prismcompat.h"
34#include "isl_38xx.h"
35#include "isl_ioctl.h"
36#include "islpci_dev.h"
37#include "islpci_mgt.h"
38#include "islpci_eth.h"
39#include "oid_mgt.h"
40
41#define ISL3877_IMAGE_FILE	"isl3877"
42#define ISL3886_IMAGE_FILE	"isl3886"
43#define ISL3890_IMAGE_FILE	"isl3890"
44MODULE_FIRMWARE(ISL3877_IMAGE_FILE);
45MODULE_FIRMWARE(ISL3886_IMAGE_FILE);
46MODULE_FIRMWARE(ISL3890_IMAGE_FILE);
47
48static int prism54_bring_down(islpci_private *);
49static int islpci_alloc_memory(islpci_private *);
50
51/* Temporary dummy MAC address to use until firmware is loaded.
52 * The idea there is that some tools (such as nameif) may query
53 * the MAC address before the netdev is 'open'. By using a valid
54 * OUI prefix, they can process the netdev properly.
55 * Of course, this is not the final/real MAC address. It doesn't
56 * matter, as you are suppose to be able to change it anytime via
57 * ndev->set_mac_address. Jean II */
58static const unsigned char	dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 };
59
60static int
61isl_upload_firmware(islpci_private *priv)
62{
63	u32 reg, rc;
64	void __iomem *device_base = priv->device_base;
65
66	/* clear the RAMBoot and the Reset bit */
67	reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
68	reg &= ~ISL38XX_CTRL_STAT_RESET;
69	reg &= ~ISL38XX_CTRL_STAT_RAMBOOT;
70	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
71	wmb();
72	udelay(ISL38XX_WRITEIO_DELAY);
73
74	/* set the Reset bit without reading the register ! */
75	reg |= ISL38XX_CTRL_STAT_RESET;
76	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
77	wmb();
78	udelay(ISL38XX_WRITEIO_DELAY);
79
80	/* clear the Reset bit */
81	reg &= ~ISL38XX_CTRL_STAT_RESET;
82	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
83	wmb();
84
85	/* wait a while for the device to reboot */
86	mdelay(50);
87
88	{
89		const struct firmware *fw_entry = NULL;
90		long fw_len;
91		const u32 *fw_ptr;
92
93		rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV);
94		if (rc) {
95			printk(KERN_ERR
96			       "%s: request_firmware() failed for '%s'\n",
97			       "prism54", priv->firmware);
98			return rc;
99		}
100		/* prepare the Direct Memory Base register */
101		reg = ISL38XX_DEV_FIRMWARE_ADDRES;
102
103		fw_ptr = (u32 *) fw_entry->data;
104		fw_len = fw_entry->size;
105
106		if (fw_len % 4) {
107			printk(KERN_ERR
108			       "%s: firmware '%s' size is not multiple of 32bit, aborting!\n",
109			       "prism54", priv->firmware);
110			release_firmware(fw_entry);
111			return -EILSEQ; /* Illegal byte sequence  */;
112		}
113
114		while (fw_len > 0) {
115			long _fw_len =
116			    (fw_len >
117			     ISL38XX_MEMORY_WINDOW_SIZE) ?
118			    ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
119			u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
120
121			/* set the card's base address for writing the data */
122			isl38xx_w32_flush(device_base, reg,
123					  ISL38XX_DIR_MEM_BASE_REG);
124			wmb();	/* be paranoid */
125
126			/* increment the write address for next iteration */
127			reg += _fw_len;
128			fw_len -= _fw_len;
129
130			/* write the data to the Direct Memory Window 32bit-wise */
131			/* memcpy_toio() doesn't guarantee 32bit writes :-| */
132			while (_fw_len > 0) {
133				/* use non-swapping writel() */
134				__raw_writel(*fw_ptr, dev_fw_ptr);
135				fw_ptr++, dev_fw_ptr++;
136				_fw_len -= 4;
137			}
138
139			/* flush PCI posting */
140			(void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH);
141			wmb();	/* be paranoid again */
142
143			BUG_ON(_fw_len != 0);
144		}
145
146		BUG_ON(fw_len != 0);
147
148		/* Firmware version is at offset 40 (also for "newmac") */
149		printk(KERN_DEBUG "%s: firmware version: %.8s\n",
150		       priv->ndev->name, fw_entry->data + 40);
151
152		release_firmware(fw_entry);
153	}
154
155	/* now reset the device
156	 * clear the Reset & ClkRun bit, set the RAMBoot bit */
157	reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
158	reg &= ~ISL38XX_CTRL_STAT_CLKRUN;
159	reg &= ~ISL38XX_CTRL_STAT_RESET;
160	reg |= ISL38XX_CTRL_STAT_RAMBOOT;
161	isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG);
162	wmb();
163	udelay(ISL38XX_WRITEIO_DELAY);
164
165	/* set the reset bit latches the host override and RAMBoot bits
166	 * into the device for operation when the reset bit is reset */
167	reg |= ISL38XX_CTRL_STAT_RESET;
168	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
169	/* don't do flush PCI posting here! */
170	wmb();
171	udelay(ISL38XX_WRITEIO_DELAY);
172
173	/* clear the reset bit should start the whole circus */
174	reg &= ~ISL38XX_CTRL_STAT_RESET;
175	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
176	/* don't do flush PCI posting here! */
177	wmb();
178	udelay(ISL38XX_WRITEIO_DELAY);
179
180	return 0;
181}
182
183/******************************************************************************
184    Device Interrupt Handler
185******************************************************************************/
186
187irqreturn_t
188islpci_interrupt(int irq, void *config)
189{
190	u32 reg;
191	islpci_private *priv = config;
192	struct net_device *ndev = priv->ndev;
193	void __iomem *device = priv->device_base;
194	int powerstate = ISL38XX_PSM_POWERSAVE_STATE;
195
196	/* lock the interrupt handler */
197	spin_lock(&priv->slock);
198
199	/* received an interrupt request on a shared IRQ line
200	 * first check whether the device is in sleep mode */
201	reg = readl(device + ISL38XX_CTRL_STAT_REG);
202	if (reg & ISL38XX_CTRL_STAT_SLEEPMODE)
203		/* device is in sleep mode, IRQ was generated by someone else */
204	{
205#if VERBOSE > SHOW_ERROR_MESSAGES
206		DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
207#endif
208		spin_unlock(&priv->slock);
209		return IRQ_NONE;
210	}
211
212
213	/* check whether there is any source of interrupt on the device */
214	reg = readl(device + ISL38XX_INT_IDENT_REG);
215
216	/* also check the contents of the Interrupt Enable Register, because this
217	 * will filter out interrupt sources from other devices on the same irq ! */
218	reg &= readl(device + ISL38XX_INT_EN_REG);
219	reg &= ISL38XX_INT_SOURCES;
220
221	if (reg != 0) {
222		if (islpci_get_state(priv) != PRV_STATE_SLEEP)
223			powerstate = ISL38XX_PSM_ACTIVE_STATE;
224
225		/* reset the request bits in the Identification register */
226		isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG);
227
228#if VERBOSE > SHOW_ERROR_MESSAGES
229		DEBUG(SHOW_FUNCTION_CALLS,
230		      "IRQ: Identification register 0x%p 0x%x\n", device, reg);
231#endif
232
233		/* check for each bit in the register separately */
234		if (reg & ISL38XX_INT_IDENT_UPDATE) {
235#if VERBOSE > SHOW_ERROR_MESSAGES
236			/* Queue has been updated */
237			DEBUG(SHOW_TRACING, "IRQ: Update flag\n");
238
239			DEBUG(SHOW_QUEUE_INDEXES,
240			      "CB drv Qs: [%i][%i][%i][%i][%i][%i]\n",
241			      le32_to_cpu(priv->control_block->
242					  driver_curr_frag[0]),
243			      le32_to_cpu(priv->control_block->
244					  driver_curr_frag[1]),
245			      le32_to_cpu(priv->control_block->
246					  driver_curr_frag[2]),
247			      le32_to_cpu(priv->control_block->
248					  driver_curr_frag[3]),
249			      le32_to_cpu(priv->control_block->
250					  driver_curr_frag[4]),
251			      le32_to_cpu(priv->control_block->
252					  driver_curr_frag[5])
253			    );
254
255			DEBUG(SHOW_QUEUE_INDEXES,
256			      "CB dev Qs: [%i][%i][%i][%i][%i][%i]\n",
257			      le32_to_cpu(priv->control_block->
258					  device_curr_frag[0]),
259			      le32_to_cpu(priv->control_block->
260					  device_curr_frag[1]),
261			      le32_to_cpu(priv->control_block->
262					  device_curr_frag[2]),
263			      le32_to_cpu(priv->control_block->
264					  device_curr_frag[3]),
265			      le32_to_cpu(priv->control_block->
266					  device_curr_frag[4]),
267			      le32_to_cpu(priv->control_block->
268					  device_curr_frag[5])
269			    );
270#endif
271
272			/* cleanup the data low transmit queue */
273			islpci_eth_cleanup_transmit(priv, priv->control_block);
274
275			/* device is in active state, update the
276			 * powerstate flag if necessary */
277			powerstate = ISL38XX_PSM_ACTIVE_STATE;
278
279			/* check all three queues in priority order
280			 * call the PIMFOR receive function until the
281			 * queue is empty */
282			if (isl38xx_in_queue(priv->control_block,
283						ISL38XX_CB_RX_MGMTQ) != 0) {
284#if VERBOSE > SHOW_ERROR_MESSAGES
285				DEBUG(SHOW_TRACING,
286				      "Received frame in Management Queue\n");
287#endif
288				islpci_mgt_receive(ndev);
289
290				islpci_mgt_cleanup_transmit(ndev);
291
292				/* Refill slots in receive queue */
293				islpci_mgmt_rx_fill(ndev);
294
295				/* no need to trigger the device, next
296                                   islpci_mgt_transaction does it */
297			}
298
299			while (isl38xx_in_queue(priv->control_block,
300						ISL38XX_CB_RX_DATA_LQ) != 0) {
301#if VERBOSE > SHOW_ERROR_MESSAGES
302				DEBUG(SHOW_TRACING,
303				      "Received frame in Data Low Queue\n");
304#endif
305				islpci_eth_receive(priv);
306			}
307
308			/* check whether the data transmit queues were full */
309			if (priv->data_low_tx_full) {
310				/* check whether the transmit is not full anymore */
311				if (ISL38XX_CB_TX_QSIZE -
312				    isl38xx_in_queue(priv->control_block,
313						     ISL38XX_CB_TX_DATA_LQ) >=
314				    ISL38XX_MIN_QTHRESHOLD) {
315					/* nope, the driver is ready for more network frames */
316					netif_wake_queue(priv->ndev);
317
318					/* reset the full flag */
319					priv->data_low_tx_full = 0;
320				}
321			}
322		}
323
324		if (reg & ISL38XX_INT_IDENT_INIT) {
325			/* Device has been initialized */
326#if VERBOSE > SHOW_ERROR_MESSAGES
327			DEBUG(SHOW_TRACING,
328			      "IRQ: Init flag, device initialized\n");
329#endif
330			wake_up(&priv->reset_done);
331		}
332
333		if (reg & ISL38XX_INT_IDENT_SLEEP) {
334			/* Device intends to move to powersave state */
335#if VERBOSE > SHOW_ERROR_MESSAGES
336			DEBUG(SHOW_TRACING, "IRQ: Sleep flag\n");
337#endif
338			isl38xx_handle_sleep_request(priv->control_block,
339						     &powerstate,
340						     priv->device_base);
341		}
342
343		if (reg & ISL38XX_INT_IDENT_WAKEUP) {
344			/* Device has been woken up to active state */
345#if VERBOSE > SHOW_ERROR_MESSAGES
346			DEBUG(SHOW_TRACING, "IRQ: Wakeup flag\n");
347#endif
348
349			isl38xx_handle_wakeup(priv->control_block,
350					      &powerstate, priv->device_base);
351		}
352	} else {
353#if VERBOSE > SHOW_ERROR_MESSAGES
354		DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
355#endif
356		spin_unlock(&priv->slock);
357		return IRQ_NONE;
358	}
359
360	/* sleep -> ready */
361	if (islpci_get_state(priv) == PRV_STATE_SLEEP
362	    && powerstate == ISL38XX_PSM_ACTIVE_STATE)
363		islpci_set_state(priv, PRV_STATE_READY);
364
365	/* !sleep -> sleep */
366	if (islpci_get_state(priv) != PRV_STATE_SLEEP
367	    && powerstate == ISL38XX_PSM_POWERSAVE_STATE)
368		islpci_set_state(priv, PRV_STATE_SLEEP);
369
370	/* unlock the interrupt handler */
371	spin_unlock(&priv->slock);
372
373	return IRQ_HANDLED;
374}
375
376/******************************************************************************
377    Network Interface Control & Statistical functions
378******************************************************************************/
379static int
380islpci_open(struct net_device *ndev)
381{
382	u32 rc;
383	islpci_private *priv = netdev_priv(ndev);
384
385	/* reset data structures, upload firmware and reset device */
386	rc = islpci_reset(priv,1);
387	if (rc) {
388		prism54_bring_down(priv);
389		return rc; /* Returns informative message */
390	}
391
392	netif_start_queue(ndev);
393
394	/* Turn off carrier if in STA or Ad-hoc mode. It will be turned on
395	 * once the firmware receives a trap of being associated
396	 * (GEN_OID_LINKSTATE). In other modes (AP or WDS or monitor) we
397	 * should just leave the carrier on as its expected the firmware
398	 * won't send us a trigger. */
399	if (priv->iw_mode == IW_MODE_INFRA || priv->iw_mode == IW_MODE_ADHOC)
400		netif_carrier_off(ndev);
401	else
402		netif_carrier_on(ndev);
403
404	return 0;
405}
406
407static int
408islpci_close(struct net_device *ndev)
409{
410	islpci_private *priv = netdev_priv(ndev);
411
412	printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name);
413
414	netif_stop_queue(ndev);
415
416	return prism54_bring_down(priv);
417}
418
419static int
420prism54_bring_down(islpci_private *priv)
421{
422	void __iomem *device_base = priv->device_base;
423	u32 reg;
424	/* we are going to shutdown the device */
425	islpci_set_state(priv, PRV_STATE_PREBOOT);
426
427	/* disable all device interrupts in case they weren't */
428	isl38xx_disable_interrupts(priv->device_base);
429
430	/* For safety reasons, we may want to ensure that no DMA transfer is
431	 * currently in progress by emptying the TX and RX queues. */
432
433	/* wait until interrupts have finished executing on other CPUs */
434	synchronize_irq(priv->pdev->irq);
435
436	reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
437	reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT);
438	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
439	wmb();
440	udelay(ISL38XX_WRITEIO_DELAY);
441
442	reg |= ISL38XX_CTRL_STAT_RESET;
443	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
444	wmb();
445	udelay(ISL38XX_WRITEIO_DELAY);
446
447	/* clear the Reset bit */
448	reg &= ~ISL38XX_CTRL_STAT_RESET;
449	writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
450	wmb();
451
452	/* wait a while for the device to reset */
453	schedule_timeout_uninterruptible(msecs_to_jiffies(50));
454
455	return 0;
456}
457
458static int
459islpci_upload_fw(islpci_private *priv)
460{
461	islpci_state_t old_state;
462	u32 rc;
463
464	old_state = islpci_set_state(priv, PRV_STATE_BOOT);
465
466	printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name);
467
468	rc = isl_upload_firmware(priv);
469	if (rc) {
470		/* error uploading the firmware */
471		printk(KERN_ERR "%s: could not upload firmware ('%s')\n",
472		       priv->ndev->name, priv->firmware);
473
474		islpci_set_state(priv, old_state);
475		return rc;
476	}
477
478	printk(KERN_DEBUG "%s: firmware upload complete\n",
479	       priv->ndev->name);
480
481	islpci_set_state(priv, PRV_STATE_POSTBOOT);
482
483	return 0;
484}
485
486static int
487islpci_reset_if(islpci_private *priv)
488{
489	long remaining;
490	int result = -ETIME;
491	int count;
492
493	DEFINE_WAIT(wait);
494	prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE);
495
496	/* now the last step is to reset the interface */
497	isl38xx_interface_reset(priv->device_base, priv->device_host_address);
498	islpci_set_state(priv, PRV_STATE_PREINIT);
499
500        for(count = 0; count < 2 && result; count++) {
501		/* The software reset acknowledge needs about 220 msec here.
502		 * Be conservative and wait for up to one second. */
503
504		remaining = schedule_timeout_uninterruptible(HZ);
505
506		if(remaining > 0) {
507			result = 0;
508			break;
509		}
510
511		/* If we're here it's because our IRQ hasn't yet gone through.
512		 * Retry a bit more...
513		 */
514		printk(KERN_ERR "%s: no 'reset complete' IRQ seen - retrying\n",
515			priv->ndev->name);
516	}
517
518	finish_wait(&priv->reset_done, &wait);
519
520	if (result) {
521		printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
522		return result;
523	}
524
525	islpci_set_state(priv, PRV_STATE_INIT);
526
527	/* Now that the device is 100% up, let's allow
528	 * for the other interrupts --
529	 * NOTE: this is not *yet* true since we've only allowed the
530	 * INIT interrupt on the IRQ line. We can perhaps poll
531	 * the IRQ line until we know for sure the reset went through */
532	isl38xx_enable_common_interrupts(priv->device_base);
533
534	down_write(&priv->mib_sem);
535	result = mgt_commit(priv);
536	if (result) {
537		printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
538		up_write(&priv->mib_sem);
539		return result;
540	}
541	up_write(&priv->mib_sem);
542
543	islpci_set_state(priv, PRV_STATE_READY);
544
545	printk(KERN_DEBUG "%s: interface reset complete\n", priv->ndev->name);
546	return 0;
547}
548
549int
550islpci_reset(islpci_private *priv, int reload_firmware)
551{
552	isl38xx_control_block *cb =    /* volatile not needed */
553		(isl38xx_control_block *) priv->control_block;
554	unsigned counter;
555	int rc;
556
557	if (reload_firmware)
558		islpci_set_state(priv, PRV_STATE_PREBOOT);
559	else
560		islpci_set_state(priv, PRV_STATE_POSTBOOT);
561
562	printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name);
563
564	/* disable all device interrupts in case they weren't */
565	isl38xx_disable_interrupts(priv->device_base);
566
567	/* flush all management queues */
568	priv->index_mgmt_tx = 0;
569	priv->index_mgmt_rx = 0;
570
571	/* clear the indexes in the frame pointer */
572	for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
573		cb->driver_curr_frag[counter] = cpu_to_le32(0);
574		cb->device_curr_frag[counter] = cpu_to_le32(0);
575	}
576
577	/* reset the mgmt receive queue */
578	for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
579		isl38xx_fragment *frag = &cb->rx_data_mgmt[counter];
580		frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
581		frag->flags = 0;
582		frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr);
583	}
584
585	for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
586		cb->rx_data_low[counter].address =
587		    cpu_to_le32((u32) priv->pci_map_rx_address[counter]);
588	}
589
590	/* since the receive queues are filled with empty fragments, now we can
591	 * set the corresponding indexes in the Control Block */
592	priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] =
593	    cpu_to_le32(ISL38XX_CB_RX_QSIZE);
594	priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] =
595	    cpu_to_le32(ISL38XX_CB_MGMT_QSIZE);
596
597	/* reset the remaining real index registers and full flags */
598	priv->free_data_rx = 0;
599	priv->free_data_tx = 0;
600	priv->data_low_tx_full = 0;
601
602	if (reload_firmware) { /* Should we load the firmware ? */
603	/* now that the data structures are cleaned up, upload
604	 * firmware and reset interface */
605		rc = islpci_upload_fw(priv);
606		if (rc) {
607			printk(KERN_ERR "%s: islpci_reset: failure\n",
608				priv->ndev->name);
609			return rc;
610		}
611	}
612
613	/* finally reset interface */
614	rc = islpci_reset_if(priv);
615	if (rc)
616		printk(KERN_ERR "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n");
617	return rc;
618}
619
620/******************************************************************************
621    Network device configuration functions
622******************************************************************************/
623static int
624islpci_alloc_memory(islpci_private *priv)
625{
626	int counter;
627
628#if VERBOSE > SHOW_ERROR_MESSAGES
629	printk(KERN_DEBUG "islpci_alloc_memory\n");
630#endif
631
632	/* remap the PCI device base address to accessable */
633	if (!(priv->device_base =
634	      ioremap(pci_resource_start(priv->pdev, 0),
635		      ISL38XX_PCI_MEM_SIZE))) {
636		/* error in remapping the PCI device memory address range */
637		printk(KERN_ERR "PCI memory remapping failed\n");
638		return -1;
639	}
640
641	/* memory layout for consistent DMA region:
642	 *
643	 * Area 1: Control Block for the device interface
644	 * Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that
645	 *         the number of supported stations in the AP determines the minimal
646	 *         size of the buffer !
647	 */
648
649	/* perform the allocation */
650	priv->driver_mem_address = pci_alloc_consistent(priv->pdev,
651							HOST_MEM_BLOCK,
652							&priv->
653							device_host_address);
654
655	if (!priv->driver_mem_address) {
656		/* error allocating the block of PCI memory */
657		printk(KERN_ERR "%s: could not allocate DMA memory, aborting!",
658		       "prism54");
659		return -1;
660	}
661
662	/* assign the Control Block to the first address of the allocated area */
663	priv->control_block =
664	    (isl38xx_control_block *) priv->driver_mem_address;
665
666	/* set the Power Save Buffer pointer directly behind the CB */
667	priv->device_psm_buffer =
668		priv->device_host_address + CONTROL_BLOCK_SIZE;
669
670	/* make sure all buffer pointers are initialized */
671	for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
672		priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0);
673		priv->control_block->device_curr_frag[counter] = cpu_to_le32(0);
674	}
675
676	priv->index_mgmt_rx = 0;
677	memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx));
678	memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx));
679
680	/* allocate rx queue for management frames */
681	if (islpci_mgmt_rx_fill(priv->ndev) < 0)
682		goto out_free;
683
684	/* now get the data rx skb's */
685	memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx));
686	memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address));
687
688	for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
689		struct sk_buff *skb;
690
691		/* allocate an sk_buff for received data frames storage
692		 * each frame on receive size consists of 1 fragment
693		 * include any required allignment operations */
694		if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) {
695			/* error allocating an sk_buff structure elements */
696			printk(KERN_ERR "Error allocating skb.\n");
697			skb = NULL;
698			goto out_free;
699		}
700		skb_reserve(skb, (4 - (long) skb->data) & 0x03);
701		/* add the new allocated sk_buff to the buffer array */
702		priv->data_low_rx[counter] = skb;
703
704		/* map the allocated skb data area to pci */
705		priv->pci_map_rx_address[counter] =
706		    pci_map_single(priv->pdev, (void *) skb->data,
707				   MAX_FRAGMENT_SIZE_RX + 2,
708				   PCI_DMA_FROMDEVICE);
709		if (!priv->pci_map_rx_address[counter]) {
710			/* error mapping the buffer to device
711			   accessable memory address */
712			printk(KERN_ERR "failed to map skb DMA'able\n");
713			goto out_free;
714		}
715	}
716
717	prism54_acl_init(&priv->acl);
718	prism54_wpa_bss_ie_init(priv);
719	if (mgt_init(priv))
720		goto out_free;
721
722	return 0;
723 out_free:
724	islpci_free_memory(priv);
725	return -1;
726}
727
728int
729islpci_free_memory(islpci_private *priv)
730{
731	int counter;
732
733	if (priv->device_base)
734		iounmap(priv->device_base);
735	priv->device_base = NULL;
736
737	/* free consistent DMA area... */
738	if (priv->driver_mem_address)
739		pci_free_consistent(priv->pdev, HOST_MEM_BLOCK,
740				    priv->driver_mem_address,
741				    priv->device_host_address);
742
743	/* clear some dangling pointers */
744	priv->driver_mem_address = NULL;
745	priv->device_host_address = 0;
746	priv->device_psm_buffer = 0;
747	priv->control_block = NULL;
748
749        /* clean up mgmt rx buffers */
750        for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
751		struct islpci_membuf *buf = &priv->mgmt_rx[counter];
752		if (buf->pci_addr)
753			pci_unmap_single(priv->pdev, buf->pci_addr,
754					 buf->size, PCI_DMA_FROMDEVICE);
755		buf->pci_addr = 0;
756		kfree(buf->mem);
757		buf->size = 0;
758		buf->mem = NULL;
759        }
760
761	/* clean up data rx buffers */
762	for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
763		if (priv->pci_map_rx_address[counter])
764			pci_unmap_single(priv->pdev,
765					 priv->pci_map_rx_address[counter],
766					 MAX_FRAGMENT_SIZE_RX + 2,
767					 PCI_DMA_FROMDEVICE);
768		priv->pci_map_rx_address[counter] = 0;
769
770		if (priv->data_low_rx[counter])
771			dev_kfree_skb(priv->data_low_rx[counter]);
772		priv->data_low_rx[counter] = NULL;
773	}
774
775	/* Free the acces control list and the WPA list */
776	prism54_acl_clean(&priv->acl);
777	prism54_wpa_bss_ie_clean(priv);
778	mgt_clean(priv);
779
780	return 0;
781}
782
783#if 0
784static void
785islpci_set_multicast_list(struct net_device *dev)
786{
787	/* put device into promisc mode and let network layer handle it */
788}
789#endif
790
791static void islpci_ethtool_get_drvinfo(struct net_device *dev,
792                                       struct ethtool_drvinfo *info)
793{
794	strcpy(info->driver, DRV_NAME);
795	strcpy(info->version, DRV_VERSION);
796}
797
798static const struct ethtool_ops islpci_ethtool_ops = {
799	.get_drvinfo = islpci_ethtool_get_drvinfo,
800};
801
802static const struct net_device_ops islpci_netdev_ops = {
803	.ndo_open 		= islpci_open,
804	.ndo_stop		= islpci_close,
805	.ndo_do_ioctl		= prism54_ioctl,
806	.ndo_start_xmit		= islpci_eth_transmit,
807	.ndo_tx_timeout		= islpci_eth_tx_timeout,
808	.ndo_set_mac_address 	= prism54_set_mac_address,
809	.ndo_change_mtu		= eth_change_mtu,
810	.ndo_validate_addr	= eth_validate_addr,
811};
812
813struct net_device *
814islpci_setup(struct pci_dev *pdev)
815{
816	islpci_private *priv;
817	struct net_device *ndev = alloc_etherdev(sizeof (islpci_private));
818
819	if (!ndev)
820		return ndev;
821
822	pci_set_drvdata(pdev, ndev);
823#if defined(SET_NETDEV_DEV)
824	SET_NETDEV_DEV(ndev, &pdev->dev);
825#endif
826
827	/* setup the structure members */
828	ndev->base_addr = pci_resource_start(pdev, 0);
829	ndev->irq = pdev->irq;
830
831	/* initialize the function pointers */
832	ndev->netdev_ops = &islpci_netdev_ops;
833	ndev->wireless_handlers = &prism54_handler_def;
834	ndev->ethtool_ops = &islpci_ethtool_ops;
835
836	/* ndev->set_multicast_list = &islpci_set_multicast_list; */
837	ndev->addr_len = ETH_ALEN;
838	/* Get a non-zero dummy MAC address for nameif. Jean II */
839	memcpy(ndev->dev_addr, dummy_mac, 6);
840
841	ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT;
842
843	/* allocate a private device structure to the network device  */
844	priv = netdev_priv(ndev);
845	priv->ndev = ndev;
846	priv->pdev = pdev;
847	priv->monitor_type = ARPHRD_IEEE80211;
848	priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ?
849		priv->monitor_type : ARPHRD_ETHER;
850
851	/* Add pointers to enable iwspy support. */
852	priv->wireless_data.spy_data = &priv->spy_data;
853	ndev->wireless_data = &priv->wireless_data;
854
855	/* save the start and end address of the PCI memory area */
856	ndev->mem_start = (unsigned long) priv->device_base;
857	ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE;
858
859#if VERBOSE > SHOW_ERROR_MESSAGES
860	DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base);
861#endif
862
863	init_waitqueue_head(&priv->reset_done);
864
865	/* init the queue read locks, process wait counter */
866	mutex_init(&priv->mgmt_lock);
867	priv->mgmt_received = NULL;
868	init_waitqueue_head(&priv->mgmt_wqueue);
869	mutex_init(&priv->stats_lock);
870	spin_lock_init(&priv->slock);
871
872	/* init state machine with off#1 state */
873	priv->state = PRV_STATE_OFF;
874	priv->state_off = 1;
875
876	/* initialize workqueue's */
877	INIT_WORK(&priv->stats_work, prism54_update_stats);
878	priv->stats_timestamp = 0;
879
880	INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake);
881	priv->reset_task_pending = 0;
882
883	/* allocate various memory areas */
884	if (islpci_alloc_memory(priv))
885		goto do_free_netdev;
886
887	/* select the firmware file depending on the device id */
888	switch (pdev->device) {
889	case 0x3877:
890		strcpy(priv->firmware, ISL3877_IMAGE_FILE);
891		break;
892
893	case 0x3886:
894		strcpy(priv->firmware, ISL3886_IMAGE_FILE);
895		break;
896
897	default:
898		strcpy(priv->firmware, ISL3890_IMAGE_FILE);
899		break;
900	}
901
902	if (register_netdev(ndev)) {
903		DEBUG(SHOW_ERROR_MESSAGES,
904		      "ERROR: register_netdev() failed\n");
905		goto do_islpci_free_memory;
906	}
907
908	return ndev;
909
910      do_islpci_free_memory:
911	islpci_free_memory(priv);
912      do_free_netdev:
913	pci_set_drvdata(pdev, NULL);
914	free_netdev(ndev);
915	priv = NULL;
916	return NULL;
917}
918
919islpci_state_t
920islpci_set_state(islpci_private *priv, islpci_state_t new_state)
921{
922	islpci_state_t old_state;
923
924	/* lock */
925	old_state = priv->state;
926
927	/* this means either a race condition or some serious error in
928	 * the driver code */
929	switch (new_state) {
930	case PRV_STATE_OFF:
931		priv->state_off++;
932	default:
933		priv->state = new_state;
934		break;
935
936	case PRV_STATE_PREBOOT:
937		/* there are actually many off-states, enumerated by
938		 * state_off */
939		if (old_state == PRV_STATE_OFF)
940			priv->state_off--;
941
942		/* only if hw_unavailable is zero now it means we either
943		 * were in off#1 state, or came here from
944		 * somewhere else */
945		if (!priv->state_off)
946			priv->state = new_state;
947		break;
948	};
949#if 0
950	printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n",
951	       priv->ndev->name, old_state, new_state, priv->state_off);
952#endif
953
954	/* invariants */
955	BUG_ON(priv->state_off < 0);
956	BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF));
957	BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF));
958
959	/* unlock */
960	return old_state;
961}
962