1/******************************************************************************
2 *
3 * Copyright(c) 2009-2012  Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30#ifndef __RTL92D__FW__H__
31#define __RTL92D__FW__H__
32
33#define FW_8192D_START_ADDRESS			0x1000
34#define FW_8192D_PAGE_SIZE				4096
35#define FW_8192D_POLLING_TIMEOUT_COUNT	1000
36
37#define IS_FW_HEADER_EXIST(_pfwhdr)	\
38		((GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x92C0 || \
39		(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x88C0 ||  \
40		(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D0 ||  \
41		(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D1 ||  \
42		(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D2 ||  \
43		(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D3)
44
45/* Define a macro that takes an le32 word, converts it to host ordering,
46 * right shifts by a specified count, creates a mask of the specified
47 * bit count, and extracts that number of bits.
48 */
49
50#define SHIFT_AND_MASK_LE(__pdesc, __shift, __mask)		\
51	((le32_to_cpu(*(((__le32 *)(__pdesc)))) >> (__shift)) &	\
52	BIT_LEN_MASK_32(__mask))
53
54/* Firmware Header(8-byte alinment required) */
55/* --- LONG WORD 0 ---- */
56#define GET_FIRMWARE_HDR_SIGNATURE(__fwhdr)		\
57	SHIFT_AND_MASK_LE(__fwhdr, 0, 16)
58#define GET_FIRMWARE_HDR_CATEGORY(__fwhdr)		\
59	SHIFT_AND_MASK_LE(__fwhdr, 16, 8)
60#define GET_FIRMWARE_HDR_FUNCTION(__fwhdr)		\
61	SHIFT_AND_MASK_LE(__fwhdr, 24, 8)
62#define GET_FIRMWARE_HDR_VERSION(__fwhdr)		\
63	SHIFT_AND_MASK_LE(__fwhdr + 4, 0, 16)
64#define GET_FIRMWARE_HDR_SUB_VER(__fwhdr)		\
65	SHIFT_AND_MASK_LE(__fwhdr + 4, 16, 8)
66#define GET_FIRMWARE_HDR_RSVD1(__fwhdr)			\
67	SHIFT_AND_MASK_LE(__fwhdr + 4, 24, 8)
68
69/* --- LONG WORD 1 ---- */
70#define GET_FIRMWARE_HDR_MONTH(__fwhdr)			\
71	SHIFT_AND_MASK_LE(__fwhdr + 8, 0, 8)
72#define GET_FIRMWARE_HDR_DATE(__fwhdr)			\
73	SHIFT_AND_MASK_LE(__fwhdr + 8, 8, 8)
74#define GET_FIRMWARE_HDR_HOUR(__fwhdr)			\
75	SHIFT_AND_MASK_LE(__fwhdr + 8, 16, 8)
76#define GET_FIRMWARE_HDR_MINUTE(__fwhdr)		\
77	SHIFT_AND_MASK_LE(__fwhdr + 8, 24, 8)
78#define GET_FIRMWARE_HDR_ROMCODE_SIZE(__fwhdr)		\
79	SHIFT_AND_MASK_LE(__fwhdr + 12, 0, 16)
80#define GET_FIRMWARE_HDR_RSVD2(__fwhdr)			\
81	SHIFT_AND_MASK_LE(__fwhdr + 12, 16, 16)
82
83/* --- LONG WORD 2 ---- */
84#define GET_FIRMWARE_HDR_SVN_IDX(__fwhdr)		\
85	SHIFT_AND_MASK_LE(__fwhdr + 16, 0, 32)
86#define GET_FIRMWARE_HDR_RSVD3(__fwhdr)			\
87	SHIFT_AND_MASK_LE(__fwhdr + 20, 0, 32)
88
89/* --- LONG WORD 3 ---- */
90#define GET_FIRMWARE_HDR_RSVD4(__fwhdr)			\
91	SHIFT_AND_MASK_LE(__fwhdr + 24, 0, 32)
92#define GET_FIRMWARE_HDR_RSVD5(__fwhdr)			\
93	SHIFT_AND_MASK_LE(__fwhdr + 28, 0, 32)
94
95#define pagenum_128(_len) \
96	(u32)(((_len) >> 7) + ((_len) & 0x7F ? 1 : 0))
97
98#define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val)		\
99	SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
100#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val)	\
101	SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 0, 8, __val)
102#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__ph2ccmd, __val)	\
103	SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 2, 0, 8, __val)
104#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val)	\
105	SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
106#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val)	\
107	SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
108#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val)	\
109	SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 0, 8, __val)
110#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val)	\
111	SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 2, 0, 8, __val)
112
113struct rtl92d_firmware_header {
114	u16 signature;
115	u8 category;
116	u8 function;
117	u16 version;
118	u8 subversion;
119	u8 rsvd1;
120
121	u8 month;
122	u8 date;
123	u8 hour;
124	u8 minute;
125	u16 ramcodeSize;
126	u16 rsvd2;
127
128	u32 svnindex;
129	u32 rsvd3;
130
131	u32 rsvd4;
132	u32 rsvd5;
133};
134
135enum rtl8192d_h2c_cmd {
136	H2C_AP_OFFLOAD = 0,
137	H2C_SETPWRMODE = 1,
138	H2C_JOINBSSRPT = 2,
139	H2C_RSVDPAGE = 3,
140	H2C_RSSI_REPORT = 5,
141	H2C_RA_MASK = 6,
142	H2C_MAC_MODE_SEL = 9,
143	H2C_PWRM = 15,
144	MAX_H2CCMD
145};
146
147int rtl92d_download_fw(struct ieee80211_hw *hw);
148void rtl92d_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
149			 u32 cmd_len, u8 *p_cmdbuffer);
150void rtl92d_firmware_selfreset(struct ieee80211_hw *hw);
151void rtl92d_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
152void rtl92d_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
153void rtl92d_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
154
155#endif
156