1/* 2 * Compaq Hot Plug Controller Driver 3 * 4 * Copyright (C) 1995,2001 Compaq Computer Corporation 5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com> 6 * Copyright (C) 2001 IBM Corp. 7 * 8 * All rights reserved. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or (at 13 * your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 18 * NON INFRINGEMENT. See the GNU General Public License for more 19 * details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 25 * Send feedback to <greg@kroah.com> 26 * 27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support, 28 * Torben Mathiasen <torben.mathiasen@hp.com> 29 */ 30 31#include <linux/module.h> 32#include <linux/moduleparam.h> 33#include <linux/kernel.h> 34#include <linux/types.h> 35#include <linux/proc_fs.h> 36#include <linux/slab.h> 37#include <linux/workqueue.h> 38#include <linux/pci.h> 39#include <linux/pci_hotplug.h> 40#include <linux/init.h> 41#include <linux/interrupt.h> 42 43#include <asm/uaccess.h> 44 45#include "cpqphp.h" 46#include "cpqphp_nvram.h" 47 48 49/* Global variables */ 50int cpqhp_debug; 51int cpqhp_legacy_mode; 52struct controller *cpqhp_ctrl_list; /* = NULL */ 53struct pci_func *cpqhp_slot_list[256]; 54struct irq_routing_table *cpqhp_routing_table; 55 56/* local variables */ 57static void __iomem *smbios_table; 58static void __iomem *smbios_start; 59static void __iomem *cpqhp_rom_start; 60static bool power_mode; 61static bool debug; 62static int initialized; 63 64#define DRIVER_VERSION "0.9.8" 65#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>" 66#define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver" 67 68MODULE_AUTHOR(DRIVER_AUTHOR); 69MODULE_DESCRIPTION(DRIVER_DESC); 70MODULE_LICENSE("GPL"); 71 72module_param(power_mode, bool, 0644); 73MODULE_PARM_DESC(power_mode, "Power mode enabled or not"); 74 75module_param(debug, bool, 0644); 76MODULE_PARM_DESC(debug, "Debugging mode enabled or not"); 77 78#define CPQHPC_MODULE_MINOR 208 79 80static inline int is_slot64bit(struct slot *slot) 81{ 82 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0; 83} 84 85static inline int is_slot66mhz(struct slot *slot) 86{ 87 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0; 88} 89 90/** 91 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region. 92 * @begin: begin pointer for region to be scanned. 93 * @end: end pointer for region to be scanned. 94 * 95 * Returns pointer to the head of the SMBIOS tables (or %NULL). 96 */ 97static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end) 98{ 99 void __iomem *fp; 100 void __iomem *endp; 101 u8 temp1, temp2, temp3, temp4; 102 int status = 0; 103 104 endp = (end - sizeof(u32) + 1); 105 106 for (fp = begin; fp <= endp; fp += 16) { 107 temp1 = readb(fp); 108 temp2 = readb(fp+1); 109 temp3 = readb(fp+2); 110 temp4 = readb(fp+3); 111 if (temp1 == '_' && 112 temp2 == 'S' && 113 temp3 == 'M' && 114 temp4 == '_') { 115 status = 1; 116 break; 117 } 118 } 119 120 if (!status) 121 fp = NULL; 122 123 dbg("Discovered SMBIOS Entry point at %p\n", fp); 124 125 return fp; 126} 127 128/** 129 * init_SERR - Initializes the per slot SERR generation. 130 * @ctrl: controller to use 131 * 132 * For unexpected switch opens 133 */ 134static int init_SERR(struct controller * ctrl) 135{ 136 u32 tempdword; 137 u32 number_of_slots; 138 u8 physical_slot; 139 140 if (!ctrl) 141 return 1; 142 143 tempdword = ctrl->first_slot; 144 145 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 146 /* Loop through slots */ 147 while (number_of_slots) { 148 physical_slot = tempdword; 149 writeb(0, ctrl->hpc_reg + SLOT_SERR); 150 tempdword++; 151 number_of_slots--; 152 } 153 154 return 0; 155} 156 157static int init_cpqhp_routing_table(void) 158{ 159 int len; 160 161 cpqhp_routing_table = pcibios_get_irq_routing_table(); 162 if (cpqhp_routing_table == NULL) 163 return -ENOMEM; 164 165 len = cpqhp_routing_table_length(); 166 if (len == 0) { 167 kfree(cpqhp_routing_table); 168 cpqhp_routing_table = NULL; 169 return -1; 170 } 171 172 return 0; 173} 174 175/* nice debugging output */ 176static void pci_print_IRQ_route(void) 177{ 178 int len; 179 int loop; 180 u8 tbus, tdevice, tslot; 181 182 len = cpqhp_routing_table_length(); 183 184 dbg("bus dev func slot\n"); 185 for (loop = 0; loop < len; ++loop) { 186 tbus = cpqhp_routing_table->slots[loop].bus; 187 tdevice = cpqhp_routing_table->slots[loop].devfn; 188 tslot = cpqhp_routing_table->slots[loop].slot; 189 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot); 190 191 } 192 return; 193} 194 195 196/** 197 * get_subsequent_smbios_entry: get the next entry from bios table. 198 * @smbios_start: where to start in the SMBIOS table 199 * @smbios_table: location of the SMBIOS table 200 * @curr: %NULL or pointer to previously returned structure 201 * 202 * Gets the first entry if previous == NULL; 203 * otherwise, returns the next entry. 204 * Uses global SMBIOS Table pointer. 205 * 206 * Returns a pointer to an SMBIOS structure or NULL if none found. 207 */ 208static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start, 209 void __iomem *smbios_table, 210 void __iomem *curr) 211{ 212 u8 bail = 0; 213 u8 previous_byte = 1; 214 void __iomem *p_temp; 215 void __iomem *p_max; 216 217 if (!smbios_table || !curr) 218 return NULL; 219 220 /* set p_max to the end of the table */ 221 p_max = smbios_start + readw(smbios_table + ST_LENGTH); 222 223 p_temp = curr; 224 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH); 225 226 while ((p_temp < p_max) && !bail) { 227 /* Look for the double NULL terminator 228 * The first condition is the previous byte 229 * and the second is the curr 230 */ 231 if (!previous_byte && !(readb(p_temp))) 232 bail = 1; 233 234 previous_byte = readb(p_temp); 235 p_temp++; 236 } 237 238 if (p_temp < p_max) 239 return p_temp; 240 else 241 return NULL; 242} 243 244 245/** 246 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL 247 * @smbios_start: where to start in the SMBIOS table 248 * @smbios_table: location of the SMBIOS table 249 * @type: SMBIOS structure type to be returned 250 * @previous: %NULL or pointer to previously returned structure 251 * 252 * Gets the first entry of the specified type if previous == %NULL; 253 * Otherwise, returns the next entry of the given type. 254 * Uses global SMBIOS Table pointer. 255 * Uses get_subsequent_smbios_entry. 256 * 257 * Returns a pointer to an SMBIOS structure or %NULL if none found. 258 */ 259static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start, 260 void __iomem *smbios_table, 261 u8 type, 262 void __iomem *previous) 263{ 264 if (!smbios_table) 265 return NULL; 266 267 if (!previous) 268 previous = smbios_start; 269 else 270 previous = get_subsequent_smbios_entry(smbios_start, 271 smbios_table, previous); 272 273 while (previous) 274 if (readb(previous + SMBIOS_GENERIC_TYPE) != type) 275 previous = get_subsequent_smbios_entry(smbios_start, 276 smbios_table, previous); 277 else 278 break; 279 280 return previous; 281} 282 283static void release_slot(struct hotplug_slot *hotplug_slot) 284{ 285 struct slot *slot = hotplug_slot->private; 286 287 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 288 289 kfree(slot->hotplug_slot->info); 290 kfree(slot->hotplug_slot); 291 kfree(slot); 292} 293 294static int ctrl_slot_cleanup (struct controller * ctrl) 295{ 296 struct slot *old_slot, *next_slot; 297 298 old_slot = ctrl->slot; 299 ctrl->slot = NULL; 300 301 while (old_slot) { 302 /* memory will be freed by the release_slot callback */ 303 next_slot = old_slot->next; 304 pci_hp_deregister (old_slot->hotplug_slot); 305 old_slot = next_slot; 306 } 307 308 cpqhp_remove_debugfs_files(ctrl); 309 310 /* Free IRQ associated with hot plug device */ 311 free_irq(ctrl->interrupt, ctrl); 312 /* Unmap the memory */ 313 iounmap(ctrl->hpc_reg); 314 /* Finally reclaim PCI mem */ 315 release_mem_region(pci_resource_start(ctrl->pci_dev, 0), 316 pci_resource_len(ctrl->pci_dev, 0)); 317 318 return 0; 319} 320 321 322/** 323 * get_slot_mapping - determine logical slot mapping for PCI device 324 * 325 * Won't work for more than one PCI-PCI bridge in a slot. 326 * 327 * @bus_num - bus number of PCI device 328 * @dev_num - device number of PCI device 329 * @slot - Pointer to u8 where slot number will be returned 330 * 331 * Output: SUCCESS or FAILURE 332 */ 333static int 334get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot) 335{ 336 u32 work; 337 long len; 338 long loop; 339 340 u8 tbus, tdevice, tslot, bridgeSlot; 341 342 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot); 343 344 bridgeSlot = 0xFF; 345 346 len = cpqhp_routing_table_length(); 347 for (loop = 0; loop < len; ++loop) { 348 tbus = cpqhp_routing_table->slots[loop].bus; 349 tdevice = cpqhp_routing_table->slots[loop].devfn >> 3; 350 tslot = cpqhp_routing_table->slots[loop].slot; 351 352 if ((tbus == bus_num) && (tdevice == dev_num)) { 353 *slot = tslot; 354 return 0; 355 } else { 356 /* Did not get a match on the target PCI device. Check 357 * if the current IRQ table entry is a PCI-to-PCI 358 * bridge device. If so, and it's secondary bus 359 * matches the bus number for the target device, I need 360 * to save the bridge's slot number. If I can not find 361 * an entry for the target device, I will have to 362 * assume it's on the other side of the bridge, and 363 * assign it the bridge's slot. 364 */ 365 bus->number = tbus; 366 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0), 367 PCI_CLASS_REVISION, &work); 368 369 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { 370 pci_bus_read_config_dword(bus, 371 PCI_DEVFN(tdevice, 0), 372 PCI_PRIMARY_BUS, &work); 373 // See if bridge's secondary bus matches target bus. 374 if (((work >> 8) & 0x000000FF) == (long) bus_num) 375 bridgeSlot = tslot; 376 } 377 } 378 379 } 380 381 /* If we got here, we didn't find an entry in the IRQ mapping table for 382 * the target PCI device. If we did determine that the target device 383 * is on the other side of a PCI-to-PCI bridge, return the slot number 384 * for the bridge. 385 */ 386 if (bridgeSlot != 0xFF) { 387 *slot = bridgeSlot; 388 return 0; 389 } 390 /* Couldn't find an entry in the routing table for this PCI device */ 391 return -1; 392} 393 394 395/** 396 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off 397 * @ctrl: struct controller to use 398 * @func: PCI device/function info 399 * @status: LED control flag: 1 = LED on, 0 = LED off 400 */ 401static int 402cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func, 403 u32 status) 404{ 405 u8 hp_slot; 406 407 if (func == NULL) 408 return 1; 409 410 hp_slot = func->device - ctrl->slot_device_offset; 411 412 /* Wait for exclusive access to hardware */ 413 mutex_lock(&ctrl->crit_sect); 414 415 if (status == 1) 416 amber_LED_on (ctrl, hp_slot); 417 else if (status == 0) 418 amber_LED_off (ctrl, hp_slot); 419 else { 420 /* Done with exclusive hardware access */ 421 mutex_unlock(&ctrl->crit_sect); 422 return 1; 423 } 424 425 set_SOGO(ctrl); 426 427 /* Wait for SOBS to be unset */ 428 wait_for_ctrl_irq (ctrl); 429 430 /* Done with exclusive hardware access */ 431 mutex_unlock(&ctrl->crit_sect); 432 433 return 0; 434} 435 436 437/** 438 * set_attention_status - Turns the Amber LED for a slot on or off 439 * @hotplug_slot: slot to change LED on 440 * @status: LED control flag 441 */ 442static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status) 443{ 444 struct pci_func *slot_func; 445 struct slot *slot = hotplug_slot->private; 446 struct controller *ctrl = slot->ctrl; 447 u8 bus; 448 u8 devfn; 449 u8 device; 450 u8 function; 451 452 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 453 454 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 455 return -ENODEV; 456 457 device = devfn >> 3; 458 function = devfn & 0x7; 459 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 460 461 slot_func = cpqhp_slot_find(bus, device, function); 462 if (!slot_func) 463 return -ENODEV; 464 465 return cpqhp_set_attention_status(ctrl, slot_func, status); 466} 467 468 469static int process_SI(struct hotplug_slot *hotplug_slot) 470{ 471 struct pci_func *slot_func; 472 struct slot *slot = hotplug_slot->private; 473 struct controller *ctrl = slot->ctrl; 474 u8 bus; 475 u8 devfn; 476 u8 device; 477 u8 function; 478 479 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 480 481 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 482 return -ENODEV; 483 484 device = devfn >> 3; 485 function = devfn & 0x7; 486 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 487 488 slot_func = cpqhp_slot_find(bus, device, function); 489 if (!slot_func) 490 return -ENODEV; 491 492 slot_func->bus = bus; 493 slot_func->device = device; 494 slot_func->function = function; 495 slot_func->configured = 0; 496 dbg("board_added(%p, %p)\n", slot_func, ctrl); 497 return cpqhp_process_SI(ctrl, slot_func); 498} 499 500 501static int process_SS(struct hotplug_slot *hotplug_slot) 502{ 503 struct pci_func *slot_func; 504 struct slot *slot = hotplug_slot->private; 505 struct controller *ctrl = slot->ctrl; 506 u8 bus; 507 u8 devfn; 508 u8 device; 509 u8 function; 510 511 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 512 513 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 514 return -ENODEV; 515 516 device = devfn >> 3; 517 function = devfn & 0x7; 518 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 519 520 slot_func = cpqhp_slot_find(bus, device, function); 521 if (!slot_func) 522 return -ENODEV; 523 524 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl); 525 return cpqhp_process_SS(ctrl, slot_func); 526} 527 528 529static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value) 530{ 531 struct slot *slot = hotplug_slot->private; 532 struct controller *ctrl = slot->ctrl; 533 534 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 535 536 return cpqhp_hardware_test(ctrl, value); 537} 538 539 540static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value) 541{ 542 struct slot *slot = hotplug_slot->private; 543 struct controller *ctrl = slot->ctrl; 544 545 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 546 547 *value = get_slot_enabled(ctrl, slot); 548 return 0; 549} 550 551static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value) 552{ 553 struct slot *slot = hotplug_slot->private; 554 struct controller *ctrl = slot->ctrl; 555 556 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 557 558 *value = cpq_get_attention_status(ctrl, slot); 559 return 0; 560} 561 562static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value) 563{ 564 struct slot *slot = hotplug_slot->private; 565 struct controller *ctrl = slot->ctrl; 566 567 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 568 569 *value = cpq_get_latch_status(ctrl, slot); 570 571 return 0; 572} 573 574static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value) 575{ 576 struct slot *slot = hotplug_slot->private; 577 struct controller *ctrl = slot->ctrl; 578 579 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 580 581 *value = get_presence_status(ctrl, slot); 582 583 return 0; 584} 585 586static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = { 587 .set_attention_status = set_attention_status, 588 .enable_slot = process_SI, 589 .disable_slot = process_SS, 590 .hardware_test = hardware_test, 591 .get_power_status = get_power_status, 592 .get_attention_status = get_attention_status, 593 .get_latch_status = get_latch_status, 594 .get_adapter_status = get_adapter_status, 595}; 596 597#define SLOT_NAME_SIZE 10 598 599static int ctrl_slot_setup(struct controller *ctrl, 600 void __iomem *smbios_start, 601 void __iomem *smbios_table) 602{ 603 struct slot *slot; 604 struct hotplug_slot *hotplug_slot; 605 struct hotplug_slot_info *hotplug_slot_info; 606 struct pci_bus *bus = ctrl->pci_bus; 607 u8 number_of_slots; 608 u8 slot_device; 609 u8 slot_number; 610 u8 ctrl_slot; 611 u32 tempdword; 612 char name[SLOT_NAME_SIZE]; 613 void __iomem *slot_entry= NULL; 614 int result = -ENOMEM; 615 616 dbg("%s\n", __func__); 617 618 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR); 619 620 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 621 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 622 slot_number = ctrl->first_slot; 623 624 while (number_of_slots) { 625 slot = kzalloc(sizeof(*slot), GFP_KERNEL); 626 if (!slot) 627 goto error; 628 629 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)), 630 GFP_KERNEL); 631 if (!slot->hotplug_slot) 632 goto error_slot; 633 hotplug_slot = slot->hotplug_slot; 634 635 hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)), 636 GFP_KERNEL); 637 if (!hotplug_slot->info) 638 goto error_hpslot; 639 hotplug_slot_info = hotplug_slot->info; 640 641 slot->ctrl = ctrl; 642 slot->bus = ctrl->bus; 643 slot->device = slot_device; 644 slot->number = slot_number; 645 dbg("slot->number = %u\n", slot->number); 646 647 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9, 648 slot_entry); 649 650 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != 651 slot->number)) { 652 slot_entry = get_SMBIOS_entry(smbios_start, 653 smbios_table, 9, slot_entry); 654 } 655 656 slot->p_sm_slot = slot_entry; 657 658 init_timer(&slot->task_event); 659 slot->task_event.expires = jiffies + 5 * HZ; 660 slot->task_event.function = cpqhp_pushbutton_thread; 661 662 /*FIXME: these capabilities aren't used but if they are 663 * they need to be correctly implemented 664 */ 665 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED; 666 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED; 667 668 if (is_slot64bit(slot)) 669 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED; 670 if (is_slot66mhz(slot)) 671 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED; 672 if (bus->cur_bus_speed == PCI_SPEED_66MHz) 673 slot->capabilities |= PCISLOT_66_MHZ_OPERATION; 674 675 ctrl_slot = 676 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4); 677 678 /* Check presence */ 679 slot->capabilities |= 680 ((((~tempdword) >> 23) | 681 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02; 682 /* Check the switch state */ 683 slot->capabilities |= 684 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01; 685 /* Check the slot enable */ 686 slot->capabilities |= 687 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04; 688 689 /* register this slot with the hotplug pci core */ 690 hotplug_slot->release = &release_slot; 691 hotplug_slot->private = slot; 692 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number); 693 hotplug_slot->ops = &cpqphp_hotplug_slot_ops; 694 695 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot); 696 hotplug_slot_info->attention_status = 697 cpq_get_attention_status(ctrl, slot); 698 hotplug_slot_info->latch_status = 699 cpq_get_latch_status(ctrl, slot); 700 hotplug_slot_info->adapter_status = 701 get_presence_status(ctrl, slot); 702 703 dbg("registering bus %d, dev %d, number %d, " 704 "ctrl->slot_device_offset %d, slot %d\n", 705 slot->bus, slot->device, 706 slot->number, ctrl->slot_device_offset, 707 slot_number); 708 result = pci_hp_register(hotplug_slot, 709 ctrl->pci_dev->bus, 710 slot->device, 711 name); 712 if (result) { 713 err("pci_hp_register failed with error %d\n", result); 714 goto error_info; 715 } 716 717 slot->next = ctrl->slot; 718 ctrl->slot = slot; 719 720 number_of_slots--; 721 slot_device++; 722 slot_number++; 723 } 724 725 return 0; 726error_info: 727 kfree(hotplug_slot_info); 728error_hpslot: 729 kfree(hotplug_slot); 730error_slot: 731 kfree(slot); 732error: 733 return result; 734} 735 736static int one_time_init(void) 737{ 738 int loop; 739 int retval = 0; 740 741 if (initialized) 742 return 0; 743 744 power_mode = 0; 745 746 retval = init_cpqhp_routing_table(); 747 if (retval) 748 goto error; 749 750 if (cpqhp_debug) 751 pci_print_IRQ_route(); 752 753 dbg("Initialize + Start the notification mechanism \n"); 754 755 retval = cpqhp_event_start_thread(); 756 if (retval) 757 goto error; 758 759 dbg("Initialize slot lists\n"); 760 for (loop = 0; loop < 256; loop++) 761 cpqhp_slot_list[loop] = NULL; 762 763 /* FIXME: We also need to hook the NMI handler eventually. 764 * this also needs to be worked with Christoph 765 * register_NMI_handler(); 766 */ 767 /* Map rom address */ 768 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN); 769 if (!cpqhp_rom_start) { 770 err ("Could not ioremap memory region for ROM\n"); 771 retval = -EIO; 772 goto error; 773 } 774 775 /* Now, map the int15 entry point if we are on compaq specific 776 * hardware 777 */ 778 compaq_nvram_init(cpqhp_rom_start); 779 780 /* Map smbios table entry point structure */ 781 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start, 782 cpqhp_rom_start + ROM_PHY_LEN); 783 if (!smbios_table) { 784 err ("Could not find the SMBIOS pointer in memory\n"); 785 retval = -EIO; 786 goto error_rom_start; 787 } 788 789 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS), 790 readw(smbios_table + ST_LENGTH)); 791 if (!smbios_start) { 792 err ("Could not ioremap memory region taken from SMBIOS values\n"); 793 retval = -EIO; 794 goto error_smbios_start; 795 } 796 797 initialized = 1; 798 799 return retval; 800 801error_smbios_start: 802 iounmap(smbios_start); 803error_rom_start: 804 iounmap(cpqhp_rom_start); 805error: 806 return retval; 807} 808 809static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 810{ 811 u8 num_of_slots = 0; 812 u8 hp_slot = 0; 813 u8 device; 814 u8 bus_cap; 815 u16 temp_word; 816 u16 vendor_id; 817 u16 subsystem_vid; 818 u16 subsystem_deviceid; 819 u32 rc; 820 struct controller *ctrl; 821 struct pci_func *func; 822 struct pci_bus *bus; 823 int err; 824 825 err = pci_enable_device(pdev); 826 if (err) { 827 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n", 828 pci_name(pdev), err); 829 return err; 830 } 831 832 bus = pdev->subordinate; 833 if (!bus) { 834 dev_notice(&pdev->dev, "the device is not a bridge, " 835 "skipping\n"); 836 rc = -ENODEV; 837 goto err_disable_device; 838 } 839 840 /* Need to read VID early b/c it's used to differentiate CPQ and INTC 841 * discovery 842 */ 843 vendor_id = pdev->vendor; 844 if ((vendor_id != PCI_VENDOR_ID_COMPAQ) && 845 (vendor_id != PCI_VENDOR_ID_INTEL)) { 846 err(msg_HPC_non_compaq_or_intel); 847 rc = -ENODEV; 848 goto err_disable_device; 849 } 850 dbg("Vendor ID: %x\n", vendor_id); 851 852 dbg("revision: %d\n", pdev->revision); 853 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) { 854 err(msg_HPC_rev_error); 855 rc = -ENODEV; 856 goto err_disable_device; 857 } 858 859 /* Check for the proper subsystem ID's 860 * Intel uses a different SSID programming model than Compaq. 861 * For Intel, each SSID bit identifies a PHP capability. 862 * Also Intel HPC's may have RID=0. 863 */ 864 if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) { 865 err(msg_HPC_not_supported); 866 return -ENODEV; 867 } 868 869 /* TODO: This code can be made to support non-Compaq or Intel 870 * subsystem IDs 871 */ 872 subsystem_vid = pdev->subsystem_vendor; 873 dbg("Subsystem Vendor ID: %x\n", subsystem_vid); 874 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) { 875 err(msg_HPC_non_compaq_or_intel); 876 rc = -ENODEV; 877 goto err_disable_device; 878 } 879 880 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL); 881 if (!ctrl) { 882 err("%s : out of memory\n", __func__); 883 rc = -ENOMEM; 884 goto err_disable_device; 885 } 886 887 subsystem_deviceid = pdev->subsystem_device; 888 889 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid); 890 891 /* Set Vendor ID, so it can be accessed later from other 892 * functions 893 */ 894 ctrl->vendor_id = vendor_id; 895 896 switch (subsystem_vid) { 897 case PCI_VENDOR_ID_COMPAQ: 898 if (pdev->revision >= 0x13) { /* CIOBX */ 899 ctrl->push_flag = 1; 900 ctrl->slot_switch_type = 1; 901 ctrl->push_button = 1; 902 ctrl->pci_config_space = 1; 903 ctrl->defeature_PHP = 1; 904 ctrl->pcix_support = 1; 905 ctrl->pcix_speed_capability = 1; 906 pci_read_config_byte(pdev, 0x41, &bus_cap); 907 if (bus_cap & 0x80) { 908 dbg("bus max supports 133MHz PCI-X\n"); 909 bus->max_bus_speed = PCI_SPEED_133MHz_PCIX; 910 break; 911 } 912 if (bus_cap & 0x40) { 913 dbg("bus max supports 100MHz PCI-X\n"); 914 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX; 915 break; 916 } 917 if (bus_cap & 20) { 918 dbg("bus max supports 66MHz PCI-X\n"); 919 bus->max_bus_speed = PCI_SPEED_66MHz_PCIX; 920 break; 921 } 922 if (bus_cap & 10) { 923 dbg("bus max supports 66MHz PCI\n"); 924 bus->max_bus_speed = PCI_SPEED_66MHz; 925 break; 926 } 927 928 break; 929 } 930 931 switch (subsystem_deviceid) { 932 case PCI_SUB_HPC_ID: 933 /* Original 6500/7000 implementation */ 934 ctrl->slot_switch_type = 1; 935 bus->max_bus_speed = PCI_SPEED_33MHz; 936 ctrl->push_button = 0; 937 ctrl->pci_config_space = 1; 938 ctrl->defeature_PHP = 1; 939 ctrl->pcix_support = 0; 940 ctrl->pcix_speed_capability = 0; 941 break; 942 case PCI_SUB_HPC_ID2: 943 /* First Pushbutton implementation */ 944 ctrl->push_flag = 1; 945 ctrl->slot_switch_type = 1; 946 bus->max_bus_speed = PCI_SPEED_33MHz; 947 ctrl->push_button = 1; 948 ctrl->pci_config_space = 1; 949 ctrl->defeature_PHP = 1; 950 ctrl->pcix_support = 0; 951 ctrl->pcix_speed_capability = 0; 952 break; 953 case PCI_SUB_HPC_ID_INTC: 954 /* Third party (6500/7000) */ 955 ctrl->slot_switch_type = 1; 956 bus->max_bus_speed = PCI_SPEED_33MHz; 957 ctrl->push_button = 0; 958 ctrl->pci_config_space = 1; 959 ctrl->defeature_PHP = 1; 960 ctrl->pcix_support = 0; 961 ctrl->pcix_speed_capability = 0; 962 break; 963 case PCI_SUB_HPC_ID3: 964 /* First 66 Mhz implementation */ 965 ctrl->push_flag = 1; 966 ctrl->slot_switch_type = 1; 967 bus->max_bus_speed = PCI_SPEED_66MHz; 968 ctrl->push_button = 1; 969 ctrl->pci_config_space = 1; 970 ctrl->defeature_PHP = 1; 971 ctrl->pcix_support = 0; 972 ctrl->pcix_speed_capability = 0; 973 break; 974 case PCI_SUB_HPC_ID4: 975 /* First PCI-X implementation, 100MHz */ 976 ctrl->push_flag = 1; 977 ctrl->slot_switch_type = 1; 978 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX; 979 ctrl->push_button = 1; 980 ctrl->pci_config_space = 1; 981 ctrl->defeature_PHP = 1; 982 ctrl->pcix_support = 1; 983 ctrl->pcix_speed_capability = 0; 984 break; 985 default: 986 err(msg_HPC_not_supported); 987 rc = -ENODEV; 988 goto err_free_ctrl; 989 } 990 break; 991 992 case PCI_VENDOR_ID_INTEL: 993 /* Check for speed capability (0=33, 1=66) */ 994 if (subsystem_deviceid & 0x0001) 995 bus->max_bus_speed = PCI_SPEED_66MHz; 996 else 997 bus->max_bus_speed = PCI_SPEED_33MHz; 998 999 /* Check for push button */ 1000 if (subsystem_deviceid & 0x0002) 1001 ctrl->push_button = 0; 1002 else 1003 ctrl->push_button = 1; 1004 1005 /* Check for slot switch type (0=mechanical, 1=not mechanical) */ 1006 if (subsystem_deviceid & 0x0004) 1007 ctrl->slot_switch_type = 0; 1008 else 1009 ctrl->slot_switch_type = 1; 1010 1011 /* PHP Status (0=De-feature PHP, 1=Normal operation) */ 1012 if (subsystem_deviceid & 0x0008) 1013 ctrl->defeature_PHP = 1; /* PHP supported */ 1014 else 1015 ctrl->defeature_PHP = 0; /* PHP not supported */ 1016 1017 /* Alternate Base Address Register Interface 1018 * (0=not supported, 1=supported) 1019 */ 1020 if (subsystem_deviceid & 0x0010) 1021 ctrl->alternate_base_address = 1; 1022 else 1023 ctrl->alternate_base_address = 0; 1024 1025 /* PCI Config Space Index (0=not supported, 1=supported) */ 1026 if (subsystem_deviceid & 0x0020) 1027 ctrl->pci_config_space = 1; 1028 else 1029 ctrl->pci_config_space = 0; 1030 1031 /* PCI-X support */ 1032 if (subsystem_deviceid & 0x0080) { 1033 ctrl->pcix_support = 1; 1034 if (subsystem_deviceid & 0x0040) 1035 /* 133MHz PCI-X if bit 7 is 1 */ 1036 ctrl->pcix_speed_capability = 1; 1037 else 1038 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */ 1039 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */ 1040 ctrl->pcix_speed_capability = 0; 1041 } else { 1042 /* Conventional PCI */ 1043 ctrl->pcix_support = 0; 1044 ctrl->pcix_speed_capability = 0; 1045 } 1046 break; 1047 1048 default: 1049 err(msg_HPC_not_supported); 1050 rc = -ENODEV; 1051 goto err_free_ctrl; 1052 } 1053 1054 /* Tell the user that we found one. */ 1055 info("Initializing the PCI hot plug controller residing on PCI bus %d\n", 1056 pdev->bus->number); 1057 1058 dbg("Hotplug controller capabilities:\n"); 1059 dbg(" speed_capability %d\n", bus->max_bus_speed); 1060 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ? 1061 "switch present" : "no switch"); 1062 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ? 1063 "PHP supported" : "PHP not supported"); 1064 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ? 1065 "supported" : "not supported"); 1066 dbg(" pci_config_space %s\n", ctrl->pci_config_space ? 1067 "supported" : "not supported"); 1068 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ? 1069 "supported" : "not supported"); 1070 dbg(" pcix_support %s\n", ctrl->pcix_support ? 1071 "supported" : "not supported"); 1072 1073 ctrl->pci_dev = pdev; 1074 pci_set_drvdata(pdev, ctrl); 1075 1076 /* make our own copy of the pci bus structure, 1077 * as we like tweaking it a lot */ 1078 ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL); 1079 if (!ctrl->pci_bus) { 1080 err("out of memory\n"); 1081 rc = -ENOMEM; 1082 goto err_free_ctrl; 1083 } 1084 1085 ctrl->bus = pdev->bus->number; 1086 ctrl->rev = pdev->revision; 1087 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus, 1088 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev); 1089 1090 mutex_init(&ctrl->crit_sect); 1091 init_waitqueue_head(&ctrl->queue); 1092 1093 /* initialize our threads if they haven't already been started up */ 1094 rc = one_time_init(); 1095 if (rc) { 1096 goto err_free_bus; 1097 } 1098 1099 dbg("pdev = %p\n", pdev); 1100 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0)); 1101 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0)); 1102 1103 if (!request_mem_region(pci_resource_start(pdev, 0), 1104 pci_resource_len(pdev, 0), MY_NAME)) { 1105 err("cannot reserve MMIO region\n"); 1106 rc = -ENOMEM; 1107 goto err_free_bus; 1108 } 1109 1110 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0), 1111 pci_resource_len(pdev, 0)); 1112 if (!ctrl->hpc_reg) { 1113 err("cannot remap MMIO region %llx @ %llx\n", 1114 (unsigned long long)pci_resource_len(pdev, 0), 1115 (unsigned long long)pci_resource_start(pdev, 0)); 1116 rc = -ENODEV; 1117 goto err_free_mem_region; 1118 } 1119 1120 /* Check for 66Mhz operation */ 1121 bus->cur_bus_speed = get_controller_speed(ctrl); 1122 1123 1124 /******************************************************** 1125 * 1126 * Save configuration headers for this and 1127 * subordinate PCI buses 1128 * 1129 ********************************************************/ 1130 1131 /* find the physical slot number of the first hot plug slot */ 1132 1133 /* Get slot won't work for devices behind bridges, but 1134 * in this case it will always be called for the "base" 1135 * bus/dev/func of a slot. 1136 * CS: this is leveraging the PCIIRQ routing code from the kernel 1137 * (pci-pc.c: get_irq_routing_table) */ 1138 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number, 1139 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4), 1140 &(ctrl->first_slot)); 1141 dbg("get_slot_mapping: first_slot = %d, returned = %d\n", 1142 ctrl->first_slot, rc); 1143 if (rc) { 1144 err(msg_initialization_err, rc); 1145 goto err_iounmap; 1146 } 1147 1148 /* Store PCI Config Space for all devices on this bus */ 1149 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK)); 1150 if (rc) { 1151 err("%s: unable to save PCI configuration data, error %d\n", 1152 __func__, rc); 1153 goto err_iounmap; 1154 } 1155 1156 /* 1157 * Get IO, memory, and IRQ resources for new devices 1158 */ 1159 /* The next line is required for cpqhp_find_available_resources */ 1160 ctrl->interrupt = pdev->irq; 1161 if (ctrl->interrupt < 0x10) { 1162 cpqhp_legacy_mode = 1; 1163 dbg("System seems to be configured for Full Table Mapped MPS mode\n"); 1164 } 1165 1166 ctrl->cfgspc_irq = 0; 1167 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq); 1168 1169 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start); 1170 ctrl->add_support = !rc; 1171 if (rc) { 1172 dbg("cpqhp_find_available_resources = 0x%x\n", rc); 1173 err("unable to locate PCI configuration resources for hot plug add.\n"); 1174 goto err_iounmap; 1175 } 1176 1177 /* 1178 * Finish setting up the hot plug ctrl device 1179 */ 1180 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 1181 dbg("NumSlots %d \n", ctrl->slot_device_offset); 1182 1183 ctrl->next_event = 0; 1184 1185 /* Setup the slot information structures */ 1186 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table); 1187 if (rc) { 1188 err(msg_initialization_err, 6); 1189 err("%s: unable to save PCI configuration data, error %d\n", 1190 __func__, rc); 1191 goto err_iounmap; 1192 } 1193 1194 /* Mask all general input interrupts */ 1195 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK); 1196 1197 /* set up the interrupt */ 1198 dbg("HPC interrupt = %d \n", ctrl->interrupt); 1199 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr, 1200 IRQF_SHARED, MY_NAME, ctrl)) { 1201 err("Can't get irq %d for the hotplug pci controller\n", 1202 ctrl->interrupt); 1203 rc = -ENODEV; 1204 goto err_iounmap; 1205 } 1206 1207 /* Enable Shift Out interrupt and clear it, also enable SERR on power 1208 * fault 1209 */ 1210 temp_word = readw(ctrl->hpc_reg + MISC); 1211 temp_word |= 0x4006; 1212 writew(temp_word, ctrl->hpc_reg + MISC); 1213 1214 /* Changed 05/05/97 to clear all interrupts at start */ 1215 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR); 1216 1217 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR); 1218 1219 writel(0x0L, ctrl->hpc_reg + INT_MASK); 1220 1221 if (!cpqhp_ctrl_list) { 1222 cpqhp_ctrl_list = ctrl; 1223 ctrl->next = NULL; 1224 } else { 1225 ctrl->next = cpqhp_ctrl_list; 1226 cpqhp_ctrl_list = ctrl; 1227 } 1228 1229 /* turn off empty slots here unless command line option "ON" set 1230 * Wait for exclusive access to hardware 1231 */ 1232 mutex_lock(&ctrl->crit_sect); 1233 1234 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 1235 1236 /* find first device number for the ctrl */ 1237 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 1238 1239 while (num_of_slots) { 1240 dbg("num_of_slots: %d\n", num_of_slots); 1241 func = cpqhp_slot_find(ctrl->bus, device, 0); 1242 if (!func) 1243 break; 1244 1245 hp_slot = func->device - ctrl->slot_device_offset; 1246 dbg("hp_slot: %d\n", hp_slot); 1247 1248 /* We have to save the presence info for these slots */ 1249 temp_word = ctrl->ctrl_int_comp >> 16; 1250 func->presence_save = (temp_word >> hp_slot) & 0x01; 1251 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02; 1252 1253 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) 1254 func->switch_save = 0; 1255 else 1256 func->switch_save = 0x10; 1257 1258 if (!power_mode) 1259 if (!func->is_a_board) { 1260 green_LED_off(ctrl, hp_slot); 1261 slot_disable(ctrl, hp_slot); 1262 } 1263 1264 device++; 1265 num_of_slots--; 1266 } 1267 1268 if (!power_mode) { 1269 set_SOGO(ctrl); 1270 /* Wait for SOBS to be unset */ 1271 wait_for_ctrl_irq(ctrl); 1272 } 1273 1274 rc = init_SERR(ctrl); 1275 if (rc) { 1276 err("init_SERR failed\n"); 1277 mutex_unlock(&ctrl->crit_sect); 1278 goto err_free_irq; 1279 } 1280 1281 /* Done with exclusive hardware access */ 1282 mutex_unlock(&ctrl->crit_sect); 1283 1284 cpqhp_create_debugfs_files(ctrl); 1285 1286 return 0; 1287 1288err_free_irq: 1289 free_irq(ctrl->interrupt, ctrl); 1290err_iounmap: 1291 iounmap(ctrl->hpc_reg); 1292err_free_mem_region: 1293 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 1294err_free_bus: 1295 kfree(ctrl->pci_bus); 1296err_free_ctrl: 1297 kfree(ctrl); 1298err_disable_device: 1299 pci_disable_device(pdev); 1300 return rc; 1301} 1302 1303static void __exit unload_cpqphpd(void) 1304{ 1305 struct pci_func *next; 1306 struct pci_func *TempSlot; 1307 int loop; 1308 u32 rc; 1309 struct controller *ctrl; 1310 struct controller *tctrl; 1311 struct pci_resource *res; 1312 struct pci_resource *tres; 1313 1314 rc = compaq_nvram_store(cpqhp_rom_start); 1315 1316 ctrl = cpqhp_ctrl_list; 1317 1318 while (ctrl) { 1319 if (ctrl->hpc_reg) { 1320 u16 misc; 1321 rc = read_slot_enable (ctrl); 1322 1323 writeb(0, ctrl->hpc_reg + SLOT_SERR); 1324 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK); 1325 1326 misc = readw(ctrl->hpc_reg + MISC); 1327 misc &= 0xFFFD; 1328 writew(misc, ctrl->hpc_reg + MISC); 1329 } 1330 1331 ctrl_slot_cleanup(ctrl); 1332 1333 res = ctrl->io_head; 1334 while (res) { 1335 tres = res; 1336 res = res->next; 1337 kfree(tres); 1338 } 1339 1340 res = ctrl->mem_head; 1341 while (res) { 1342 tres = res; 1343 res = res->next; 1344 kfree(tres); 1345 } 1346 1347 res = ctrl->p_mem_head; 1348 while (res) { 1349 tres = res; 1350 res = res->next; 1351 kfree(tres); 1352 } 1353 1354 res = ctrl->bus_head; 1355 while (res) { 1356 tres = res; 1357 res = res->next; 1358 kfree(tres); 1359 } 1360 1361 kfree (ctrl->pci_bus); 1362 1363 tctrl = ctrl; 1364 ctrl = ctrl->next; 1365 kfree(tctrl); 1366 } 1367 1368 for (loop = 0; loop < 256; loop++) { 1369 next = cpqhp_slot_list[loop]; 1370 while (next != NULL) { 1371 res = next->io_head; 1372 while (res) { 1373 tres = res; 1374 res = res->next; 1375 kfree(tres); 1376 } 1377 1378 res = next->mem_head; 1379 while (res) { 1380 tres = res; 1381 res = res->next; 1382 kfree(tres); 1383 } 1384 1385 res = next->p_mem_head; 1386 while (res) { 1387 tres = res; 1388 res = res->next; 1389 kfree(tres); 1390 } 1391 1392 res = next->bus_head; 1393 while (res) { 1394 tres = res; 1395 res = res->next; 1396 kfree(tres); 1397 } 1398 1399 TempSlot = next; 1400 next = next->next; 1401 kfree(TempSlot); 1402 } 1403 } 1404 1405 /* Stop the notification mechanism */ 1406 if (initialized) 1407 cpqhp_event_stop_thread(); 1408 1409 /* unmap the rom address */ 1410 if (cpqhp_rom_start) 1411 iounmap(cpqhp_rom_start); 1412 if (smbios_start) 1413 iounmap(smbios_start); 1414} 1415 1416static struct pci_device_id hpcd_pci_tbl[] = { 1417 { 1418 /* handle any PCI Hotplug controller */ 1419 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00), 1420 .class_mask = ~0, 1421 1422 /* no matter who makes it */ 1423 .vendor = PCI_ANY_ID, 1424 .device = PCI_ANY_ID, 1425 .subvendor = PCI_ANY_ID, 1426 .subdevice = PCI_ANY_ID, 1427 1428 }, { /* end: all zeroes */ } 1429}; 1430 1431MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl); 1432 1433static struct pci_driver cpqhpc_driver = { 1434 .name = "compaq_pci_hotplug", 1435 .id_table = hpcd_pci_tbl, 1436 .probe = cpqhpc_probe, 1437 /* remove: cpqhpc_remove_one, */ 1438}; 1439 1440static int __init cpqhpc_init(void) 1441{ 1442 int result; 1443 1444 cpqhp_debug = debug; 1445 1446 info (DRIVER_DESC " version: " DRIVER_VERSION "\n"); 1447 cpqhp_initialize_debugfs(); 1448 result = pci_register_driver(&cpqhpc_driver); 1449 dbg("pci_register_driver = %d\n", result); 1450 return result; 1451} 1452 1453static void __exit cpqhpc_cleanup(void) 1454{ 1455 dbg("unload_cpqphpd()\n"); 1456 unload_cpqphpd(); 1457 1458 dbg("pci_unregister_driver\n"); 1459 pci_unregister_driver(&cpqhpc_driver); 1460 cpqhp_shutdown_debugfs(); 1461} 1462 1463module_init(cpqhpc_init); 1464module_exit(cpqhpc_cleanup); 1465