pm8001_init.c revision b595076a180a56d1bb170e6eceda6eb9d76f4cd3
1/* 2 * PMC-Sierra SPC 8001 SAS/SATA based host adapters driver 3 * 4 * Copyright (c) 2008-2009 USI Co., Ltd. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * substantially similar to the "NO WARRANTY" disclaimer below 15 * ("Disclaimer") and any redistribution must be conditioned upon 16 * including a substantially similar Disclaimer requirement for further 17 * binary redistribution. 18 * 3. Neither the names of the above-listed copyright holders nor the names 19 * of any contributors may be used to endorse or promote products derived 20 * from this software without specific prior written permission. 21 * 22 * Alternatively, this software may be distributed under the terms of the 23 * GNU General Public License ("GPL") version 2 as published by the Free 24 * Software Foundation. 25 * 26 * NO WARRANTY 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGES. 38 * 39 */ 40 41#include <linux/slab.h> 42#include "pm8001_sas.h" 43#include "pm8001_chips.h" 44 45static struct scsi_transport_template *pm8001_stt; 46 47static const struct pm8001_chip_info pm8001_chips[] = { 48 [chip_8001] = { 8, &pm8001_8001_dispatch,}, 49}; 50static int pm8001_id; 51 52LIST_HEAD(hba_list); 53 54/** 55 * The main structure which LLDD must register for scsi core. 56 */ 57static struct scsi_host_template pm8001_sht = { 58 .module = THIS_MODULE, 59 .name = DRV_NAME, 60 .queuecommand = sas_queuecommand, 61 .target_alloc = sas_target_alloc, 62 .slave_configure = pm8001_slave_configure, 63 .slave_destroy = sas_slave_destroy, 64 .scan_finished = pm8001_scan_finished, 65 .scan_start = pm8001_scan_start, 66 .change_queue_depth = sas_change_queue_depth, 67 .change_queue_type = sas_change_queue_type, 68 .bios_param = sas_bios_param, 69 .can_queue = 1, 70 .cmd_per_lun = 1, 71 .this_id = -1, 72 .sg_tablesize = SG_ALL, 73 .max_sectors = SCSI_DEFAULT_MAX_SECTORS, 74 .use_clustering = ENABLE_CLUSTERING, 75 .eh_device_reset_handler = sas_eh_device_reset_handler, 76 .eh_bus_reset_handler = sas_eh_bus_reset_handler, 77 .slave_alloc = pm8001_slave_alloc, 78 .target_destroy = sas_target_destroy, 79 .ioctl = sas_ioctl, 80 .shost_attrs = pm8001_host_attrs, 81}; 82 83/** 84 * Sas layer call this function to execute specific task. 85 */ 86static struct sas_domain_function_template pm8001_transport_ops = { 87 .lldd_dev_found = pm8001_dev_found, 88 .lldd_dev_gone = pm8001_dev_gone, 89 90 .lldd_execute_task = pm8001_queue_command, 91 .lldd_control_phy = pm8001_phy_control, 92 93 .lldd_abort_task = pm8001_abort_task, 94 .lldd_abort_task_set = pm8001_abort_task_set, 95 .lldd_clear_aca = pm8001_clear_aca, 96 .lldd_clear_task_set = pm8001_clear_task_set, 97 .lldd_I_T_nexus_reset = pm8001_I_T_nexus_reset, 98 .lldd_lu_reset = pm8001_lu_reset, 99 .lldd_query_task = pm8001_query_task, 100}; 101 102/** 103 *pm8001_phy_init - initiate our adapter phys 104 *@pm8001_ha: our hba structure. 105 *@phy_id: phy id. 106 */ 107static void __devinit pm8001_phy_init(struct pm8001_hba_info *pm8001_ha, 108 int phy_id) 109{ 110 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 111 struct asd_sas_phy *sas_phy = &phy->sas_phy; 112 phy->phy_state = 0; 113 phy->pm8001_ha = pm8001_ha; 114 sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0; 115 sas_phy->class = SAS; 116 sas_phy->iproto = SAS_PROTOCOL_ALL; 117 sas_phy->tproto = 0; 118 sas_phy->type = PHY_TYPE_PHYSICAL; 119 sas_phy->role = PHY_ROLE_INITIATOR; 120 sas_phy->oob_mode = OOB_NOT_CONNECTED; 121 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN; 122 sas_phy->id = phy_id; 123 sas_phy->sas_addr = &pm8001_ha->sas_addr[0]; 124 sas_phy->frame_rcvd = &phy->frame_rcvd[0]; 125 sas_phy->ha = (struct sas_ha_struct *)pm8001_ha->shost->hostdata; 126 sas_phy->lldd_phy = phy; 127} 128 129/** 130 *pm8001_free - free hba 131 *@pm8001_ha: our hba structure. 132 * 133 */ 134static void pm8001_free(struct pm8001_hba_info *pm8001_ha) 135{ 136 int i; 137 struct pm8001_wq *wq; 138 139 if (!pm8001_ha) 140 return; 141 142 for (i = 0; i < USI_MAX_MEMCNT; i++) { 143 if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) { 144 pci_free_consistent(pm8001_ha->pdev, 145 pm8001_ha->memoryMap.region[i].element_size, 146 pm8001_ha->memoryMap.region[i].virt_ptr, 147 pm8001_ha->memoryMap.region[i].phys_addr); 148 } 149 } 150 PM8001_CHIP_DISP->chip_iounmap(pm8001_ha); 151 if (pm8001_ha->shost) 152 scsi_host_put(pm8001_ha->shost); 153 list_for_each_entry(wq, &pm8001_ha->wq_list, entry) 154 cancel_delayed_work(&wq->work_q); 155 kfree(pm8001_ha->tags); 156 kfree(pm8001_ha); 157} 158 159#ifdef PM8001_USE_TASKLET 160static void pm8001_tasklet(unsigned long opaque) 161{ 162 struct pm8001_hba_info *pm8001_ha; 163 pm8001_ha = (struct pm8001_hba_info *)opaque;; 164 if (unlikely(!pm8001_ha)) 165 BUG_ON(1); 166 PM8001_CHIP_DISP->isr(pm8001_ha); 167} 168#endif 169 170 171 /** 172 * pm8001_interrupt - when HBA originate a interrupt,we should invoke this 173 * dispatcher to handle each case. 174 * @irq: irq number. 175 * @opaque: the passed general host adapter struct 176 */ 177static irqreturn_t pm8001_interrupt(int irq, void *opaque) 178{ 179 struct pm8001_hba_info *pm8001_ha; 180 irqreturn_t ret = IRQ_HANDLED; 181 struct sas_ha_struct *sha = opaque; 182 pm8001_ha = sha->lldd_ha; 183 if (unlikely(!pm8001_ha)) 184 return IRQ_NONE; 185 if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha)) 186 return IRQ_NONE; 187#ifdef PM8001_USE_TASKLET 188 tasklet_schedule(&pm8001_ha->tasklet); 189#else 190 ret = PM8001_CHIP_DISP->isr(pm8001_ha); 191#endif 192 return ret; 193} 194 195/** 196 * pm8001_alloc - initiate our hba structure and 6 DMAs area. 197 * @pm8001_ha:our hba structure. 198 * 199 */ 200static int __devinit pm8001_alloc(struct pm8001_hba_info *pm8001_ha) 201{ 202 int i; 203 spin_lock_init(&pm8001_ha->lock); 204 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 205 pm8001_phy_init(pm8001_ha, i); 206 pm8001_ha->port[i].wide_port_phymap = 0; 207 pm8001_ha->port[i].port_attached = 0; 208 pm8001_ha->port[i].port_state = 0; 209 INIT_LIST_HEAD(&pm8001_ha->port[i].list); 210 } 211 212 pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL); 213 if (!pm8001_ha->tags) 214 goto err_out; 215 /* MPI Memory region 1 for AAP Event Log for fw */ 216 pm8001_ha->memoryMap.region[AAP1].num_elements = 1; 217 pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE; 218 pm8001_ha->memoryMap.region[AAP1].total_len = PM8001_EVENT_LOG_SIZE; 219 pm8001_ha->memoryMap.region[AAP1].alignment = 32; 220 221 /* MPI Memory region 2 for IOP Event Log for fw */ 222 pm8001_ha->memoryMap.region[IOP].num_elements = 1; 223 pm8001_ha->memoryMap.region[IOP].element_size = PM8001_EVENT_LOG_SIZE; 224 pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE; 225 pm8001_ha->memoryMap.region[IOP].alignment = 32; 226 227 /* MPI Memory region 3 for consumer Index of inbound queues */ 228 pm8001_ha->memoryMap.region[CI].num_elements = 1; 229 pm8001_ha->memoryMap.region[CI].element_size = 4; 230 pm8001_ha->memoryMap.region[CI].total_len = 4; 231 pm8001_ha->memoryMap.region[CI].alignment = 4; 232 233 /* MPI Memory region 4 for producer Index of outbound queues */ 234 pm8001_ha->memoryMap.region[PI].num_elements = 1; 235 pm8001_ha->memoryMap.region[PI].element_size = 4; 236 pm8001_ha->memoryMap.region[PI].total_len = 4; 237 pm8001_ha->memoryMap.region[PI].alignment = 4; 238 239 /* MPI Memory region 5 inbound queues */ 240 pm8001_ha->memoryMap.region[IB].num_elements = 256; 241 pm8001_ha->memoryMap.region[IB].element_size = 64; 242 pm8001_ha->memoryMap.region[IB].total_len = 256 * 64; 243 pm8001_ha->memoryMap.region[IB].alignment = 64; 244 245 /* MPI Memory region 6 inbound queues */ 246 pm8001_ha->memoryMap.region[OB].num_elements = 256; 247 pm8001_ha->memoryMap.region[OB].element_size = 64; 248 pm8001_ha->memoryMap.region[OB].total_len = 256 * 64; 249 pm8001_ha->memoryMap.region[OB].alignment = 64; 250 251 /* Memory region write DMA*/ 252 pm8001_ha->memoryMap.region[NVMD].num_elements = 1; 253 pm8001_ha->memoryMap.region[NVMD].element_size = 4096; 254 pm8001_ha->memoryMap.region[NVMD].total_len = 4096; 255 /* Memory region for devices*/ 256 pm8001_ha->memoryMap.region[DEV_MEM].num_elements = 1; 257 pm8001_ha->memoryMap.region[DEV_MEM].element_size = PM8001_MAX_DEVICES * 258 sizeof(struct pm8001_device); 259 pm8001_ha->memoryMap.region[DEV_MEM].total_len = PM8001_MAX_DEVICES * 260 sizeof(struct pm8001_device); 261 262 /* Memory region for ccb_info*/ 263 pm8001_ha->memoryMap.region[CCB_MEM].num_elements = 1; 264 pm8001_ha->memoryMap.region[CCB_MEM].element_size = PM8001_MAX_CCB * 265 sizeof(struct pm8001_ccb_info); 266 pm8001_ha->memoryMap.region[CCB_MEM].total_len = PM8001_MAX_CCB * 267 sizeof(struct pm8001_ccb_info); 268 269 for (i = 0; i < USI_MAX_MEMCNT; i++) { 270 if (pm8001_mem_alloc(pm8001_ha->pdev, 271 &pm8001_ha->memoryMap.region[i].virt_ptr, 272 &pm8001_ha->memoryMap.region[i].phys_addr, 273 &pm8001_ha->memoryMap.region[i].phys_addr_hi, 274 &pm8001_ha->memoryMap.region[i].phys_addr_lo, 275 pm8001_ha->memoryMap.region[i].total_len, 276 pm8001_ha->memoryMap.region[i].alignment) != 0) { 277 PM8001_FAIL_DBG(pm8001_ha, 278 pm8001_printk("Mem%d alloc failed\n", 279 i)); 280 goto err_out; 281 } 282 } 283 284 pm8001_ha->devices = pm8001_ha->memoryMap.region[DEV_MEM].virt_ptr; 285 for (i = 0; i < PM8001_MAX_DEVICES; i++) { 286 pm8001_ha->devices[i].dev_type = NO_DEVICE; 287 pm8001_ha->devices[i].id = i; 288 pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES; 289 pm8001_ha->devices[i].running_req = 0; 290 } 291 pm8001_ha->ccb_info = pm8001_ha->memoryMap.region[CCB_MEM].virt_ptr; 292 for (i = 0; i < PM8001_MAX_CCB; i++) { 293 pm8001_ha->ccb_info[i].ccb_dma_handle = 294 pm8001_ha->memoryMap.region[CCB_MEM].phys_addr + 295 i * sizeof(struct pm8001_ccb_info); 296 pm8001_ha->ccb_info[i].task = NULL; 297 pm8001_ha->ccb_info[i].ccb_tag = 0xffffffff; 298 pm8001_ha->ccb_info[i].device = NULL; 299 ++pm8001_ha->tags_num; 300 } 301 pm8001_ha->flags = PM8001F_INIT_TIME; 302 /* Initialize tags */ 303 pm8001_tag_init(pm8001_ha); 304 return 0; 305err_out: 306 return 1; 307} 308 309/** 310 * pm8001_ioremap - remap the pci high physical address to kernal virtual 311 * address so that we can access them. 312 * @pm8001_ha:our hba structure. 313 */ 314static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha) 315{ 316 u32 bar; 317 u32 logicalBar = 0; 318 struct pci_dev *pdev; 319 320 pdev = pm8001_ha->pdev; 321 /* map pci mem (PMC pci base 0-3)*/ 322 for (bar = 0; bar < 6; bar++) { 323 /* 324 ** logical BARs for SPC: 325 ** bar 0 and 1 - logical BAR0 326 ** bar 2 and 3 - logical BAR1 327 ** bar4 - logical BAR2 328 ** bar5 - logical BAR3 329 ** Skip the appropriate assignments: 330 */ 331 if ((bar == 1) || (bar == 3)) 332 continue; 333 if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) { 334 pm8001_ha->io_mem[logicalBar].membase = 335 pci_resource_start(pdev, bar); 336 pm8001_ha->io_mem[logicalBar].membase &= 337 (u32)PCI_BASE_ADDRESS_MEM_MASK; 338 pm8001_ha->io_mem[logicalBar].memsize = 339 pci_resource_len(pdev, bar); 340 pm8001_ha->io_mem[logicalBar].memvirtaddr = 341 ioremap(pm8001_ha->io_mem[logicalBar].membase, 342 pm8001_ha->io_mem[logicalBar].memsize); 343 PM8001_INIT_DBG(pm8001_ha, 344 pm8001_printk("PCI: bar %d, logicalBar %d " 345 "virt_addr=%lx,len=%d\n", bar, logicalBar, 346 (unsigned long) 347 pm8001_ha->io_mem[logicalBar].memvirtaddr, 348 pm8001_ha->io_mem[logicalBar].memsize)); 349 } else { 350 pm8001_ha->io_mem[logicalBar].membase = 0; 351 pm8001_ha->io_mem[logicalBar].memsize = 0; 352 pm8001_ha->io_mem[logicalBar].memvirtaddr = 0; 353 } 354 logicalBar++; 355 } 356 return 0; 357} 358 359/** 360 * pm8001_pci_alloc - initialize our ha card structure 361 * @pdev: pci device. 362 * @ent: ent 363 * @shost: scsi host struct which has been initialized before. 364 */ 365static struct pm8001_hba_info *__devinit 366pm8001_pci_alloc(struct pci_dev *pdev, u32 chip_id, struct Scsi_Host *shost) 367{ 368 struct pm8001_hba_info *pm8001_ha; 369 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 370 371 372 pm8001_ha = sha->lldd_ha; 373 if (!pm8001_ha) 374 return NULL; 375 376 pm8001_ha->pdev = pdev; 377 pm8001_ha->dev = &pdev->dev; 378 pm8001_ha->chip_id = chip_id; 379 pm8001_ha->chip = &pm8001_chips[pm8001_ha->chip_id]; 380 pm8001_ha->irq = pdev->irq; 381 pm8001_ha->sas = sha; 382 pm8001_ha->shost = shost; 383 pm8001_ha->id = pm8001_id++; 384 INIT_LIST_HEAD(&pm8001_ha->wq_list); 385 pm8001_ha->logging_level = 0x01; 386 sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id); 387#ifdef PM8001_USE_TASKLET 388 tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet, 389 (unsigned long)pm8001_ha); 390#endif 391 pm8001_ioremap(pm8001_ha); 392 if (!pm8001_alloc(pm8001_ha)) 393 return pm8001_ha; 394 pm8001_free(pm8001_ha); 395 return NULL; 396} 397 398/** 399 * pci_go_44 - pm8001 specified, its DMA is 44 bit rather than 64 bit 400 * @pdev: pci device. 401 */ 402static int pci_go_44(struct pci_dev *pdev) 403{ 404 int rc; 405 406 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(44))) { 407 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(44)); 408 if (rc) { 409 rc = pci_set_consistent_dma_mask(pdev, 410 DMA_BIT_MASK(32)); 411 if (rc) { 412 dev_printk(KERN_ERR, &pdev->dev, 413 "44-bit DMA enable failed\n"); 414 return rc; 415 } 416 } 417 } else { 418 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 419 if (rc) { 420 dev_printk(KERN_ERR, &pdev->dev, 421 "32-bit DMA enable failed\n"); 422 return rc; 423 } 424 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 425 if (rc) { 426 dev_printk(KERN_ERR, &pdev->dev, 427 "32-bit consistent DMA enable failed\n"); 428 return rc; 429 } 430 } 431 return rc; 432} 433 434/** 435 * pm8001_prep_sas_ha_init - allocate memory in general hba struct && init them. 436 * @shost: scsi host which has been allocated outside. 437 * @chip_info: our ha struct. 438 */ 439static int __devinit pm8001_prep_sas_ha_init(struct Scsi_Host * shost, 440 const struct pm8001_chip_info *chip_info) 441{ 442 int phy_nr, port_nr; 443 struct asd_sas_phy **arr_phy; 444 struct asd_sas_port **arr_port; 445 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 446 447 phy_nr = chip_info->n_phy; 448 port_nr = phy_nr; 449 memset(sha, 0x00, sizeof(*sha)); 450 arr_phy = kcalloc(phy_nr, sizeof(void *), GFP_KERNEL); 451 if (!arr_phy) 452 goto exit; 453 arr_port = kcalloc(port_nr, sizeof(void *), GFP_KERNEL); 454 if (!arr_port) 455 goto exit_free2; 456 457 sha->sas_phy = arr_phy; 458 sha->sas_port = arr_port; 459 sha->lldd_ha = kzalloc(sizeof(struct pm8001_hba_info), GFP_KERNEL); 460 if (!sha->lldd_ha) 461 goto exit_free1; 462 463 shost->transportt = pm8001_stt; 464 shost->max_id = PM8001_MAX_DEVICES; 465 shost->max_lun = 8; 466 shost->max_channel = 0; 467 shost->unique_id = pm8001_id; 468 shost->max_cmd_len = 16; 469 shost->can_queue = PM8001_CAN_QUEUE; 470 shost->cmd_per_lun = 32; 471 return 0; 472exit_free1: 473 kfree(arr_port); 474exit_free2: 475 kfree(arr_phy); 476exit: 477 return -1; 478} 479 480/** 481 * pm8001_post_sas_ha_init - initialize general hba struct defined in libsas 482 * @shost: scsi host which has been allocated outside 483 * @chip_info: our ha struct. 484 */ 485static void __devinit pm8001_post_sas_ha_init(struct Scsi_Host *shost, 486 const struct pm8001_chip_info *chip_info) 487{ 488 int i = 0; 489 struct pm8001_hba_info *pm8001_ha; 490 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 491 492 pm8001_ha = sha->lldd_ha; 493 for (i = 0; i < chip_info->n_phy; i++) { 494 sha->sas_phy[i] = &pm8001_ha->phy[i].sas_phy; 495 sha->sas_port[i] = &pm8001_ha->port[i].sas_port; 496 } 497 sha->sas_ha_name = DRV_NAME; 498 sha->dev = pm8001_ha->dev; 499 500 sha->lldd_module = THIS_MODULE; 501 sha->sas_addr = &pm8001_ha->sas_addr[0]; 502 sha->num_phys = chip_info->n_phy; 503 sha->lldd_max_execute_num = 1; 504 sha->lldd_queue_size = PM8001_CAN_QUEUE; 505 sha->core.shost = shost; 506} 507 508/** 509 * pm8001_init_sas_add - initialize sas address 510 * @chip_info: our ha struct. 511 * 512 * Currently we just set the fixed SAS address to our HBA,for manufacture, 513 * it should read from the EEPROM 514 */ 515static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha) 516{ 517 u8 i; 518#ifdef PM8001_READ_VPD 519 DECLARE_COMPLETION_ONSTACK(completion); 520 struct pm8001_ioctl_payload payload; 521 pm8001_ha->nvmd_completion = &completion; 522 payload.minor_function = 0; 523 payload.length = 128; 524 payload.func_specific = kzalloc(128, GFP_KERNEL); 525 PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); 526 wait_for_completion(&completion); 527 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 528 memcpy(&pm8001_ha->phy[i].dev_sas_addr, pm8001_ha->sas_addr, 529 SAS_ADDR_SIZE); 530 PM8001_INIT_DBG(pm8001_ha, 531 pm8001_printk("phy %d sas_addr = %016llx \n", i, 532 pm8001_ha->phy[i].dev_sas_addr)); 533 } 534#else 535 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 536 pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL; 537 pm8001_ha->phy[i].dev_sas_addr = 538 cpu_to_be64((u64) 539 (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr)); 540 } 541 memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr, 542 SAS_ADDR_SIZE); 543#endif 544} 545 546#ifdef PM8001_USE_MSIX 547/** 548 * pm8001_setup_msix - enable MSI-X interrupt 549 * @chip_info: our ha struct. 550 * @irq_handler: irq_handler 551 */ 552static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha, 553 irq_handler_t irq_handler) 554{ 555 u32 i = 0, j = 0; 556 u32 number_of_intr = 1; 557 int flag = 0; 558 u32 max_entry; 559 int rc; 560 max_entry = sizeof(pm8001_ha->msix_entries) / 561 sizeof(pm8001_ha->msix_entries[0]); 562 flag |= IRQF_DISABLED; 563 for (i = 0; i < max_entry ; i++) 564 pm8001_ha->msix_entries[i].entry = i; 565 rc = pci_enable_msix(pm8001_ha->pdev, pm8001_ha->msix_entries, 566 number_of_intr); 567 pm8001_ha->number_of_intr = number_of_intr; 568 if (!rc) { 569 for (i = 0; i < number_of_intr; i++) { 570 if (request_irq(pm8001_ha->msix_entries[i].vector, 571 irq_handler, flag, DRV_NAME, 572 SHOST_TO_SAS_HA(pm8001_ha->shost))) { 573 for (j = 0; j < i; j++) 574 free_irq( 575 pm8001_ha->msix_entries[j].vector, 576 SHOST_TO_SAS_HA(pm8001_ha->shost)); 577 pci_disable_msix(pm8001_ha->pdev); 578 break; 579 } 580 } 581 } 582 return rc; 583} 584#endif 585 586/** 587 * pm8001_request_irq - register interrupt 588 * @chip_info: our ha struct. 589 */ 590static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha) 591{ 592 struct pci_dev *pdev; 593 irq_handler_t irq_handler = pm8001_interrupt; 594 int rc; 595 596 pdev = pm8001_ha->pdev; 597 598#ifdef PM8001_USE_MSIX 599 if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) 600 return pm8001_setup_msix(pm8001_ha, irq_handler); 601 else 602 goto intx; 603#endif 604 605intx: 606 /* initialize the INT-X interrupt */ 607 rc = request_irq(pdev->irq, irq_handler, IRQF_SHARED, DRV_NAME, 608 SHOST_TO_SAS_HA(pm8001_ha->shost)); 609 return rc; 610} 611 612/** 613 * pm8001_pci_probe - probe supported device 614 * @pdev: pci device which kernel has been prepared for. 615 * @ent: pci device id 616 * 617 * This function is the main initialization function, when register a new 618 * pci driver it is invoked, all struct an hardware initilization should be done 619 * here, also, register interrupt 620 */ 621static int __devinit pm8001_pci_probe(struct pci_dev *pdev, 622 const struct pci_device_id *ent) 623{ 624 unsigned int rc; 625 u32 pci_reg; 626 struct pm8001_hba_info *pm8001_ha; 627 struct Scsi_Host *shost = NULL; 628 const struct pm8001_chip_info *chip; 629 630 dev_printk(KERN_INFO, &pdev->dev, 631 "pm8001: driver version %s\n", DRV_VERSION); 632 rc = pci_enable_device(pdev); 633 if (rc) 634 goto err_out_enable; 635 pci_set_master(pdev); 636 /* 637 * Enable pci slot busmaster by setting pci command register. 638 * This is required by FW for Cyclone card. 639 */ 640 641 pci_read_config_dword(pdev, PCI_COMMAND, &pci_reg); 642 pci_reg |= 0x157; 643 pci_write_config_dword(pdev, PCI_COMMAND, pci_reg); 644 rc = pci_request_regions(pdev, DRV_NAME); 645 if (rc) 646 goto err_out_disable; 647 rc = pci_go_44(pdev); 648 if (rc) 649 goto err_out_regions; 650 651 shost = scsi_host_alloc(&pm8001_sht, sizeof(void *)); 652 if (!shost) { 653 rc = -ENOMEM; 654 goto err_out_regions; 655 } 656 chip = &pm8001_chips[ent->driver_data]; 657 SHOST_TO_SAS_HA(shost) = 658 kzalloc(sizeof(struct sas_ha_struct), GFP_KERNEL); 659 if (!SHOST_TO_SAS_HA(shost)) { 660 rc = -ENOMEM; 661 goto err_out_free_host; 662 } 663 664 rc = pm8001_prep_sas_ha_init(shost, chip); 665 if (rc) { 666 rc = -ENOMEM; 667 goto err_out_free; 668 } 669 pci_set_drvdata(pdev, SHOST_TO_SAS_HA(shost)); 670 pm8001_ha = pm8001_pci_alloc(pdev, chip_8001, shost); 671 if (!pm8001_ha) { 672 rc = -ENOMEM; 673 goto err_out_free; 674 } 675 list_add_tail(&pm8001_ha->list, &hba_list); 676 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); 677 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); 678 if (rc) 679 goto err_out_ha_free; 680 681 rc = scsi_add_host(shost, &pdev->dev); 682 if (rc) 683 goto err_out_ha_free; 684 rc = pm8001_request_irq(pm8001_ha); 685 if (rc) 686 goto err_out_shost; 687 688 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha); 689 pm8001_init_sas_add(pm8001_ha); 690 pm8001_post_sas_ha_init(shost, chip); 691 rc = sas_register_ha(SHOST_TO_SAS_HA(shost)); 692 if (rc) 693 goto err_out_shost; 694 scsi_scan_host(pm8001_ha->shost); 695 return 0; 696 697err_out_shost: 698 scsi_remove_host(pm8001_ha->shost); 699err_out_ha_free: 700 pm8001_free(pm8001_ha); 701err_out_free: 702 kfree(SHOST_TO_SAS_HA(shost)); 703err_out_free_host: 704 kfree(shost); 705err_out_regions: 706 pci_release_regions(pdev); 707err_out_disable: 708 pci_disable_device(pdev); 709err_out_enable: 710 return rc; 711} 712 713static void __devexit pm8001_pci_remove(struct pci_dev *pdev) 714{ 715 struct sas_ha_struct *sha = pci_get_drvdata(pdev); 716 struct pm8001_hba_info *pm8001_ha; 717 int i; 718 pm8001_ha = sha->lldd_ha; 719 pci_set_drvdata(pdev, NULL); 720 sas_unregister_ha(sha); 721 sas_remove_host(pm8001_ha->shost); 722 list_del(&pm8001_ha->list); 723 scsi_remove_host(pm8001_ha->shost); 724 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha); 725 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); 726 727#ifdef PM8001_USE_MSIX 728 for (i = 0; i < pm8001_ha->number_of_intr; i++) 729 synchronize_irq(pm8001_ha->msix_entries[i].vector); 730 for (i = 0; i < pm8001_ha->number_of_intr; i++) 731 free_irq(pm8001_ha->msix_entries[i].vector, sha); 732 pci_disable_msix(pdev); 733#else 734 free_irq(pm8001_ha->irq, sha); 735#endif 736#ifdef PM8001_USE_TASKLET 737 tasklet_kill(&pm8001_ha->tasklet); 738#endif 739 pm8001_free(pm8001_ha); 740 kfree(sha->sas_phy); 741 kfree(sha->sas_port); 742 kfree(sha); 743 pci_release_regions(pdev); 744 pci_disable_device(pdev); 745} 746 747/** 748 * pm8001_pci_suspend - power management suspend main entry point 749 * @pdev: PCI device struct 750 * @state: PM state change to (usually PCI_D3) 751 * 752 * Returns 0 success, anything else error. 753 */ 754static int pm8001_pci_suspend(struct pci_dev *pdev, pm_message_t state) 755{ 756 struct sas_ha_struct *sha = pci_get_drvdata(pdev); 757 struct pm8001_hba_info *pm8001_ha; 758 int i , pos; 759 u32 device_state; 760 pm8001_ha = sha->lldd_ha; 761 flush_scheduled_work(); 762 scsi_block_requests(pm8001_ha->shost); 763 pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 764 if (pos == 0) { 765 printk(KERN_ERR " PCI PM not supported\n"); 766 return -ENODEV; 767 } 768 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha); 769 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); 770#ifdef PM8001_USE_MSIX 771 for (i = 0; i < pm8001_ha->number_of_intr; i++) 772 synchronize_irq(pm8001_ha->msix_entries[i].vector); 773 for (i = 0; i < pm8001_ha->number_of_intr; i++) 774 free_irq(pm8001_ha->msix_entries[i].vector, sha); 775 pci_disable_msix(pdev); 776#else 777 free_irq(pm8001_ha->irq, sha); 778#endif 779#ifdef PM8001_USE_TASKLET 780 tasklet_kill(&pm8001_ha->tasklet); 781#endif 782 device_state = pci_choose_state(pdev, state); 783 pm8001_printk("pdev=0x%p, slot=%s, entering " 784 "operating state [D%d]\n", pdev, 785 pm8001_ha->name, device_state); 786 pci_save_state(pdev); 787 pci_disable_device(pdev); 788 pci_set_power_state(pdev, device_state); 789 return 0; 790} 791 792/** 793 * pm8001_pci_resume - power management resume main entry point 794 * @pdev: PCI device struct 795 * 796 * Returns 0 success, anything else error. 797 */ 798static int pm8001_pci_resume(struct pci_dev *pdev) 799{ 800 struct sas_ha_struct *sha = pci_get_drvdata(pdev); 801 struct pm8001_hba_info *pm8001_ha; 802 int rc; 803 u32 device_state; 804 pm8001_ha = sha->lldd_ha; 805 device_state = pdev->current_state; 806 807 pm8001_printk("pdev=0x%p, slot=%s, resuming from previous " 808 "operating state [D%d]\n", pdev, pm8001_ha->name, device_state); 809 810 pci_set_power_state(pdev, PCI_D0); 811 pci_enable_wake(pdev, PCI_D0, 0); 812 pci_restore_state(pdev); 813 rc = pci_enable_device(pdev); 814 if (rc) { 815 pm8001_printk("slot=%s Enable device failed during resume\n", 816 pm8001_ha->name); 817 goto err_out_enable; 818 } 819 820 pci_set_master(pdev); 821 rc = pci_go_44(pdev); 822 if (rc) 823 goto err_out_disable; 824 825 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); 826 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); 827 if (rc) 828 goto err_out_disable; 829 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha); 830 rc = pm8001_request_irq(pm8001_ha); 831 if (rc) 832 goto err_out_disable; 833 #ifdef PM8001_USE_TASKLET 834 tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet, 835 (unsigned long)pm8001_ha); 836 #endif 837 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha); 838 scsi_unblock_requests(pm8001_ha->shost); 839 return 0; 840 841err_out_disable: 842 scsi_remove_host(pm8001_ha->shost); 843 pci_disable_device(pdev); 844err_out_enable: 845 return rc; 846} 847 848static struct pci_device_id __devinitdata pm8001_pci_table[] = { 849 { 850 PCI_VDEVICE(PMC_Sierra, 0x8001), chip_8001 851 }, 852 { 853 PCI_DEVICE(0x117c, 0x0042), 854 .driver_data = chip_8001 855 }, 856 {} /* terminate list */ 857}; 858 859static struct pci_driver pm8001_pci_driver = { 860 .name = DRV_NAME, 861 .id_table = pm8001_pci_table, 862 .probe = pm8001_pci_probe, 863 .remove = __devexit_p(pm8001_pci_remove), 864 .suspend = pm8001_pci_suspend, 865 .resume = pm8001_pci_resume, 866}; 867 868/** 869 * pm8001_init - initialize scsi transport template 870 */ 871static int __init pm8001_init(void) 872{ 873 int rc; 874 pm8001_id = 0; 875 pm8001_stt = sas_domain_attach_transport(&pm8001_transport_ops); 876 if (!pm8001_stt) 877 return -ENOMEM; 878 rc = pci_register_driver(&pm8001_pci_driver); 879 if (rc) 880 goto err_out; 881 return 0; 882err_out: 883 sas_release_transport(pm8001_stt); 884 return rc; 885} 886 887static void __exit pm8001_exit(void) 888{ 889 pci_unregister_driver(&pm8001_pci_driver); 890 sas_release_transport(pm8001_stt); 891} 892 893module_init(pm8001_init); 894module_exit(pm8001_exit); 895 896MODULE_AUTHOR("Jack Wang <jack_wang@usish.com>"); 897MODULE_DESCRIPTION("PMC-Sierra PM8001 SAS/SATA controller driver"); 898MODULE_VERSION(DRV_VERSION); 899MODULE_LICENSE("GPL"); 900MODULE_DEVICE_TABLE(pci, pm8001_pci_table); 901 902