1/* 2 * adis16400.c support Analog Devices ADIS16400/5 3 * 3d 2g Linear Accelerometers, 4 * 3d Gyroscopes, 5 * 3d Magnetometers via SPI 6 * 7 * Copyright (c) 2009 Manuel Stahl <manuel.stahl@iis.fraunhofer.de> 8 * Copyright (c) 2007 Jonathan Cameron <jic23@cam.ac.uk> 9 * Copyright (c) 2011 Analog Devices Inc. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 * 15 */ 16 17#include <linux/interrupt.h> 18#include <linux/irq.h> 19#include <linux/delay.h> 20#include <linux/mutex.h> 21#include <linux/device.h> 22#include <linux/kernel.h> 23#include <linux/spi/spi.h> 24#include <linux/slab.h> 25#include <linux/sysfs.h> 26#include <linux/list.h> 27#include <linux/module.h> 28 29#include "../iio.h" 30#include "../sysfs.h" 31#include "../buffer.h" 32#include "adis16400.h" 33 34enum adis16400_chip_variant { 35 ADIS16300, 36 ADIS16334, 37 ADIS16350, 38 ADIS16360, 39 ADIS16362, 40 ADIS16364, 41 ADIS16365, 42 ADIS16400, 43}; 44 45/** 46 * adis16400_spi_write_reg_8() - write single byte to a register 47 * @dev: device associated with child of actual device (iio_dev or iio_trig) 48 * @reg_address: the address of the register to be written 49 * @val: the value to write 50 */ 51static int adis16400_spi_write_reg_8(struct iio_dev *indio_dev, 52 u8 reg_address, 53 u8 val) 54{ 55 int ret; 56 struct adis16400_state *st = iio_priv(indio_dev); 57 58 mutex_lock(&st->buf_lock); 59 st->tx[0] = ADIS16400_WRITE_REG(reg_address); 60 st->tx[1] = val; 61 62 ret = spi_write(st->us, st->tx, 2); 63 mutex_unlock(&st->buf_lock); 64 65 return ret; 66} 67 68/** 69 * adis16400_spi_write_reg_16() - write 2 bytes to a pair of registers 70 * @dev: device associated with child of actual device (iio_dev or iio_trig) 71 * @reg_address: the address of the lower of the two registers. Second register 72 * is assumed to have address one greater. 73 * @val: value to be written 74 * 75 * At the moment the spi framework doesn't allow global setting of cs_change. 76 * This means that use cannot be made of spi_write. 77 */ 78static int adis16400_spi_write_reg_16(struct iio_dev *indio_dev, 79 u8 lower_reg_address, 80 u16 value) 81{ 82 int ret; 83 struct spi_message msg; 84 struct adis16400_state *st = iio_priv(indio_dev); 85 struct spi_transfer xfers[] = { 86 { 87 .tx_buf = st->tx, 88 .bits_per_word = 8, 89 .len = 2, 90 .cs_change = 1, 91 }, { 92 .tx_buf = st->tx + 2, 93 .bits_per_word = 8, 94 .len = 2, 95 }, 96 }; 97 98 mutex_lock(&st->buf_lock); 99 st->tx[0] = ADIS16400_WRITE_REG(lower_reg_address); 100 st->tx[1] = value & 0xFF; 101 st->tx[2] = ADIS16400_WRITE_REG(lower_reg_address + 1); 102 st->tx[3] = (value >> 8) & 0xFF; 103 104 spi_message_init(&msg); 105 spi_message_add_tail(&xfers[0], &msg); 106 spi_message_add_tail(&xfers[1], &msg); 107 ret = spi_sync(st->us, &msg); 108 mutex_unlock(&st->buf_lock); 109 110 return ret; 111} 112 113/** 114 * adis16400_spi_read_reg_16() - read 2 bytes from a 16-bit register 115 * @indio_dev: iio device 116 * @reg_address: the address of the lower of the two registers. Second register 117 * is assumed to have address one greater. 118 * @val: somewhere to pass back the value read 119 * 120 * At the moment the spi framework doesn't allow global setting of cs_change. 121 * This means that use cannot be made of spi_read. 122 **/ 123static int adis16400_spi_read_reg_16(struct iio_dev *indio_dev, 124 u8 lower_reg_address, 125 u16 *val) 126{ 127 struct spi_message msg; 128 struct adis16400_state *st = iio_priv(indio_dev); 129 int ret; 130 struct spi_transfer xfers[] = { 131 { 132 .tx_buf = st->tx, 133 .bits_per_word = 8, 134 .len = 2, 135 .cs_change = 1, 136 }, { 137 .rx_buf = st->rx, 138 .bits_per_word = 8, 139 .len = 2, 140 }, 141 }; 142 143 mutex_lock(&st->buf_lock); 144 st->tx[0] = ADIS16400_READ_REG(lower_reg_address); 145 st->tx[1] = 0; 146 147 spi_message_init(&msg); 148 spi_message_add_tail(&xfers[0], &msg); 149 spi_message_add_tail(&xfers[1], &msg); 150 ret = spi_sync(st->us, &msg); 151 if (ret) { 152 dev_err(&st->us->dev, 153 "problem when reading 16 bit register 0x%02X", 154 lower_reg_address); 155 goto error_ret; 156 } 157 *val = (st->rx[0] << 8) | st->rx[1]; 158 159error_ret: 160 mutex_unlock(&st->buf_lock); 161 return ret; 162} 163 164static int adis16400_get_freq(struct iio_dev *indio_dev) 165{ 166 u16 t; 167 int sps, ret; 168 169 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_SMPL_PRD, &t); 170 if (ret < 0) 171 return ret; 172 sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 53 : 1638; 173 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1; 174 175 return sps; 176} 177 178static ssize_t adis16400_read_frequency(struct device *dev, 179 struct device_attribute *attr, 180 char *buf) 181{ 182 struct iio_dev *indio_dev = dev_get_drvdata(dev); 183 int ret, len = 0; 184 ret = adis16400_get_freq(indio_dev); 185 if (ret < 0) 186 return ret; 187 len = sprintf(buf, "%d SPS\n", ret); 188 return len; 189} 190 191static const unsigned adis16400_3db_divisors[] = { 192 [0] = 2, /* Special case */ 193 [1] = 5, 194 [2] = 10, 195 [3] = 50, 196 [4] = 200, 197}; 198 199static int adis16400_set_filter(struct iio_dev *indio_dev, int sps, int val) 200{ 201 int i, ret; 202 u16 val16; 203 for (i = ARRAY_SIZE(adis16400_3db_divisors) - 1; i >= 0; i--) 204 if (sps/adis16400_3db_divisors[i] > val) 205 break; 206 if (i == -1) 207 ret = -EINVAL; 208 else { 209 ret = adis16400_spi_read_reg_16(indio_dev, 210 ADIS16400_SENS_AVG, 211 &val16); 212 if (ret < 0) 213 goto error_ret; 214 215 ret = adis16400_spi_write_reg_16(indio_dev, 216 ADIS16400_SENS_AVG, 217 (val16 & ~0x03) | i); 218 } 219error_ret: 220 return ret; 221} 222 223static ssize_t adis16400_write_frequency(struct device *dev, 224 struct device_attribute *attr, 225 const char *buf, 226 size_t len) 227{ 228 struct iio_dev *indio_dev = dev_get_drvdata(dev); 229 struct adis16400_state *st = iio_priv(indio_dev); 230 long val; 231 int ret; 232 u8 t; 233 234 ret = strict_strtol(buf, 10, &val); 235 if (ret) 236 return ret; 237 238 mutex_lock(&indio_dev->mlock); 239 240 t = (1638 / val); 241 if (t > 0) 242 t--; 243 t &= ADIS16400_SMPL_PRD_DIV_MASK; 244 if ((t & ADIS16400_SMPL_PRD_DIV_MASK) >= 0x0A) 245 st->us->max_speed_hz = ADIS16400_SPI_SLOW; 246 else 247 st->us->max_speed_hz = ADIS16400_SPI_FAST; 248 249 ret = adis16400_spi_write_reg_8(indio_dev, 250 ADIS16400_SMPL_PRD, 251 t); 252 253 /* Also update the filter */ 254 mutex_unlock(&indio_dev->mlock); 255 256 return ret ? ret : len; 257} 258 259static int adis16400_reset(struct iio_dev *indio_dev) 260{ 261 int ret; 262 ret = adis16400_spi_write_reg_8(indio_dev, 263 ADIS16400_GLOB_CMD, 264 ADIS16400_GLOB_CMD_SW_RESET); 265 if (ret) 266 dev_err(&indio_dev->dev, "problem resetting device"); 267 268 return ret; 269} 270 271static ssize_t adis16400_write_reset(struct device *dev, 272 struct device_attribute *attr, 273 const char *buf, size_t len) 274{ 275 bool val; 276 int ret; 277 278 ret = strtobool(buf, &val); 279 if (ret < 0) 280 return ret; 281 if (val) { 282 ret = adis16400_reset(dev_get_drvdata(dev)); 283 if (ret < 0) 284 return ret; 285 } 286 287 return len; 288} 289 290int adis16400_set_irq(struct iio_dev *indio_dev, bool enable) 291{ 292 int ret; 293 u16 msc; 294 295 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_MSC_CTRL, &msc); 296 if (ret) 297 goto error_ret; 298 299 msc |= ADIS16400_MSC_CTRL_DATA_RDY_POL_HIGH; 300 if (enable) 301 msc |= ADIS16400_MSC_CTRL_DATA_RDY_EN; 302 else 303 msc &= ~ADIS16400_MSC_CTRL_DATA_RDY_EN; 304 305 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_MSC_CTRL, msc); 306 if (ret) 307 goto error_ret; 308 309error_ret: 310 return ret; 311} 312 313/* Power down the device */ 314static int adis16400_stop_device(struct iio_dev *indio_dev) 315{ 316 int ret; 317 u16 val = ADIS16400_SLP_CNT_POWER_OFF; 318 319 ret = adis16400_spi_write_reg_16(indio_dev, ADIS16400_SLP_CNT, val); 320 if (ret) 321 dev_err(&indio_dev->dev, 322 "problem with turning device off: SLP_CNT"); 323 324 return ret; 325} 326 327static int adis16400_check_status(struct iio_dev *indio_dev) 328{ 329 u16 status; 330 int ret; 331 struct device *dev = &indio_dev->dev; 332 333 ret = adis16400_spi_read_reg_16(indio_dev, 334 ADIS16400_DIAG_STAT, &status); 335 336 if (ret < 0) { 337 dev_err(dev, "Reading status failed\n"); 338 goto error_ret; 339 } 340 ret = status; 341 if (status & ADIS16400_DIAG_STAT_ZACCL_FAIL) 342 dev_err(dev, "Z-axis accelerometer self-test failure\n"); 343 if (status & ADIS16400_DIAG_STAT_YACCL_FAIL) 344 dev_err(dev, "Y-axis accelerometer self-test failure\n"); 345 if (status & ADIS16400_DIAG_STAT_XACCL_FAIL) 346 dev_err(dev, "X-axis accelerometer self-test failure\n"); 347 if (status & ADIS16400_DIAG_STAT_XGYRO_FAIL) 348 dev_err(dev, "X-axis gyroscope self-test failure\n"); 349 if (status & ADIS16400_DIAG_STAT_YGYRO_FAIL) 350 dev_err(dev, "Y-axis gyroscope self-test failure\n"); 351 if (status & ADIS16400_DIAG_STAT_ZGYRO_FAIL) 352 dev_err(dev, "Z-axis gyroscope self-test failure\n"); 353 if (status & ADIS16400_DIAG_STAT_ALARM2) 354 dev_err(dev, "Alarm 2 active\n"); 355 if (status & ADIS16400_DIAG_STAT_ALARM1) 356 dev_err(dev, "Alarm 1 active\n"); 357 if (status & ADIS16400_DIAG_STAT_FLASH_CHK) 358 dev_err(dev, "Flash checksum error\n"); 359 if (status & ADIS16400_DIAG_STAT_SELF_TEST) 360 dev_err(dev, "Self test error\n"); 361 if (status & ADIS16400_DIAG_STAT_OVERFLOW) 362 dev_err(dev, "Sensor overrange\n"); 363 if (status & ADIS16400_DIAG_STAT_SPI_FAIL) 364 dev_err(dev, "SPI failure\n"); 365 if (status & ADIS16400_DIAG_STAT_FLASH_UPT) 366 dev_err(dev, "Flash update failed\n"); 367 if (status & ADIS16400_DIAG_STAT_POWER_HIGH) 368 dev_err(dev, "Power supply above 5.25V\n"); 369 if (status & ADIS16400_DIAG_STAT_POWER_LOW) 370 dev_err(dev, "Power supply below 4.75V\n"); 371 372error_ret: 373 return ret; 374} 375 376static int adis16400_self_test(struct iio_dev *indio_dev) 377{ 378 int ret; 379 ret = adis16400_spi_write_reg_16(indio_dev, 380 ADIS16400_MSC_CTRL, 381 ADIS16400_MSC_CTRL_MEM_TEST); 382 if (ret) { 383 dev_err(&indio_dev->dev, "problem starting self test"); 384 goto err_ret; 385 } 386 387 msleep(ADIS16400_MTEST_DELAY); 388 adis16400_check_status(indio_dev); 389 390err_ret: 391 return ret; 392} 393 394static int adis16400_initial_setup(struct iio_dev *indio_dev) 395{ 396 int ret; 397 u16 prod_id, smp_prd; 398 struct adis16400_state *st = iio_priv(indio_dev); 399 400 /* use low spi speed for init */ 401 st->us->max_speed_hz = ADIS16400_SPI_SLOW; 402 st->us->mode = SPI_MODE_3; 403 spi_setup(st->us); 404 405 ret = adis16400_set_irq(indio_dev, false); 406 if (ret) { 407 dev_err(&indio_dev->dev, "disable irq failed"); 408 goto err_ret; 409 } 410 411 ret = adis16400_self_test(indio_dev); 412 if (ret) { 413 dev_err(&indio_dev->dev, "self test failure"); 414 goto err_ret; 415 } 416 417 ret = adis16400_check_status(indio_dev); 418 if (ret) { 419 adis16400_reset(indio_dev); 420 dev_err(&indio_dev->dev, "device not playing ball -> reset"); 421 msleep(ADIS16400_STARTUP_DELAY); 422 ret = adis16400_check_status(indio_dev); 423 if (ret) { 424 dev_err(&indio_dev->dev, "giving up"); 425 goto err_ret; 426 } 427 } 428 if (st->variant->flags & ADIS16400_HAS_PROD_ID) { 429 ret = adis16400_spi_read_reg_16(indio_dev, 430 ADIS16400_PRODUCT_ID, &prod_id); 431 if (ret) 432 goto err_ret; 433 434 if ((prod_id & 0xF000) != st->variant->product_id) 435 dev_warn(&indio_dev->dev, "incorrect id"); 436 437 dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n", 438 indio_dev->name, prod_id, 439 st->us->chip_select, st->us->irq); 440 } 441 /* use high spi speed if possible */ 442 ret = adis16400_spi_read_reg_16(indio_dev, 443 ADIS16400_SMPL_PRD, &smp_prd); 444 if (!ret && (smp_prd & ADIS16400_SMPL_PRD_DIV_MASK) < 0x0A) { 445 st->us->max_speed_hz = ADIS16400_SPI_SLOW; 446 spi_setup(st->us); 447 } 448 449err_ret: 450 return ret; 451} 452 453static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, 454 adis16400_read_frequency, 455 adis16400_write_frequency); 456 457static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, adis16400_write_reset, 0); 458 459static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("409 546 819 1638"); 460 461enum adis16400_chan { 462 in_supply, 463 gyro_x, 464 gyro_y, 465 gyro_z, 466 accel_x, 467 accel_y, 468 accel_z, 469 magn_x, 470 magn_y, 471 magn_z, 472 temp, 473 temp0, temp1, temp2, 474 in1, 475 incli_x, 476 incli_y, 477}; 478 479static u8 adis16400_addresses[17][2] = { 480 [in_supply] = { ADIS16400_SUPPLY_OUT }, 481 [gyro_x] = { ADIS16400_XGYRO_OUT, ADIS16400_XGYRO_OFF }, 482 [gyro_y] = { ADIS16400_YGYRO_OUT, ADIS16400_YGYRO_OFF }, 483 [gyro_z] = { ADIS16400_ZGYRO_OUT, ADIS16400_ZGYRO_OFF }, 484 [accel_x] = { ADIS16400_XACCL_OUT, ADIS16400_XACCL_OFF }, 485 [accel_y] = { ADIS16400_YACCL_OUT, ADIS16400_YACCL_OFF }, 486 [accel_z] = { ADIS16400_ZACCL_OUT, ADIS16400_ZACCL_OFF }, 487 [magn_x] = { ADIS16400_XMAGN_OUT }, 488 [magn_y] = { ADIS16400_YMAGN_OUT }, 489 [magn_z] = { ADIS16400_ZMAGN_OUT }, 490 [temp] = { ADIS16400_TEMP_OUT }, 491 [temp0] = { ADIS16350_XTEMP_OUT }, 492 [temp1] = { ADIS16350_YTEMP_OUT }, 493 [temp2] = { ADIS16350_ZTEMP_OUT }, 494 [in1] = { ADIS16400_AUX_ADC }, 495 [incli_x] = { ADIS16300_PITCH_OUT }, 496 [incli_y] = { ADIS16300_ROLL_OUT } 497}; 498 499 500static int adis16400_write_raw(struct iio_dev *indio_dev, 501 struct iio_chan_spec const *chan, 502 int val, 503 int val2, 504 long mask) 505{ 506 struct adis16400_state *st = iio_priv(indio_dev); 507 int ret, sps; 508 509 switch (mask) { 510 case IIO_CHAN_INFO_CALIBBIAS: 511 mutex_lock(&indio_dev->mlock); 512 ret = adis16400_spi_write_reg_16(indio_dev, 513 adis16400_addresses[chan->address][1], 514 val); 515 mutex_unlock(&indio_dev->mlock); 516 return ret; 517 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 518 /* Need to cache values so we can update if the frequency 519 changes */ 520 mutex_lock(&indio_dev->mlock); 521 st->filt_int = val; 522 /* Work out update to current value */ 523 sps = adis16400_get_freq(indio_dev); 524 if (sps < 0) { 525 mutex_unlock(&indio_dev->mlock); 526 return sps; 527 } 528 529 ret = adis16400_set_filter(indio_dev, sps, val); 530 mutex_unlock(&indio_dev->mlock); 531 return ret; 532 default: 533 return -EINVAL; 534 } 535} 536 537static int adis16400_read_raw(struct iio_dev *indio_dev, 538 struct iio_chan_spec const *chan, 539 int *val, 540 int *val2, 541 long mask) 542{ 543 struct adis16400_state *st = iio_priv(indio_dev); 544 int ret, shift; 545 s16 val16; 546 547 switch (mask) { 548 case 0: 549 mutex_lock(&indio_dev->mlock); 550 ret = adis16400_spi_read_reg_16(indio_dev, 551 adis16400_addresses[chan->address][0], 552 &val16); 553 if (ret) { 554 mutex_unlock(&indio_dev->mlock); 555 return ret; 556 } 557 val16 &= (1 << chan->scan_type.realbits) - 1; 558 if (chan->scan_type.sign == 's') { 559 shift = 16 - chan->scan_type.realbits; 560 val16 = (s16)(val16 << shift) >> shift; 561 } 562 *val = val16; 563 mutex_unlock(&indio_dev->mlock); 564 return IIO_VAL_INT; 565 case IIO_CHAN_INFO_SCALE: 566 switch (chan->type) { 567 case IIO_ANGL_VEL: 568 *val = 0; 569 *val2 = st->variant->gyro_scale_micro; 570 return IIO_VAL_INT_PLUS_MICRO; 571 case IIO_VOLTAGE: 572 *val = 0; 573 if (chan->channel == 0) 574 *val2 = 2418; 575 else 576 *val2 = 806; 577 return IIO_VAL_INT_PLUS_MICRO; 578 case IIO_ACCEL: 579 *val = 0; 580 *val2 = st->variant->accel_scale_micro; 581 return IIO_VAL_INT_PLUS_MICRO; 582 case IIO_MAGN: 583 *val = 0; 584 *val2 = 500; 585 return IIO_VAL_INT_PLUS_MICRO; 586 case IIO_TEMP: 587 *val = 0; 588 *val2 = 140000; 589 return IIO_VAL_INT_PLUS_MICRO; 590 default: 591 return -EINVAL; 592 } 593 case IIO_CHAN_INFO_CALIBBIAS: 594 mutex_lock(&indio_dev->mlock); 595 ret = adis16400_spi_read_reg_16(indio_dev, 596 adis16400_addresses[chan->address][1], 597 &val16); 598 mutex_unlock(&indio_dev->mlock); 599 if (ret) 600 return ret; 601 val16 = ((val16 & 0xFFF) << 4) >> 4; 602 *val = val16; 603 return IIO_VAL_INT; 604 case IIO_CHAN_INFO_OFFSET: 605 /* currently only temperature */ 606 *val = 198; 607 *val2 = 160000; 608 return IIO_VAL_INT_PLUS_MICRO; 609 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 610 mutex_lock(&indio_dev->mlock); 611 /* Need both the number of taps and the sampling frequency */ 612 ret = adis16400_spi_read_reg_16(indio_dev, 613 ADIS16400_SENS_AVG, 614 &val16); 615 if (ret < 0) { 616 mutex_unlock(&indio_dev->mlock); 617 return ret; 618 } 619 ret = adis16400_get_freq(indio_dev); 620 if (ret > 0) 621 *val = ret/adis16400_3db_divisors[val16 & 0x03]; 622 *val2 = 0; 623 mutex_unlock(&indio_dev->mlock); 624 if (ret < 0) 625 return ret; 626 return IIO_VAL_INT_PLUS_MICRO; 627 default: 628 return -EINVAL; 629 } 630} 631 632static struct iio_chan_spec adis16400_channels[] = { 633 { 634 .type = IIO_VOLTAGE, 635 .indexed = 1, 636 .channel = 0, 637 .extend_name = "supply", 638 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 639 .address = in_supply, 640 .scan_index = ADIS16400_SCAN_SUPPLY, 641 .scan_type = IIO_ST('u', 14, 16, 0) 642 }, { 643 .type = IIO_ANGL_VEL, 644 .modified = 1, 645 .channel2 = IIO_MOD_X, 646 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 647 IIO_CHAN_INFO_SCALE_SHARED_BIT | 648 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 649 .address = gyro_x, 650 .scan_index = ADIS16400_SCAN_GYRO_X, 651 .scan_type = IIO_ST('s', 14, 16, 0) 652 }, { 653 .type = IIO_ANGL_VEL, 654 .modified = 1, 655 .channel2 = IIO_MOD_Y, 656 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 657 IIO_CHAN_INFO_SCALE_SHARED_BIT | 658 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 659 .address = gyro_y, 660 .scan_index = ADIS16400_SCAN_GYRO_Y, 661 .scan_type = IIO_ST('s', 14, 16, 0), 662 }, { 663 .type = IIO_ANGL_VEL, 664 .modified = 1, 665 .channel2 = IIO_MOD_Z, 666 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 667 IIO_CHAN_INFO_SCALE_SHARED_BIT | 668 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 669 .address = gyro_z, 670 .scan_index = ADIS16400_SCAN_GYRO_Z, 671 .scan_type = IIO_ST('s', 14, 16, 0), 672 }, { 673 .type = IIO_ACCEL, 674 .modified = 1, 675 .channel2 = IIO_MOD_X, 676 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 677 IIO_CHAN_INFO_SCALE_SHARED_BIT | 678 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 679 .address = accel_x, 680 .scan_index = ADIS16400_SCAN_ACC_X, 681 .scan_type = IIO_ST('s', 14, 16, 0), 682 }, { 683 .type = IIO_ACCEL, 684 .modified = 1, 685 .channel2 = IIO_MOD_Y, 686 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 687 IIO_CHAN_INFO_SCALE_SHARED_BIT | 688 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 689 .address = accel_y, 690 .scan_index = ADIS16400_SCAN_ACC_Y, 691 .scan_type = IIO_ST('s', 14, 16, 0), 692 }, { 693 .type = IIO_ACCEL, 694 .modified = 1, 695 .channel2 = IIO_MOD_Z, 696 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 697 IIO_CHAN_INFO_SCALE_SHARED_BIT | 698 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 699 .address = accel_z, 700 .scan_index = ADIS16400_SCAN_ACC_Z, 701 .scan_type = IIO_ST('s', 14, 16, 0), 702 }, { 703 .type = IIO_MAGN, 704 .modified = 1, 705 .channel2 = IIO_MOD_X, 706 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT | 707 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 708 .address = magn_x, 709 .scan_index = ADIS16400_SCAN_MAGN_X, 710 .scan_type = IIO_ST('s', 14, 16, 0), 711 }, { 712 .type = IIO_MAGN, 713 .modified = 1, 714 .channel2 = IIO_MOD_Y, 715 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT | 716 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 717 .address = magn_y, 718 .scan_index = ADIS16400_SCAN_MAGN_Y, 719 .scan_type = IIO_ST('s', 14, 16, 0), 720 }, { 721 .type = IIO_MAGN, 722 .modified = 1, 723 .channel2 = IIO_MOD_Z, 724 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT | 725 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 726 .address = magn_z, 727 .scan_index = ADIS16400_SCAN_MAGN_Z, 728 .scan_type = IIO_ST('s', 14, 16, 0), 729 }, { 730 .type = IIO_TEMP, 731 .indexed = 1, 732 .channel = 0, 733 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 734 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 735 .address = temp, 736 .scan_index = ADIS16400_SCAN_TEMP, 737 .scan_type = IIO_ST('s', 12, 16, 0), 738 }, { 739 .type = IIO_VOLTAGE, 740 .indexed = 1, 741 .channel = 1, 742 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 743 .address = in1, 744 .scan_index = ADIS16400_SCAN_ADC_0, 745 .scan_type = IIO_ST('s', 12, 16, 0), 746 }, 747 IIO_CHAN_SOFT_TIMESTAMP(12) 748}; 749 750static struct iio_chan_spec adis16350_channels[] = { 751 { 752 .type = IIO_VOLTAGE, 753 .indexed = 1, 754 .channel = 0, 755 .extend_name = "supply", 756 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 757 .address = in_supply, 758 .scan_index = ADIS16400_SCAN_SUPPLY, 759 .scan_type = IIO_ST('u', 12, 16, 0) 760 }, { 761 .type = IIO_ANGL_VEL, 762 .modified = 1, 763 .channel2 = IIO_MOD_X, 764 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 765 IIO_CHAN_INFO_SCALE_SHARED_BIT | 766 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 767 .address = gyro_x, 768 .scan_index = ADIS16400_SCAN_GYRO_X, 769 .scan_type = IIO_ST('s', 14, 16, 0) 770 }, { 771 .type = IIO_ANGL_VEL, 772 .modified = 1, 773 .channel2 = IIO_MOD_Y, 774 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 775 IIO_CHAN_INFO_SCALE_SHARED_BIT | 776 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 777 .address = gyro_y, 778 .scan_index = ADIS16400_SCAN_GYRO_Y, 779 .scan_type = IIO_ST('s', 14, 16, 0), 780 }, { 781 .type = IIO_ANGL_VEL, 782 .modified = 1, 783 .channel2 = IIO_MOD_Z, 784 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 785 IIO_CHAN_INFO_SCALE_SHARED_BIT | 786 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 787 .address = gyro_z, 788 .scan_index = ADIS16400_SCAN_GYRO_Z, 789 .scan_type = IIO_ST('s', 14, 16, 0), 790 }, { 791 .type = IIO_ACCEL, 792 .modified = 1, 793 .channel2 = IIO_MOD_X, 794 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 795 IIO_CHAN_INFO_SCALE_SHARED_BIT | 796 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 797 .address = accel_x, 798 .scan_index = ADIS16400_SCAN_ACC_X, 799 .scan_type = IIO_ST('s', 14, 16, 0), 800 }, { 801 .type = IIO_ACCEL, 802 .modified = 1, 803 .channel2 = IIO_MOD_Y, 804 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 805 IIO_CHAN_INFO_SCALE_SHARED_BIT | 806 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 807 .address = accel_y, 808 .scan_index = ADIS16400_SCAN_ACC_Y, 809 .scan_type = IIO_ST('s', 14, 16, 0), 810 }, { 811 .type = IIO_ACCEL, 812 .modified = 1, 813 .channel2 = IIO_MOD_Z, 814 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 815 IIO_CHAN_INFO_SCALE_SHARED_BIT | 816 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 817 .address = accel_z, 818 .scan_index = ADIS16400_SCAN_ACC_Z, 819 .scan_type = IIO_ST('s', 14, 16, 0), 820 }, { 821 .type = IIO_TEMP, 822 .indexed = 1, 823 .channel = 0, 824 .extend_name = "x", 825 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 826 IIO_CHAN_INFO_SCALE_SEPARATE_BIT | 827 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 828 .address = temp0, 829 .scan_index = ADIS16350_SCAN_TEMP_X, 830 .scan_type = IIO_ST('s', 12, 16, 0), 831 }, { 832 .type = IIO_TEMP, 833 .indexed = 1, 834 .channel = 1, 835 .extend_name = "y", 836 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 837 IIO_CHAN_INFO_SCALE_SEPARATE_BIT | 838 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 839 .address = temp1, 840 .scan_index = ADIS16350_SCAN_TEMP_Y, 841 .scan_type = IIO_ST('s', 12, 16, 0), 842 }, { 843 .type = IIO_TEMP, 844 .indexed = 1, 845 .channel = 2, 846 .extend_name = "z", 847 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 848 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 849 .address = temp2, 850 .scan_index = ADIS16350_SCAN_TEMP_Z, 851 .scan_type = IIO_ST('s', 12, 16, 0), 852 }, { 853 .type = IIO_VOLTAGE, 854 .indexed = 1, 855 .channel = 1, 856 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 857 .address = in1, 858 .scan_index = ADIS16350_SCAN_ADC_0, 859 .scan_type = IIO_ST('s', 12, 16, 0), 860 }, 861 IIO_CHAN_SOFT_TIMESTAMP(11) 862}; 863 864static struct iio_chan_spec adis16300_channels[] = { 865 { 866 .type = IIO_VOLTAGE, 867 .indexed = 1, 868 .channel = 0, 869 .extend_name = "supply", 870 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 871 .address = in_supply, 872 .scan_index = ADIS16400_SCAN_SUPPLY, 873 .scan_type = IIO_ST('u', 12, 16, 0) 874 }, { 875 .type = IIO_ANGL_VEL, 876 .modified = 1, 877 .channel2 = IIO_MOD_X, 878 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 879 IIO_CHAN_INFO_SCALE_SHARED_BIT | 880 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 881 .address = gyro_x, 882 .scan_index = ADIS16400_SCAN_GYRO_X, 883 .scan_type = IIO_ST('s', 14, 16, 0), 884 }, { 885 .type = IIO_ACCEL, 886 .modified = 1, 887 .channel2 = IIO_MOD_X, 888 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 889 IIO_CHAN_INFO_SCALE_SHARED_BIT | 890 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 891 .address = accel_x, 892 .scan_index = ADIS16400_SCAN_ACC_X, 893 .scan_type = IIO_ST('s', 14, 16, 0), 894 }, { 895 .type = IIO_ACCEL, 896 .modified = 1, 897 .channel2 = IIO_MOD_Y, 898 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 899 IIO_CHAN_INFO_SCALE_SHARED_BIT | 900 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 901 .address = accel_y, 902 .scan_index = ADIS16400_SCAN_ACC_Y, 903 .scan_type = IIO_ST('s', 14, 16, 0), 904 }, { 905 .type = IIO_ACCEL, 906 .modified = 1, 907 .channel2 = IIO_MOD_Z, 908 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 909 IIO_CHAN_INFO_SCALE_SHARED_BIT | 910 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 911 .address = accel_z, 912 .scan_index = ADIS16400_SCAN_ACC_Z, 913 .scan_type = IIO_ST('s', 14, 16, 0), 914 }, { 915 .type = IIO_TEMP, 916 .indexed = 1, 917 .channel = 0, 918 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | 919 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 920 .address = temp, 921 .scan_index = ADIS16400_SCAN_TEMP, 922 .scan_type = IIO_ST('s', 12, 16, 0), 923 }, { 924 .type = IIO_VOLTAGE, 925 .indexed = 1, 926 .channel = 1, 927 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 928 .address = in1, 929 .scan_index = ADIS16350_SCAN_ADC_0, 930 .scan_type = IIO_ST('s', 12, 16, 0), 931 }, { 932 .type = IIO_INCLI, 933 .modified = 1, 934 .channel2 = IIO_MOD_X, 935 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, 936 .address = incli_x, 937 .scan_index = ADIS16300_SCAN_INCLI_X, 938 .scan_type = IIO_ST('s', 13, 16, 0), 939 }, { 940 .type = IIO_INCLI, 941 .modified = 1, 942 .channel2 = IIO_MOD_Y, 943 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, 944 .address = incli_y, 945 .scan_index = ADIS16300_SCAN_INCLI_Y, 946 .scan_type = IIO_ST('s', 13, 16, 0), 947 }, 948 IIO_CHAN_SOFT_TIMESTAMP(14) 949}; 950 951static const struct iio_chan_spec adis16334_channels[] = { 952 { 953 .type = IIO_ANGL_VEL, 954 .modified = 1, 955 .channel2 = IIO_MOD_X, 956 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 957 IIO_CHAN_INFO_SCALE_SHARED_BIT | 958 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 959 .address = gyro_x, 960 .scan_index = ADIS16400_SCAN_GYRO_X, 961 .scan_type = IIO_ST('s', 14, 16, 0), 962 }, { 963 .type = IIO_ANGL_VEL, 964 .modified = 1, 965 .channel2 = IIO_MOD_Y, 966 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 967 IIO_CHAN_INFO_SCALE_SHARED_BIT | 968 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 969 .address = gyro_y, 970 .scan_index = ADIS16400_SCAN_GYRO_Y, 971 .scan_type = IIO_ST('s', 14, 16, 0), 972 }, { 973 .type = IIO_ANGL_VEL, 974 .modified = 1, 975 .channel2 = IIO_MOD_Z, 976 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 977 IIO_CHAN_INFO_SCALE_SHARED_BIT | 978 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 979 .address = gyro_z, 980 .scan_index = ADIS16400_SCAN_GYRO_Z, 981 .scan_type = IIO_ST('s', 14, 16, 0), 982 }, { 983 .type = IIO_ACCEL, 984 .modified = 1, 985 .channel2 = IIO_MOD_X, 986 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 987 IIO_CHAN_INFO_SCALE_SHARED_BIT | 988 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 989 .address = accel_x, 990 .scan_index = ADIS16400_SCAN_ACC_X, 991 .scan_type = IIO_ST('s', 14, 16, 0), 992 }, { 993 .type = IIO_ACCEL, 994 .modified = 1, 995 .channel2 = IIO_MOD_Y, 996 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 997 IIO_CHAN_INFO_SCALE_SHARED_BIT | 998 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 999 .address = accel_y, 1000 .scan_index = ADIS16400_SCAN_ACC_Y, 1001 .scan_type = IIO_ST('s', 14, 16, 0), 1002 }, { 1003 .type = IIO_ACCEL, 1004 .modified = 1, 1005 .channel2 = IIO_MOD_Z, 1006 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 1007 IIO_CHAN_INFO_SCALE_SHARED_BIT | 1008 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 1009 .address = accel_z, 1010 .scan_index = ADIS16400_SCAN_ACC_Z, 1011 .scan_type = IIO_ST('s', 14, 16, 0), 1012 }, { 1013 .type = IIO_TEMP, 1014 .indexed = 1, 1015 .channel = 0, 1016 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | 1017 IIO_CHAN_INFO_SCALE_SHARED_BIT, 1018 .address = accel_z, 1019 .scan_index = ADIS16400_SCAN_ACC_Z, 1020 .scan_type = IIO_ST('s', 14, 16, 0), 1021 }, 1022 IIO_CHAN_SOFT_TIMESTAMP(12) 1023}; 1024 1025static struct attribute *adis16400_attributes[] = { 1026 &iio_dev_attr_sampling_frequency.dev_attr.attr, 1027 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1028 &iio_dev_attr_reset.dev_attr.attr, 1029 NULL 1030}; 1031 1032static const struct attribute_group adis16400_attribute_group = { 1033 .attrs = adis16400_attributes, 1034}; 1035 1036static struct adis16400_chip_info adis16400_chips[] = { 1037 [ADIS16300] = { 1038 .channels = adis16300_channels, 1039 .num_channels = ARRAY_SIZE(adis16300_channels), 1040 .gyro_scale_micro = 873, 1041 .accel_scale_micro = 5884, 1042 .default_scan_mask = (1 << ADIS16400_SCAN_SUPPLY) | 1043 (1 << ADIS16400_SCAN_GYRO_X) | (1 << ADIS16400_SCAN_ACC_X) | 1044 (1 << ADIS16400_SCAN_ACC_Y) | (1 << ADIS16400_SCAN_ACC_Z) | 1045 (1 << ADIS16400_SCAN_TEMP) | (1 << ADIS16400_SCAN_ADC_0) | 1046 (1 << ADIS16300_SCAN_INCLI_X) | (1 << ADIS16300_SCAN_INCLI_Y) | 1047 (1 << 14), 1048 }, 1049 [ADIS16334] = { 1050 .channels = adis16334_channels, 1051 .num_channels = ARRAY_SIZE(adis16334_channels), 1052 .gyro_scale_micro = 873, 1053 .accel_scale_micro = 981, 1054 .default_scan_mask = (1 << ADIS16400_SCAN_GYRO_X) | 1055 (1 << ADIS16400_SCAN_GYRO_Y) | (1 << ADIS16400_SCAN_GYRO_Z) | 1056 (1 << ADIS16400_SCAN_ACC_X) | (1 << ADIS16400_SCAN_ACC_Y) | 1057 (1 << ADIS16400_SCAN_ACC_Z), 1058 }, 1059 [ADIS16350] = { 1060 .channels = adis16350_channels, 1061 .num_channels = ARRAY_SIZE(adis16350_channels), 1062 .gyro_scale_micro = 872664, 1063 .accel_scale_micro = 24732, 1064 .default_scan_mask = 0x7FF, 1065 .flags = ADIS16400_NO_BURST, 1066 }, 1067 [ADIS16360] = { 1068 .channels = adis16350_channels, 1069 .num_channels = ARRAY_SIZE(adis16350_channels), 1070 .flags = ADIS16400_HAS_PROD_ID, 1071 .product_id = 0x3FE8, 1072 .gyro_scale_micro = 1279, 1073 .accel_scale_micro = 24732, 1074 .default_scan_mask = 0x7FF, 1075 }, 1076 [ADIS16362] = { 1077 .channels = adis16350_channels, 1078 .num_channels = ARRAY_SIZE(adis16350_channels), 1079 .flags = ADIS16400_HAS_PROD_ID, 1080 .product_id = 0x3FEA, 1081 .gyro_scale_micro = 1279, 1082 .accel_scale_micro = 24732, 1083 .default_scan_mask = 0x7FF, 1084 }, 1085 [ADIS16364] = { 1086 .channels = adis16350_channels, 1087 .num_channels = ARRAY_SIZE(adis16350_channels), 1088 .flags = ADIS16400_HAS_PROD_ID, 1089 .product_id = 0x3FEC, 1090 .gyro_scale_micro = 1279, 1091 .accel_scale_micro = 24732, 1092 .default_scan_mask = 0x7FF, 1093 }, 1094 [ADIS16365] = { 1095 .channels = adis16350_channels, 1096 .num_channels = ARRAY_SIZE(adis16350_channels), 1097 .flags = ADIS16400_HAS_PROD_ID, 1098 .product_id = 0x3FED, 1099 .gyro_scale_micro = 1279, 1100 .accel_scale_micro = 24732, 1101 .default_scan_mask = 0x7FF, 1102 }, 1103 [ADIS16400] = { 1104 .channels = adis16400_channels, 1105 .num_channels = ARRAY_SIZE(adis16400_channels), 1106 .flags = ADIS16400_HAS_PROD_ID, 1107 .product_id = 0x4015, 1108 .gyro_scale_micro = 873, 1109 .accel_scale_micro = 32656, 1110 .default_scan_mask = 0xFFF, 1111 } 1112}; 1113 1114static const struct iio_info adis16400_info = { 1115 .driver_module = THIS_MODULE, 1116 .read_raw = &adis16400_read_raw, 1117 .write_raw = &adis16400_write_raw, 1118 .attrs = &adis16400_attribute_group, 1119}; 1120 1121static int __devinit adis16400_probe(struct spi_device *spi) 1122{ 1123 int ret; 1124 struct adis16400_state *st; 1125 struct iio_dev *indio_dev = iio_allocate_device(sizeof(*st)); 1126 if (indio_dev == NULL) { 1127 ret = -ENOMEM; 1128 goto error_ret; 1129 } 1130 st = iio_priv(indio_dev); 1131 /* this is only used for removal purposes */ 1132 spi_set_drvdata(spi, indio_dev); 1133 1134 st->us = spi; 1135 mutex_init(&st->buf_lock); 1136 1137 /* setup the industrialio driver allocated elements */ 1138 st->variant = &adis16400_chips[spi_get_device_id(spi)->driver_data]; 1139 indio_dev->dev.parent = &spi->dev; 1140 indio_dev->name = spi_get_device_id(spi)->name; 1141 indio_dev->channels = st->variant->channels; 1142 indio_dev->num_channels = st->variant->num_channels; 1143 indio_dev->info = &adis16400_info; 1144 indio_dev->modes = INDIO_DIRECT_MODE; 1145 1146 ret = adis16400_configure_ring(indio_dev); 1147 if (ret) 1148 goto error_free_dev; 1149 1150 ret = iio_buffer_register(indio_dev, 1151 st->variant->channels, 1152 st->variant->num_channels); 1153 if (ret) { 1154 dev_err(&spi->dev, "failed to initialize the ring\n"); 1155 goto error_unreg_ring_funcs; 1156 } 1157 1158 if (spi->irq) { 1159 ret = adis16400_probe_trigger(indio_dev); 1160 if (ret) 1161 goto error_uninitialize_ring; 1162 } 1163 1164 /* Get the device into a sane initial state */ 1165 ret = adis16400_initial_setup(indio_dev); 1166 if (ret) 1167 goto error_remove_trigger; 1168 ret = iio_device_register(indio_dev); 1169 if (ret) 1170 goto error_remove_trigger; 1171 1172 return 0; 1173 1174error_remove_trigger: 1175 if (indio_dev->modes & INDIO_BUFFER_TRIGGERED) 1176 adis16400_remove_trigger(indio_dev); 1177error_uninitialize_ring: 1178 iio_buffer_unregister(indio_dev); 1179error_unreg_ring_funcs: 1180 adis16400_unconfigure_ring(indio_dev); 1181error_free_dev: 1182 iio_free_device(indio_dev); 1183error_ret: 1184 return ret; 1185} 1186 1187/* fixme, confirm ordering in this function */ 1188static int adis16400_remove(struct spi_device *spi) 1189{ 1190 int ret; 1191 struct iio_dev *indio_dev = spi_get_drvdata(spi); 1192 1193 iio_device_unregister(indio_dev); 1194 ret = adis16400_stop_device(indio_dev); 1195 if (ret) 1196 goto err_ret; 1197 1198 adis16400_remove_trigger(indio_dev); 1199 iio_buffer_unregister(indio_dev); 1200 adis16400_unconfigure_ring(indio_dev); 1201 iio_free_device(indio_dev); 1202 1203 return 0; 1204 1205err_ret: 1206 return ret; 1207} 1208 1209static const struct spi_device_id adis16400_id[] = { 1210 {"adis16300", ADIS16300}, 1211 {"adis16334", ADIS16334}, 1212 {"adis16350", ADIS16350}, 1213 {"adis16354", ADIS16350}, 1214 {"adis16355", ADIS16350}, 1215 {"adis16360", ADIS16360}, 1216 {"adis16362", ADIS16362}, 1217 {"adis16364", ADIS16364}, 1218 {"adis16365", ADIS16365}, 1219 {"adis16400", ADIS16400}, 1220 {"adis16405", ADIS16400}, 1221 {} 1222}; 1223MODULE_DEVICE_TABLE(spi, adis16400_id); 1224 1225static struct spi_driver adis16400_driver = { 1226 .driver = { 1227 .name = "adis16400", 1228 .owner = THIS_MODULE, 1229 }, 1230 .id_table = adis16400_id, 1231 .probe = adis16400_probe, 1232 .remove = __devexit_p(adis16400_remove), 1233}; 1234module_spi_driver(adis16400_driver); 1235 1236MODULE_AUTHOR("Manuel Stahl <manuel.stahl@iis.fraunhofer.de>"); 1237MODULE_DESCRIPTION("Analog Devices ADIS16400/5 IMU SPI driver"); 1238MODULE_LICENSE("GPL v2"); 1239