1/* 2 * drivers/staging/omapdrm/omap_plane.c 3 * 4 * Copyright (C) 2011 Texas Instruments 5 * Author: Rob Clark <rob.clark@linaro.org> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published by 9 * the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 * You should have received a copy of the GNU General Public License along with 17 * this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20#include <linux/kfifo.h> 21 22#include "omap_drv.h" 23 24/* some hackery because omapdss has an 'enum omap_plane' (which would be 25 * better named omap_plane_id).. and compiler seems unhappy about having 26 * both a 'struct omap_plane' and 'enum omap_plane' 27 */ 28#define omap_plane _omap_plane 29 30/* 31 * plane funcs 32 */ 33 34struct callback { 35 void (*fxn)(void *); 36 void *arg; 37}; 38 39#define to_omap_plane(x) container_of(x, struct omap_plane, base) 40 41struct omap_plane { 42 struct drm_plane base; 43 struct omap_overlay *ovl; 44 struct omap_overlay_info info; 45 46 /* Source values, converted to integers because we don't support 47 * fractional positions: 48 */ 49 unsigned int src_x, src_y; 50 51 /* last fb that we pinned: */ 52 struct drm_framebuffer *pinned_fb; 53 54 uint32_t nformats; 55 uint32_t formats[32]; 56 57 /* for synchronizing access to unpins fifo */ 58 struct mutex unpin_mutex; 59 60 /* set of bo's pending unpin until next END_WIN irq */ 61 DECLARE_KFIFO_PTR(unpin_fifo, struct drm_gem_object *); 62 int num_unpins, pending_num_unpins; 63 64 /* for deferred unpin when we need to wait for scanout complete irq */ 65 struct work_struct work; 66 67 /* callback on next endwin irq */ 68 struct callback endwin; 69}; 70 71/* map from ovl->id to the irq we are interested in for scanout-done */ 72static const uint32_t id2irq[] = { 73 [OMAP_DSS_GFX] = DISPC_IRQ_GFX_END_WIN, 74 [OMAP_DSS_VIDEO1] = DISPC_IRQ_VID1_END_WIN, 75 [OMAP_DSS_VIDEO2] = DISPC_IRQ_VID2_END_WIN, 76 [OMAP_DSS_VIDEO3] = DISPC_IRQ_VID3_END_WIN, 77}; 78 79static void dispc_isr(void *arg, uint32_t mask) 80{ 81 struct drm_plane *plane = arg; 82 struct omap_plane *omap_plane = to_omap_plane(plane); 83 struct omap_drm_private *priv = plane->dev->dev_private; 84 85 omap_dispc_unregister_isr(dispc_isr, plane, 86 id2irq[omap_plane->ovl->id]); 87 88 queue_work(priv->wq, &omap_plane->work); 89} 90 91static void unpin_worker(struct work_struct *work) 92{ 93 struct omap_plane *omap_plane = 94 container_of(work, struct omap_plane, work); 95 struct callback endwin; 96 97 mutex_lock(&omap_plane->unpin_mutex); 98 DBG("unpinning %d of %d", omap_plane->num_unpins, 99 omap_plane->num_unpins + omap_plane->pending_num_unpins); 100 while (omap_plane->num_unpins > 0) { 101 struct drm_gem_object *bo = NULL; 102 int ret = kfifo_get(&omap_plane->unpin_fifo, &bo); 103 WARN_ON(!ret); 104 omap_gem_put_paddr(bo); 105 drm_gem_object_unreference_unlocked(bo); 106 omap_plane->num_unpins--; 107 } 108 endwin = omap_plane->endwin; 109 omap_plane->endwin.fxn = NULL; 110 mutex_unlock(&omap_plane->unpin_mutex); 111 112 if (endwin.fxn) 113 endwin.fxn(endwin.arg); 114} 115 116static void install_irq(struct drm_plane *plane) 117{ 118 struct omap_plane *omap_plane = to_omap_plane(plane); 119 struct omap_overlay *ovl = omap_plane->ovl; 120 int ret; 121 122 ret = omap_dispc_register_isr(dispc_isr, plane, id2irq[ovl->id]); 123 124 /* 125 * omapdss has upper limit on # of registered irq handlers, 126 * which we shouldn't hit.. but if we do the limit should 127 * be raised or bad things happen: 128 */ 129 WARN_ON(ret == -EBUSY); 130} 131 132/* push changes down to dss2 */ 133static int commit(struct drm_plane *plane) 134{ 135 struct drm_device *dev = plane->dev; 136 struct omap_plane *omap_plane = to_omap_plane(plane); 137 struct omap_overlay *ovl = omap_plane->ovl; 138 struct omap_overlay_info *info = &omap_plane->info; 139 int ret; 140 141 DBG("%s", ovl->name); 142 DBG("%dx%d -> %dx%d (%d)", info->width, info->height, info->out_width, 143 info->out_height, info->screen_width); 144 DBG("%d,%d %08x %08x", info->pos_x, info->pos_y, 145 info->paddr, info->p_uv_addr); 146 147 /* NOTE: do we want to do this at all here, or just wait 148 * for dpms(ON) since other CRTC's may not have their mode 149 * set yet, so fb dimensions may still change.. 150 */ 151 ret = ovl->set_overlay_info(ovl, info); 152 if (ret) { 153 dev_err(dev->dev, "could not set overlay info\n"); 154 return ret; 155 } 156 157 mutex_lock(&omap_plane->unpin_mutex); 158 omap_plane->num_unpins += omap_plane->pending_num_unpins; 159 omap_plane->pending_num_unpins = 0; 160 mutex_unlock(&omap_plane->unpin_mutex); 161 162 /* our encoder doesn't necessarily get a commit() after this, in 163 * particular in the dpms() and mode_set_base() cases, so force the 164 * manager to update: 165 * 166 * could this be in the encoder somehow? 167 */ 168 if (ovl->manager) { 169 ret = ovl->manager->apply(ovl->manager); 170 if (ret) { 171 dev_err(dev->dev, "could not apply settings\n"); 172 return ret; 173 } 174 175 /* 176 * NOTE: really this should be atomic w/ mgr->apply() but 177 * omapdss does not expose such an API 178 */ 179 if (omap_plane->num_unpins > 0) 180 install_irq(plane); 181 182 } else { 183 struct omap_drm_private *priv = dev->dev_private; 184 queue_work(priv->wq, &omap_plane->work); 185 } 186 187 188 if (ovl->is_enabled(ovl)) { 189 omap_framebuffer_flush(plane->fb, info->pos_x, info->pos_y, 190 info->out_width, info->out_height); 191 } 192 193 return 0; 194} 195 196/* when CRTC that we are attached to has potentially changed, this checks 197 * if we are attached to proper manager, and if necessary updates. 198 */ 199static void update_manager(struct drm_plane *plane) 200{ 201 struct omap_drm_private *priv = plane->dev->dev_private; 202 struct omap_plane *omap_plane = to_omap_plane(plane); 203 struct omap_overlay *ovl = omap_plane->ovl; 204 struct omap_overlay_manager *mgr = NULL; 205 int i; 206 207 if (plane->crtc) { 208 for (i = 0; i < priv->num_encoders; i++) { 209 struct drm_encoder *encoder = priv->encoders[i]; 210 if (encoder->crtc == plane->crtc) { 211 mgr = omap_encoder_get_manager(encoder); 212 break; 213 } 214 } 215 } 216 217 if (ovl->manager != mgr) { 218 bool enabled = ovl->is_enabled(ovl); 219 220 /* don't switch things around with enabled overlays: */ 221 if (enabled) 222 omap_plane_dpms(plane, DRM_MODE_DPMS_OFF); 223 224 if (ovl->manager) { 225 DBG("disconnecting %s from %s", ovl->name, 226 ovl->manager->name); 227 ovl->unset_manager(ovl); 228 } 229 230 if (mgr) { 231 DBG("connecting %s to %s", ovl->name, mgr->name); 232 ovl->set_manager(ovl, mgr); 233 } 234 235 if (enabled && mgr) 236 omap_plane_dpms(plane, DRM_MODE_DPMS_ON); 237 } 238} 239 240static void unpin(void *arg, struct drm_gem_object *bo) 241{ 242 struct drm_plane *plane = arg; 243 struct omap_plane *omap_plane = to_omap_plane(plane); 244 245 if (kfifo_put(&omap_plane->unpin_fifo, 246 (const struct drm_gem_object **)&bo)) { 247 omap_plane->pending_num_unpins++; 248 /* also hold a ref so it isn't free'd while pinned */ 249 drm_gem_object_reference(bo); 250 } else { 251 dev_err(plane->dev->dev, "unpin fifo full!\n"); 252 omap_gem_put_paddr(bo); 253 } 254} 255 256/* update which fb (if any) is pinned for scanout */ 257static int update_pin(struct drm_plane *plane, struct drm_framebuffer *fb) 258{ 259 struct omap_plane *omap_plane = to_omap_plane(plane); 260 struct drm_framebuffer *pinned_fb = omap_plane->pinned_fb; 261 262 if (pinned_fb != fb) { 263 int ret; 264 265 DBG("%p -> %p", pinned_fb, fb); 266 267 mutex_lock(&omap_plane->unpin_mutex); 268 ret = omap_framebuffer_replace(pinned_fb, fb, plane, unpin); 269 mutex_unlock(&omap_plane->unpin_mutex); 270 271 if (ret) { 272 dev_err(plane->dev->dev, "could not swap %p -> %p\n", 273 omap_plane->pinned_fb, fb); 274 omap_plane->pinned_fb = NULL; 275 return ret; 276 } 277 278 omap_plane->pinned_fb = fb; 279 } 280 281 return 0; 282} 283 284/* update parameters that are dependent on the framebuffer dimensions and 285 * position within the fb that this plane scans out from. This is called 286 * when framebuffer or x,y base may have changed. 287 */ 288static void update_scanout(struct drm_plane *plane) 289{ 290 struct omap_plane *omap_plane = to_omap_plane(plane); 291 struct omap_overlay_info *info = &omap_plane->info; 292 int ret; 293 294 ret = update_pin(plane, plane->fb); 295 if (ret) { 296 dev_err(plane->dev->dev, 297 "could not pin fb: %d\n", ret); 298 omap_plane_dpms(plane, DRM_MODE_DPMS_OFF); 299 return; 300 } 301 302 omap_framebuffer_update_scanout(plane->fb, 303 omap_plane->src_x, omap_plane->src_y, info); 304 305 DBG("%s: %d,%d: %08x %08x (%d)", omap_plane->ovl->name, 306 omap_plane->src_x, omap_plane->src_y, 307 (u32)info->paddr, (u32)info->p_uv_addr, 308 info->screen_width); 309} 310 311int omap_plane_mode_set(struct drm_plane *plane, 312 struct drm_crtc *crtc, struct drm_framebuffer *fb, 313 int crtc_x, int crtc_y, 314 unsigned int crtc_w, unsigned int crtc_h, 315 uint32_t src_x, uint32_t src_y, 316 uint32_t src_w, uint32_t src_h) 317{ 318 struct omap_plane *omap_plane = to_omap_plane(plane); 319 320 /* src values are in Q16 fixed point, convert to integer: */ 321 src_x = src_x >> 16; 322 src_y = src_y >> 16; 323 src_w = src_w >> 16; 324 src_h = src_h >> 16; 325 326 omap_plane->info.pos_x = crtc_x; 327 omap_plane->info.pos_y = crtc_y; 328 omap_plane->info.out_width = crtc_w; 329 omap_plane->info.out_height = crtc_h; 330 omap_plane->info.width = src_w; 331 omap_plane->info.height = src_h; 332 omap_plane->src_x = src_x; 333 omap_plane->src_y = src_y; 334 335 /* note: this is done after this fxn returns.. but if we need 336 * to do a commit/update_scanout, etc before this returns we 337 * need the current value. 338 */ 339 plane->fb = fb; 340 plane->crtc = crtc; 341 342 update_scanout(plane); 343 update_manager(plane); 344 345 return 0; 346} 347 348static int omap_plane_update(struct drm_plane *plane, 349 struct drm_crtc *crtc, struct drm_framebuffer *fb, 350 int crtc_x, int crtc_y, 351 unsigned int crtc_w, unsigned int crtc_h, 352 uint32_t src_x, uint32_t src_y, 353 uint32_t src_w, uint32_t src_h) 354{ 355 omap_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, 356 src_x, src_y, src_w, src_h); 357 return omap_plane_dpms(plane, DRM_MODE_DPMS_ON); 358} 359 360static int omap_plane_disable(struct drm_plane *plane) 361{ 362 return omap_plane_dpms(plane, DRM_MODE_DPMS_OFF); 363} 364 365static void omap_plane_destroy(struct drm_plane *plane) 366{ 367 struct omap_plane *omap_plane = to_omap_plane(plane); 368 DBG("%s", omap_plane->ovl->name); 369 omap_plane_disable(plane); 370 drm_plane_cleanup(plane); 371 WARN_ON(omap_plane->pending_num_unpins + omap_plane->num_unpins > 0); 372 kfifo_free(&omap_plane->unpin_fifo); 373 kfree(omap_plane); 374} 375 376int omap_plane_dpms(struct drm_plane *plane, int mode) 377{ 378 struct omap_plane *omap_plane = to_omap_plane(plane); 379 struct omap_overlay *ovl = omap_plane->ovl; 380 int r; 381 382 DBG("%s: %d", omap_plane->ovl->name, mode); 383 384 if (mode == DRM_MODE_DPMS_ON) { 385 update_scanout(plane); 386 r = commit(plane); 387 if (!r) 388 r = ovl->enable(ovl); 389 } else { 390 struct omap_drm_private *priv = plane->dev->dev_private; 391 r = ovl->disable(ovl); 392 update_pin(plane, NULL); 393 queue_work(priv->wq, &omap_plane->work); 394 } 395 396 return r; 397} 398 399void omap_plane_on_endwin(struct drm_plane *plane, 400 void (*fxn)(void *), void *arg) 401{ 402 struct omap_plane *omap_plane = to_omap_plane(plane); 403 404 mutex_lock(&omap_plane->unpin_mutex); 405 omap_plane->endwin.fxn = fxn; 406 omap_plane->endwin.arg = arg; 407 mutex_unlock(&omap_plane->unpin_mutex); 408 409 install_irq(plane); 410} 411 412static const struct drm_plane_funcs omap_plane_funcs = { 413 .update_plane = omap_plane_update, 414 .disable_plane = omap_plane_disable, 415 .destroy = omap_plane_destroy, 416}; 417 418/* initialize plane */ 419struct drm_plane *omap_plane_init(struct drm_device *dev, 420 struct omap_overlay *ovl, unsigned int possible_crtcs, 421 bool priv) 422{ 423 struct drm_plane *plane = NULL; 424 struct omap_plane *omap_plane; 425 int ret; 426 427 DBG("%s: possible_crtcs=%08x, priv=%d", ovl->name, 428 possible_crtcs, priv); 429 430 /* friendly reminder to update table for future hw: */ 431 WARN_ON(ovl->id >= ARRAY_SIZE(id2irq)); 432 433 omap_plane = kzalloc(sizeof(*omap_plane), GFP_KERNEL); 434 if (!omap_plane) { 435 dev_err(dev->dev, "could not allocate plane\n"); 436 goto fail; 437 } 438 439 mutex_init(&omap_plane->unpin_mutex); 440 441 ret = kfifo_alloc(&omap_plane->unpin_fifo, 16, GFP_KERNEL); 442 if (ret) { 443 dev_err(dev->dev, "could not allocate unpin FIFO\n"); 444 goto fail; 445 } 446 447 INIT_WORK(&omap_plane->work, unpin_worker); 448 449 omap_plane->nformats = omap_framebuffer_get_formats( 450 omap_plane->formats, ARRAY_SIZE(omap_plane->formats), 451 ovl->supported_modes); 452 omap_plane->ovl = ovl; 453 plane = &omap_plane->base; 454 455 drm_plane_init(dev, plane, possible_crtcs, &omap_plane_funcs, 456 omap_plane->formats, omap_plane->nformats, priv); 457 458 /* get our starting configuration, set defaults for parameters 459 * we don't currently use, etc: 460 */ 461 ovl->get_overlay_info(ovl, &omap_plane->info); 462 omap_plane->info.rotation_type = OMAP_DSS_ROT_DMA; 463 omap_plane->info.rotation = OMAP_DSS_ROT_0; 464 omap_plane->info.global_alpha = 0xff; 465 omap_plane->info.mirror = 0; 466 omap_plane->info.mirror = 0; 467 468 /* Set defaults depending on whether we are a CRTC or overlay 469 * layer. 470 * TODO add ioctl to give userspace an API to change this.. this 471 * will come in a subsequent patch. 472 */ 473 if (priv) 474 omap_plane->info.zorder = 0; 475 else 476 omap_plane->info.zorder = ovl->id; 477 478 update_manager(plane); 479 480 return plane; 481 482fail: 483 if (plane) { 484 omap_plane_destroy(plane); 485 } 486 return NULL; 487} 488